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Synaptic elements based on memory devices play an important role in boosting neuromorphic system performance. Here, we show two types of fab-friendly HfO₂ material-based resistive memories categorized by configuration and an operating principle for a suitable analog synaptic device aimed at inference and training of neural networks. Since the inference task is mainly related to the number of states from a recognition accuracy perspective, we first demonstrate multilevel cell (MLC) properties of compact two-terminal resistive random-access memory (RRAM). The resistance state can be finely subdivided into an MLC by precisely controlling the evolution of conductive filament constructed by the local movement of oxygen vacancies. Specifically, we investigate how the thickness of the HfO₂-switching layer is related to an MLC, which is understood by performing physics-based modeling in MATLAB from a microscopic view. Meanwhile, synaptic devices driven by an interfacial switching mechanism instead of local filamentary dynamics are preferred for training accelerated neuromorphic systems, where the analogous transition of each state ensures high accuracy. Thus, we introduce three-terminal electrochemical random-access memory that facilitates mobile ions across the entire HfO₂ switching area uniformly, resulting in highly controllable and gradually tuned current proportional to the amount of migrated ions.

Neuromorphic computing has become an attractive candidate for emerging computing platforms. It requires an architectural perspective, meaning the topology or hyperparameters of a neural network is key to realizing sound accuracy and performance in neural networks. However, these network architectures must be executed on some form of computer processor. For machine learning, this is often done with conventional computer processing units, graphics processor units, or some combination thereof. A neuromorphic computer processor or neuroprocessor, in the context of this paper, is a hardware system that has been designed and optimized for executing neural networks of one flavor or another. Here, we review the history of neuromorphic computing and consider various spiking neuroprocessor designs that have emerged over the years. The aim of this paper is to identify emerging trends and techniques in the design of such brain-inspired neuroprocessor computer systems.

The extreme parallelism property warrant convergence of neural networks with that of quantum computing. As the size of the network grows, the classical implementation of neural networks becomes computationally expensive and not feasible. In this paper, we propose a hybrid image classifier model using spiking neural networks (SNN) and quantum circuits that combines dynamic behaviour of SNN with the extreme parallelism offered by quantum computing. The proposed model outperforms models in comparison with spiking neural network in classical computing, and hybrid convolution neural network-quantum circuit models in terms of various performance parameters. The proposed hybrid SNN-QC model achieves an accuracy of 99.9% in comparison with CNN-QC model accuracy of 96.3%, and SNN model of accuracy 91.2% in MNIST classification task. The tests on KMNIST and CIFAR-1O also showed improvements.

The rapidly growing computational demands of deep neural networks require novel hardware designs. Recently, tuneable nanoelectronic devices were developed based on hopping electrons through a network of dopant atoms in silicon. These 'dopant network processing units' (DNPUs) are highly energy-efficient and have potentially very high throughput. By adapting the control voltages applied to its electrodes, a single DNPU can solve a variety of linearly non-separable classification problems. However, using a single device has limitations due to the implicit single-node architecture. This paper presents a promising novel approach to neural information processing by introducing DNPUs as high-capacity neurons and moving from a single to a multi-neuron framework. By implementing and testing a small multi-DNPU classifier in hardware, we show that feed-forward DNPU networks improve the performance of a single DNPU from 77% to 94% test accuracy on a binary classification task with concentric classes on a plane. Furthermore, motivated by the integration of DNPUs with memristor crossbar arrays, we study the potential of using DNPUs in combination with linear layers. We show by simulation that an MNIST classifier with only 10 DNPU nodes achieves over 96% test accuracy. Our results pave the road towards hardware neural network emulators that offer atomic-scale information processing with low latency and energy consumption.

Reinforcement learning (RL) is a foundation of learning in biological systems and provides a framework to address numerous challenges with real-world artificial intelligence applications. Efficient implementations of RL techniques could allow for agents deployed in edge-use cases to gain novel abilities, such as improved navigation, understanding complex situations and critical decision making. Toward this goal, we describe a flexible architecture to carry out RL on neuromorphic platforms. This architecture was implemented using an Intel neuromorphic processor and demonstrated solving a variety of tasks using spiking dynamics. Our study proposes a usable solution for real-world RL applications and demonstrates applicability of the neuromorphic platforms for RL problems.

The optical flow in an event camera is estimated using measurements in the address event representation (AER). Each measurement consists of a pixel address and the time at which a change in the pixel value equalled a given fixed threshold. The measurements in a small region of the pixel array and within a given window in time are approximated by a probability distribution defined on a finite set. The distributions obtained in this way form a three dimensional family parameterized by the pixel addresses and by time. Each parameter value has an associated Fisher–Rao matrix obtained from the Fisher–Rao metric for the parameterized family of distributions. The optical flow vector at a given pixel and at a given time is obtained from the eigenvector of the associated Fisher–Rao matrix with the least eigenvalue. The Fisher–Rao algorithm for estimating optical flow is tested on eight datasets, of which six have ground truth optical flow. It is shown that the Fisher–Rao algorithm performs well in comparison with two state of the art algorithms for estimating optical flow from AER measurements.

Oscillator-based data-classification schemes have been proposed recently using the Kuramoto model, which tries to capture the synchronization behavior of coupled oscillators without considering the underlying physics of the oscillation and the coupling. In this paper, we propose the hardware implementation of a Kuramoto-model-based data-classification scheme through an array of dipole-coupled uniform-mode spin Hall nano-oscillators (SHNOs). Using micromagnetic simulations, which capture the underlying physics of operation of the SHNOs, we first study the variation of synchronization range between two uniform-mode SHNOs as a function of the physical distance between them. Thus we correlate the coupling constant in the Kuramoto model with the dipole-coupling strength between two SHNOs, which our micromagnetic simulation takes into account. Next, we generate the synchronization map for the two-input–two-output dipole-coupled uniform-mode SHNO system through micromagnetics and show that it matches with the one predicted by the Kuramoto model. Thus, we demonstrate here that the synchronization behavior of SHNOs obtained from micromagnetics-based modeling is consistent with that obtained from the Kuramoto model, which ignores the underlying physics of the SHNOs. This suggests that the Kuramoto-model-based data classification scheme can indeed be implemented physically on an array of SHNOs. To verify our claim, we show, through micromagnetic simulation, binary classification of data from a popular machine-learning data set (Fisher's Iris data set) using an array of uniform-mode SHNOs.

With the rapid emergence of in-memory computing systems based on memristive technology, the integration of such memory devices in large-scale architectures is one of the main aspects to tackle. In this work we present a study of HfO₂-based memristive devices for their integration in large-scale CMOS systems, namely 200 mm wafers. The DC characteristics of single metal–insulator–metal devices are analyzed taking under consideration device-to-device variabilities and switching properties. Furthermore, the distribution of the leakage current levels in the pristine state of the samples are analyzed and correlated to the amount of formingless memristors found among the measured devices. Finally, the obtained results are fitted into a physic-based compact model that enables their integration into larger-scale simulation environments.

Major efforts to reproduce the brain performances in terms of classification and pattern recognition have been focussed on the development of artificial neuromorphic systems based on top-down lithographic technologies typical of highly integrated components of digital computers. Unconventional computing has been proposed as an alternative exploiting the complexity and collective phenomena originating from various classes of physical substrates. Materials composed of a large number of non-linear nanoscale junctions are of particular interest: these systems, obtained by the self-assembling of nano-objects like nanoparticles and nanowires, results in non-linear conduction properties characterized by spatiotemporal correlation in their electrical activity. This appears particularly useful for classification of complex features: nonlinear projection into a high-dimensional space can make data linearly separable, providing classification solutions that are computationally very expensive with digital computers. Recently we reported that nanostructured Au films fabricated from the assembling of gold clusters by supersonic cluster beam deposition show a complex resistive switching behaviour. Their non-linear electric behaviour is remarkably stable and reproducible allowing the facile training of the devices on precise resistive states. Here we report about the fabrication and characterization of a device that allows the binary classification of Boolean functions by exploiting the properties of cluster-assembled Au films interconnecting a generic pattern of electrodes. This device, that constitutes a generalization of the perceptron, can receive inputs from different electrode configurations and generate a complete set of Boolean functions of n variables for classification tasks. We also show that the non-linear and non-local electrical conduction of cluster-assembled gold films, working at room temperature, allows the classification of non-linearly separable functions without previous training of the device.

Animal nervous systems are highly efficient in processing sensory input. The neuromorphic computing paradigm aims at the hardware implementation of neural network computations to support novel solutions for building brain-inspired computing systems. Here, we take inspiration from sensory processing in the nervous system of the fruit fly larva. With its strongly limited computational resources of <200 neurons and <1.000 synapses the larval olfactory pathway employs fundamental computations to transform broadly tuned receptor input at the periphery into an energy efficient sparse code in the central brain. We show how this approach allows us to achieve sparse coding and increased separability of stimulus patterns in a spiking neural network, validated with both software simulation and hardware emulation on mixed-signal real-time neuromorphic hardware. We verify that feedback inhibition is the central motif to support sparseness in the spatial domain, across the neuron population, while the combination of spike frequency adaptation and feedback inhibition determines sparseness in the temporal domain. Our experiments demonstrate that such small, biologically realistic neural networks, efficiently implemented on neuromorphic hardware, can achieve parallel processing and efficient encoding of sensory input at full temporal resolution.

The promise of artificial intelligence (AI) to process complex datasets has brought about innovative computing paradigms. While recent developments in quantum-photonic computing have reached significant feats, mimicking our brain's ability to recognize images are poorly integrated in these ventures. Here, I incorporate orbital angular momentum (OAM) states in a classical Vander Lugt optical correlator to create the holographic photonic neuron (HoloPheuron). The HoloPheuron can memorize an array of matched filters in a single phase-hologram, which is derived by linking OAM states with elements in the array. Successful correlation is independent of intensity and yields photons with OAM states of lℏ, which can be used as a transmission protocol or qudits for quantum computing. The unique OAM identifier establishes the HoloPheuron as a fundamental AI device for pattern recognition that can be scaled and integrated with other computing platforms to build-up a robust neuromorphic quantum-photonic processor.