Integrated Low Noise Amplifier with Capacitive Shunt Feedback Impedance Matching for Radio Astronomy

The matching of the input impedance of a low noise amplifier (LNA) to the impedance of the source reduces signal reflections at the input and improves the gain, the signal-to-noise ratio (S/N) and the linearity of the amplifier (Fu et al. 2010). Impedance matching is achieved when the source impedance is equal to the complex conjugate of the input impedance. The S/N at the output is related to the noise figure (NF) of the LNA and, for a given operating frequency, the NF is minimal when noise matching is achieved. At noise matching, the optimum noise impedance of the LNA is equal to the impedance of the signal source. Hence, to achieve the optimum S/N and sensitivity, both input impedance and noise impedance must be matched to the source impedance (Fu et al. 2010). Such matching can be achieved when the inductively degenerated common-emitter (CE) or common-source is used for the first stage of the LNA. For simultaneous impedance and noise matching an inductor is required at the input of the LNA in the base circuit of the first stage. This is known to achieve the best noise and linearity performance (Aparin & Larson 2003). However, integrated spiral inductors have a low-quality factor Q, with a typical value close to 15, in contrast with external inductors having a Q factor that can reach 150 and more. Therefore, the thermal noise due to the base input inductor is significant when compared to the input signal and impairs the noise performance of the LNA. The thermal noise of the inductor resistance adds to the base parasitic resistance of the input transistor, which is known to be a significant noise contributor to an LNA. To prevent the performance degradation caused by the on-chip spiral inductor, a high Q external inductor can be used. Although such a solution has been proposed in Belostotski & Haslett (2007) and Bimana & Sinha (2016), in achieving sub-1 dB NFs, it is desirable to reduce the number of external components for an integrated receiver to the minimum possible. Such a reduction lowers the cost and size of the receiver.

This paper investigates and proposes a new design for an integrated LNA operating in the frequency band of 1.400–1.427 GHz. This band is allocated by the International Telecommunication Union to radio astronomy and corresponds to the electromagnetic radiations of the neutral atomic hydrogen (H i) received on earth (ITU 2013). Hydrogen, which is the most abundant element in the universe, constitutes 75% of its mass. At very low temperature (100 K) in the interstellar space, the proton and the electron of the hydrogen atom can spin in the same or opposite directions along their individual axes, corresponding to different energy levels. A change in the spin direction and the energy level corresponds to the emission of photons at 1.420 GHz, the 21 cm hydrogen line (Saje & Vidmar 2017). However, because of the large recession velocities of galaxies, photon emissions are Doppler shifted to lower frequencies, hence the frequency band. The distribution of H i arising from radio observations allowed astronomers to locate the center of our galaxy, the Milky Way, and its spiral arms. By observing H i emissions, the characteristics of some elements of the universe, such as their velocity and their mass, can be studied.

A CE transistor with capacitive feedback is used as the input stage. The capacitive feedback and the capacitive load of the input transistor achieve a quasi-resistive input impedance at 1.420 GHz, without an integrated inductor in the base and emitter circuits. A cascode configuration for the output stage is used to improve the isolation between the output of the LNA and its input. The output stage drives an output circuit that matches the output impedance of the last stage of the LNA to the 50 Ω load in the operating bandwidth.

This paper is structured as follows: Section 2 presents the input stage of the proposed LNA and demonstrates that, under specific conditions, the imaginary part of the input impedance of the stage can be neglected. The section is divided into three sub-sections addressing the capacitive feedback circuit, the impact of the feedback on noise performance and the implementation of the capacitive load of the input stage. Section 3 discusses the dependencies of the optimum noise resistance. Section 4 describes the output matching network of the LNA and derives design equations used to determine the values of its capacitive and inductive components. Section 5 presents the topology of the LNA and discusses its design. Sections 6, 7 and 8 provide simulation results, the design methodology, and the conclusion, respectively.

2.1. The CE With Capacitive Feedback

It is well known that the noise performance of an amplifier is mainly determined by its first stage. Therefore, a high gain and a low NF are desired for the first stage of the LNA. Capacitive feedback is reported in several LNA designs. In Kang et al. (2011) and Liu et al. (2018) capacitive feedback is used to reduce the size of the emitter inductor, to improve linearity and to match the input resistance to the optimum noise resistance of an inductively degenerated CE input stage of an LNA. To reduce the chip size and to avoid using small, inaccurate degeneration inductances, the source inductor is replaced by capacitive feedback but the gate inductor is maintained for noise matching in Tran et al. (2011) and Wu & Shahroury (2006). In Howard & Cressler (2009), shunt capacitive feedback is used to increase the bandwidth of an LNA in reducing the Q factor at the input. The use of a noiseless capacitor to close the feedback loop achieves input impedance matching without impairing the NF of this stage. Although this can be predicted intuitively, the effect of the capacitive feedback on noise parameters is evaluated in the following paragraphs. The CE input transistor with capacitive feedback and capacitive load is represented in Figure 1, where v_in and v_out are the input and output signals, respectively, C_f is the feedback capacitor and C_L is the capacitive load.

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The circuit in Figure 1 represents a shunt-shunt feedback network and can be analyzed using feedback theory. If z_i and z_o are the input and output small-signal impedance, respectively, of the basic amplifier in Figure 1 without feedback, the input and output small-signal impedance with feedback Z_i and Z_o , respectively, are given by (Gray & Meyer 2010):

$$\begin{eqnarray}&&{Z}_{i}=\displaystyle \frac{{z}_{i}}{1+T}\end{eqnarray} \tag{ 1 }$$

$$\begin{eqnarray}&&{Z}_{o}=\displaystyle \frac{{z}_{o}}{1+T}\end{eqnarray} \tag{ 2 }$$

where T is the loop gain, with $T=a\beta$, α being the transresistance and β the feedback transconductance. The transresistance α and the feedback transconductance β can be determined using the representation of the shunt-shunt feedback network in Gray & Meyer (2010) and the simplified small-signal model of Figure 1, where the capacitive feedback C_f is not included. This small-signal model is shown in Figure 2, where C_be is the base-emitter capacitance, C_bc the base-collector capacitance and g_m the transconductance of Q₁.

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The input impedance z_in of Figure 2 is given by (3)

$$\begin{eqnarray}&&{z}_{\mathrm{in}}=\displaystyle \frac{-j\left({C}_{L}+{C}_{\mathrm{bc}}\right)}{\omega \left({C}_{\mathrm{bc}}+{C}_{\mathrm{be}}\right)\left({C}_{L}+{C}_{\mathrm{bc}}\right)-{{jC}}_{\mathrm{bc}}\left({g}_{m}-j\omega {C}_{\mathrm{bc}}\right)}.\end{eqnarray} \tag{ 3 }$$

When the feedback capacitor C_f is added, the feedback transconductance β is given by (4)

$$\begin{eqnarray}&&\beta =-j\omega {C}_{f}.\end{eqnarray} \tag{ 4 }$$

The transresistance α is given in (5) and can be re-written as (6)

$$\begin{eqnarray}&&\alpha =\displaystyle \frac{{v}_{\mathrm{out}}}{{i}_{\mathrm{in}}}\end{eqnarray} \tag{ 5 }$$

$$\begin{eqnarray}&&\alpha =\displaystyle \frac{{g}_{m}-j\omega {C}_{\mathrm{bc}}}{{\omega }^{2}\left({C}_{\mathrm{be}}+{C}_{\mathrm{bc}}\right)\left({C}_{L}+{C}_{\mathrm{bc}}\right)-j\omega {C}_{\mathrm{bc}}\left({g}_{m}-j\omega {C}_{\mathrm{bc}}\right)}.\end{eqnarray} \tag{ 6 }$$

Assuming that $| T| \gg 1$, (1) can be simplified and the input impedance of Figure 1 is given by (7)

$$\begin{eqnarray}&&{Z}_{i}\approx \displaystyle \frac{{C}_{L}+{C}_{\mathrm{bc}}}{{C}_{f}\left({g}_{m}-j\omega {C}_{\mathrm{bc}}\right)}.\end{eqnarray} \tag{ 7 }$$

The input impedance has an imaginary component that can be neglected when ${g}_{m}\gg \omega {C}_{\mathrm{bc}}$.

Under this condition, the input impedance becomes:

$$\begin{eqnarray}&&{Z}_{i}\approx \displaystyle \frac{{C}_{L}+{C}_{\mathrm{bc}}}{{C}_{f}{g}_{m}}.\end{eqnarray} \tag{ 8 }$$

Equation (8) shows that, under the conditions that $\left|T\right|\gg 1$ and ${g}_{m}\gg \omega {C}_{\mathrm{bc}}$, the input impedance is real, not related to the operating frequency and can be equal to 50 Ω, the internal resistance of the source. However, it is desired to investigate under what conditions $\left|T\right|\gg 1$. The inverse of T is given by (9)

$$\begin{eqnarray}&&\displaystyle \frac{1}{T}=\displaystyle \frac{\omega \left({C}_{\mathrm{bc}}+{C}_{\mathrm{be}}\right)\left({C}_{L}+{C}_{\mathrm{bc}}\right)}{-{{jC}}_{f}\left({g}_{m}-j\omega {C}_{\mathrm{bc}}\right)}+\displaystyle \frac{{C}_{\mathrm{bc}}}{{C}_{f}}.\end{eqnarray} \tag{ 9 }$$

Because ${g}_{m}\gg \omega {C}_{\mathrm{bc}}$, (9) becomes (10):

$$\begin{eqnarray}&&\displaystyle \frac{1}{T}\approx \displaystyle \frac{j\omega \left({C}_{\mathrm{bc}}+{C}_{\mathrm{be}}\right)\left({C}_{L}+{C}_{\mathrm{bc}}\right)}{{g}_{m}{C}_{f}}+\displaystyle \frac{{C}_{\mathrm{bc}}}{{C}_{f}}.\end{eqnarray} \tag{ 10 }$$

Reporting the unity frequency f_T in (10), with ${f}_{T}={g}_{m}/2\pi \left({C}_{\mathrm{be}}+{C}_{\mathrm{bc}}\right)$, yields (11)

$$\begin{eqnarray}&&\displaystyle \frac{1}{T}\approx \displaystyle \frac{j\omega \left({C}_{L}+{C}_{\mathrm{bc}}\right)}{{\omega }_{T}{C}_{f}}+\displaystyle \frac{{C}_{\mathrm{bc}}}{{C}_{f}}.\end{eqnarray} \tag{ 11 }$$

The base-collector capacitance C_bc is generally small, compared to C_f , therefore ${C}_{\mathrm{bc}}/{C}_{f}\ll 1$ and (11) yields (12)

$$\begin{eqnarray}&&\displaystyle \frac{1}{T}\approx \displaystyle \frac{j\omega \left({C}_{L}+{C}_{\mathrm{bc}}\right)}{{\omega }_{T}{C}_{f}}.\end{eqnarray} \tag{ 12 }$$

Because ${C}_{L}+{C}_{\mathrm{bc}}\approx {C}_{L}$ and $\left|T\right|\gg 1$, $\omega /{\omega }_{T}\ll {C}_{f}/{C}_{L}$ and the conditions to achieve a real input impedance for the input stage in Figure 1 are summarized as follows:

• (a)  
  ${g}_{m}\gg \omega {C}_{\mathrm{bc}}$
• (b)  
  ${C}_{\mathrm{bc}}/{C}_{f}\ll 1$ (this is generally the case)
• (c)  
  $\displaystyle \frac{\omega }{{\omega }_{T}}\ll \displaystyle \frac{{C}_{f}}{{C}_{L}}$
• (d)  
  ${C}_{\mathrm{bc}}/{C}_{L}\ll 1$.

Conditions (b) and (d) indicate that C_bc must be considerably small, compared to C_f and C_L . These conditions are best met by integrated rather than by discrete transistors because C_bc is related to the size of the transistor. Condition (c) shows that the operating frequency f may be required to be much lower than f_T , which means that a high f_T is needed for a low operating frequency, limiting the maximum operating frequency. Conditions (a), (b), (c) and (d) are stringent but can be slightly relaxed, as shown in Section 2.3.

2.2. Noise Parameters of The CE with Capacitive Feedback

The impact of the capacitive feedback and load on the noise parameters of the circuit represented in Figure 2 can be analyzed by the noise correlation matrix theory (Rothe & Dahlke 1956). Although it can be concluded intuitively that the NF of the input stage of the LNA is unchanged because the capacitive feedback and load are noiseless, the impact of these noiseless components on the Y_sopt is not trivial. For the analysis of this impact, the circuit in Figure 1 is decomposed into three sub-circuits: the first sub-circuit is the CE transistor, the second sub-circuit is the capacitive load C_L and the third sub-circuit is the feedback capacitor C_f .

It can be shown that the noise correlation matrix of the CE two-port network is given by (Moura & Darwazeh 2005):

$$\begin{eqnarray}{C}_{A}=\left[\begin{array}{cc}{R}_{n} & \left[\displaystyle \frac{{F}_{\min }-1}{2}-{R}_{n}{Y}_{\mathrm{sopt}}^{* }\right]\\ \left[\displaystyle \frac{{F}_{\min }-1}{2}-{R}_{n}{Y}_{\mathrm{sopt}}\right] & {R}_{n}{\left|{Y}_{\mathrm{sopt}}\right|}^{2}\end{array}\right]\end{eqnarray} \tag{ 13 }$$

where F_min is the minimum possible noise factor, R_n is the noise resistance and Y_sopt is the optimum source admittance.

The LNA can be represented as a cascade of two two-port networks represented in Figure 3, where the CE transistor and C_L constitute the first stage of the LNA without feedback.

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Assuming that the noise due to the second stage and the output matching network can be neglected, the noise factor of the first stage is given by:

$$\begin{eqnarray}&&F=1+\displaystyle \frac{{Z}^{+}{C}_{A}Z}{2{kT}\mathrm{Re}\left\{{Z}_{S}\right\}}\end{eqnarray} \tag{ 14 }$$

where C_A is the noise correlation matrix of Q₁ and C_L cascaded, Z_s is the impedance of the source, ${Z}^{+}$ is the Hermitian conjugate of Z with $Z=\left[\begin{array}{c}1\\ {Z}_{s}^{* }\end{array}\right]$. The Hermitian conjugate ${Z}^{+}$ is obtained by transposing Z and converting its elements in their complex conjugates. The noise correlation matrix C_A of two two-port networks in cascade is expressed as:

$$\begin{eqnarray}&&{C}_{A}={A}_{1}{C}_{A2}{A}_{1}^{+}+{C}_{A1}\end{eqnarray} \tag{ 15 }$$

where A₁ is the transmission matrix of the input two-port network and C_A1 is its noise correlation matrix. C_A2 is the noise correlation matrix of the two-port network formed by C_L .

The noise correlation matrix C_A2 is nil, as its diagonal terms are real values that represent the power spectrum of each noise source and the off-diagonal terms represent their cross-power spectra; these terms are nil for a noiseless network. The noise correlation matrix of the input stage is given by (16)

$$\begin{eqnarray}{C}_{A1}=2{kT}\left[\begin{array}{cc}{R}_{n} & \left[\displaystyle \frac{{F}_{\min }-1}{2}-{R}_{n}{Y}_{\mathrm{sopt}}^{* }\right]\\ \left[\displaystyle \frac{{F}_{\min }-1}{2}-{R}_{n}{Y}_{\mathrm{sopt}}\right] & {R}_{n}{\left|{Y}_{\mathrm{sopt}}\right|}^{2}\end{array}\right].\end{eqnarray} \tag{ 16 }$$

It is then concluded that C_A is not related to C_L , hence C_A  = C_A1 and noise parameters F_min, R_n and Y_sopt are independent from C_L .

The impact of C_f on the noise parameter of the input transistor can be investigated in decomposing the CE with feedback in two two-port networks in parallel. The first two-port network is the CE stage, with C_A1 as its noise correlation matrix, in chain representation. The second two-port network is the feedback capacitor, with C_A3 as its noise correlation matrix, in chain representation. The resulting decomposition is shown in Figure 4.

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It can be shown that if C_Y is the noise correlation matrix of the network in Figure 4, then C_Y is given by:

$$\begin{eqnarray}&&{C}_{Y}={C}_{Y1}+{C}_{Y3}\end{eqnarray} \tag{ 17 }$$

where C_Y1 and C_Y3 are the transformation of C_A1 and C_A3 in the admittance representation.

The resulting noise parameters are derived from the transformation of C_Y into the chain representation. The transformation of C_A1 in C_Y1 is done by the congruence transformation in (18):

$$\begin{eqnarray}&&\left[{C}_{Y1}\right]=\left[T\right]\left[{C}_{A1}\right]{\left[T\right]}^{+}\end{eqnarray} \tag{ 18 }$$

where T is the transformation matrix and T+ its Hermitian transform.

Similarly, the transformation of C_A3 into C_Y3 is given by (19):

$$\begin{eqnarray}&&\left[{C}_{Y3}\right]=\left[T\right]\left[{C}_{A3}\right]{\left[T\right]}^{+}.\end{eqnarray} \tag{ 19 }$$

The transformation of C_Y into ${C}_{A}^{{\prime} }$ is done by the expression:

$$\begin{eqnarray}&&\left[{C}_{A}^{{\prime} }\right]=\left[T\right]\left[{C}_{Y}\right]{\left[T\right]}^{+}.\end{eqnarray} \tag{ 20 }$$

The noise correlation matrix transformations represented by [T] are given in Table 1 (Moura & Darwazeh 2005).

Table 1. Transformation of Noise Correlation Matrices

Transformed	Original Representation
Representation	CY	CZ	CA	CH
${C}_{Y}^{{\prime} }$	$\left[\begin{array}{cc}1 & 0\\ 0 & 1\end{array}\right]$	$\left[\begin{array}{cc}{Y}_{11} & {Y}_{12}\\ {Y}_{21} & {Y}_{22}\end{array}\right]$	$\left[\begin{array}{cc}-{Y}_{11} & 1\\ -{Y}_{21} & 0\end{array}\right]$	$\left[\begin{array}{cc}-{Y}_{11} & 0\\ -{Y}_{21} & 1\end{array}\right]$
${C}_{Z}^{{\prime} }$	$\left[\begin{array}{cc}{Z}_{11} & {Z}_{12}\\ {Z}_{21} & {Z}_{22}\end{array}\right]$	$\left[\begin{array}{cc}1 & 0\\ 0 & 1\end{array}\right]$	$\left[\begin{array}{cc}1 & -{Z}_{11}\\ 0 & -{Z}_{21}\end{array}\right]$	$\left[\begin{array}{cc}1 & -{Z}_{12}\\ 0 & -{Z}_{22}\end{array}\right]$
${C}_{A}^{{\prime} }$	$\left[\begin{array}{cc}0 & {A}_{12}\\ 1 & {A}_{22}\end{array}\right]$	$\left[\begin{array}{cc}1 & -{A}_{11}\\ 0 & -{A}_{21}\end{array}\right]$	$\left[\begin{array}{cc}1 & 0\\ 0 & 1\end{array}\right]$	$\left[\begin{array}{cc}1 & {A}_{12}\\ 0 & {A}_{22}\end{array}\right]$
${C}_{H}^{{\prime} }$	$\left[\begin{array}{cc}-{h}_{11} & 0\\ -{h}_{21} & 1\end{array}\right]$	$\left[\begin{array}{cc}1 & -{h}_{12}\\ 0 & -{h}_{22}\end{array}\right]$	$\left[\begin{array}{cc}1 & -{h}_{11}\\ 0 & -{h}_{21}\end{array}\right]$	$\left[\begin{array}{cc}1 & 0\\ 0 & 1\end{array}\right]$

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For the determination of C_Y3, y₁₁ and y₂₁ are required for the feedback network, represented in Figure 5.

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The representation of the feedback network is described by (21) and (22)

$$\begin{eqnarray}&&{i}_{1}={y}_{11}{v}_{1}+{y}_{12}{v}_{2}\end{eqnarray} \tag{ 21 }$$

$$\begin{eqnarray}&&{i}_{2}={y}_{21}{v}_{1}+{y}_{22}{v}_{2}.\end{eqnarray} \tag{ 22 }$$

It is found that ${y}_{11}=j\omega {C}_{f}$, ${y}_{12}=-j\omega {C}_{f}$, ${y}_{21}=-j\omega {C}_{f}$, ${C}_{22}=j\omega {C}_{f}$.

Because the feedback two-port network is noiseless, C_A3 is nil, the noise correlation matrix of Figure 4 in y-representation is given by (23), derived from (17):

$$\begin{eqnarray}&&{C}_{Y}={C}_{Y1}.\end{eqnarray} \tag{ 23 }$$

The transformation of C_Y from (23) in chain representation is given by (24)

$$\begin{eqnarray}&&\left[{C}_{A1}\right]=\left[T\right]\left[{C}_{Y1}\right]{\left[T\right]}^{+}\end{eqnarray} \tag{ 24 }$$

where [T] is the matrix required for a congruence transformation from the y-representation to the chain representation.

Equation (24) shows that noise parameters F_min, R_n , and Y_sopt are not affected by the feedback capacitor C_f , as also shown in Kang et al. (2011). However, the capacitive load reduces the phase margin, which can cause instability.

2.3. DC Biasing of the Input Stage

For DC biasing, two options can be considered: a resistor or an inductor in parallel with a capacitor. The first configuration is unwanted because the additional thermal noise from the resistor will impair noise performance. The second configuration consists of an LC tank circuit that can be used as a capacitive load for frequencies that are higher than its resonant frequency. The LC tank circuit achieves a better bandwidth than a shunt RC load (up to 70%) and the LC tank circuit thermal noise voltage due to the parasitic resistance of the inductor is not multiplied by the Q factor, as it should have been at resonance (Simpson 1974).

The impedance of the tank circuit is given by:

$$\begin{eqnarray}&&{Z}_{L}=j\left(\displaystyle \frac{\omega L}{1-{{LC}}_{L}{\omega }^{2}}\right)\end{eqnarray} \tag{ 25 }$$

where L and C_L are the inductor and the capacitor of the tank circuit and ω is the angular operating frequency.

The impedance Z_L is capacitive for ${{{LC}}_{L}\omega }^{2}\gt 1$, which is equivalent to $\omega \gt {\omega }_{o}$, where ${\omega }_{o}$ is the resonant frequency of the LC circuit, with ${\omega }_{o}=1/\sqrt{{C}_{L}L}$.

The equivalent capacitor of the tank circuit for $\omega \gt {\omega }_{o}$, is given by (26)

$$\begin{eqnarray}&&{C}_{e}={C}_{L}\left(1-\displaystyle \frac{{\omega }_{o}^{2}}{{\omega }^{2}}\right).\end{eqnarray} \tag{ 26 }$$

The equivalent load capacitance C_e varies with frequency, indicating from (8) that input impedance matching is only achieved in a narrow bandwidth.

2.4. Impact of the LC Load Circuit on the Input Impedance

The approximation of the input impedance in (8) assumes that the load of Q₁ is capacitive. However, when ω is close to ω_o , the impedance of the tank circuit is large; it is required to evaluate how the input impedance varies. The small-signal model of the input stage without feedback but with an LC load is represented in Figure 6.

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The input admittance of Figure 6 is given by (27):

$$\begin{eqnarray}&&{Y}_{\mathrm{in}}=\displaystyle \frac{\omega {C}_{\mathrm{bc}}\left({g}_{m}-j\omega {C}_{\mathrm{bc}}\right)}{\omega {C}_{L}+\omega {C}_{\mathrm{bc}}-\tfrac{1}{\omega L}}+j\omega \left({C}_{\mathrm{bc}}+{C}_{\mathrm{be}}\right)\end{eqnarray} \tag{ 27 }$$

where L is the inductance of the tank circuit and C_L its capacitance.

The imaginary part of Y_in is given by the expression:

$$\begin{eqnarray}&&{I}_{m}\left\{{Y}_{\mathrm{in}}\right\}=\displaystyle \frac{j{\omega }^{2}{C}_{\mathrm{bc}}^{2}}{\tfrac{1}{\omega L}-\omega {C}_{\mathrm{bc}}-\omega {C}_{L}}+j\omega \left({C}_{\mathrm{bc}}+{C}_{\mathrm{be}}\right).\end{eqnarray} \tag{ 28 }$$

The value of ω for which (28) is nil is given by:

$$\begin{eqnarray}&&{\omega }^{2}=\displaystyle \frac{{C}_{\mathrm{bc}}+{C}_{\mathrm{be}}}{L\left({C}_{\mathrm{bc}}+{C}_{L}\right)\left({C}_{\mathrm{bc}}+{C}_{\mathrm{be}}\right)-{{LC}}_{\mathrm{bc}}^{2}}.\end{eqnarray} \tag{ 29 }$$

Adding C_f in parallel with C_bc for feedback and considering that ${C}_{\mathrm{bc}}/{C}_{f}\ll 1$, yields:

$$\begin{eqnarray}&&{\omega }^{2}\approx \displaystyle \frac{{C}_{f}+{C}_{\mathrm{be}}}{L\left({C}_{f}+{C}_{L}\right)\left({C}_{f}+{C}_{\mathrm{be}}\right)-{{LC}}_{f}^{2}}.\end{eqnarray} \tag{ 30 }$$

Assuming that ${C}_{f}\gg {C}_{\mathrm{be}}$, the angular frequency for which the imaginary part of Y_in is nil is given by (31)

$$\begin{eqnarray}&&{\omega }^{2}\approx {\omega }_{o}^{2}=\displaystyle \frac{1}{{{LC}}_{L}}.\end{eqnarray} \tag{ 31 }$$

Equation (31) shows that the input impedance is real at f_o , the resonant frequency of the LC tank circuit, if ${C}_{\mathrm{bc}}/{C}_{f}\ll 1$ and ${C}_{f}\gg {C}_{\mathrm{be}}$. Therefore, the imaginary part of the input impedance is small and negligible at frequencies close to f_o ; the matching conditions (a), (c) and (d) in 2.1 are relaxed and the new conditions arising are ${C}_{f}\gg {C}_{\mathrm{be}}$ and ${C}_{\mathrm{bc}}/{C}_{f}\ll 1$, the last-named being equivalent to b). Both conditions can be generally satisfied, especially for integrated circuits.

It can be shown that the input impedance is approximated by (32), derived from (27), where the imaginary part is nil

$$\begin{eqnarray}&&{Z}_{\mathrm{in}}=\displaystyle \frac{{C}_{L}+{C}_{f}-\tfrac{1}{{\omega }^{2}L}}{{g}_{m}{C}_{f}}.\end{eqnarray} \tag{ 32 }$$

At f_o , (32) becomes (33), which shows that the input impedance is only related to g_m when the LC tank circuit is at resonance

$$\begin{eqnarray}&&{Z}_{\mathrm{in}}\approx \displaystyle \frac{1}{{g}_{m}}.\end{eqnarray} \tag{ 33 }$$

It is desired to investigate how the optimum noise impedance can be made to match the source impedance to improve the NF. Noise sources of Figure 1 are shown in Figure 7, where the emitter parasitic resistance is neglected and the inductor of the output LC tank is L and R_L is its parasitic resistance. The thermal noise generated by R_L is represented by v_RL . The feedback capacitor is C_bc. The capacitor of the LC tank is not represented because the output is shorted to evaluate the output noise current i_o .

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The collector and base shot noises are respectively i_c and i_b . The base parasitic resistance is R_b and the source resistance is R_s . Hence, the thermal noise voltages due to R_b and R_s are v_b and r_s , respectively. Because the sum of i₁, i₂, ${i}_{3,}$ and i₄ is nil, the voltage at the base due to the noise sources is:

$$\begin{eqnarray}&&{v}_{1}=\displaystyle \frac{{i}_{b}{R}_{s}+{v}_{b}+{r}_{s}}{j\omega \left({C}_{\mathrm{be}}+{C}_{\mathrm{bc}}\right){R}_{s}+1}.\end{eqnarray} \tag{ 34 }$$

The total output noise is given by:

$$\begin{eqnarray}\begin{array}{rcl}{N}_{O} & = & \displaystyle \frac{{g}_{m}^{2}\left(\overline{{i}_{b}^{2}}{R}_{S}^{2}+\overline{{v}_{b}^{2}}+\overline{{r}_{S}^{2}}\right)}{{\omega }^{2}{\left({C}_{\mathrm{be}}+{C}_{\mathrm{bc}}\right)}^{2}{R}_{S}^{2}+1}\\ & & +\overline{{i}_{C}^{2}}+\displaystyle \frac{\overline{{v}_{{RL}}^{2}}}{{R}_{L}^{2}+{\omega }^{2}{R}_{L}^{2}}\end{array}\end{eqnarray} \tag{ 35 }$$

where $\overline{{i}_{b}^{2}}$, $\overline{{v}_{b}^{2}}$, $\overline{{r}_{S}^{2}}$, $\overline{{i}_{C}^{2}}\$ and $\overline{{v}_{{RL}}^{2}}$ are respectively the noise density powers of the base shot noise, the base resistance thermal noise, the source thermal noise, the collector shot noise and the output inductor thermal noise.

The noise to the output due to the source only is given by:

$$\begin{eqnarray}&&{N}_{S}=\displaystyle \frac{{g}_{m}^{2}\ \overline{{r}_{S}^{2}}}{{\omega }^{2}{\left({C}_{\mathrm{be}}+{C}_{\mathrm{bc}}\right)}^{2}{R}_{S}^{2}+1}.\end{eqnarray} \tag{ 36 }$$

The noise factor F of the first stage is given by (37)

$$\begin{eqnarray}&&F=\displaystyle \frac{{N}_{O}}{{N}_{S}}\end{eqnarray} \tag{ 37 }$$

$$\begin{eqnarray}\begin{array}{rcl}F & = & 1+\displaystyle \frac{\overline{{i}_{b\ }^{2}}{R}_{S}^{2}+\overline{{v}_{b}^{2}}}{\overline{{r}_{S}^{2}}}+\displaystyle \frac{\overline{{i}_{C}^{2}}\left\{{\omega }^{2}{\left({C}_{\mathrm{be}}+{C}_{\mathrm{bc}}\right)}^{2}{R}_{S}^{2}+1\right\}}{{g}_{m}^{2}\overline{{r}_{S}^{2}}}\\ & & +\displaystyle \frac{\overline{{v}_{{RL}}^{2}}\left\{{\omega }^{2}{\left({C}_{\mathrm{be}}+{C}_{\mathrm{bc}}\right)}^{2}{R}_{S}^{2}+1\right\}}{\left({R}_{L}^{2}+{\omega }^{2}{L}^{2}\right){g}_{m}^{2}\overline{{r}_{S}^{2}}}.\end{array}\end{eqnarray} \tag{ 38 }$$

The optimum noise resistance R_sopt is obtained by equating the partial derivative of F with respect to the source resistance (${dF}/{{dR}}_{S}$) to nil and replacing noise sources by their values: $\overline{{i}_{b}^{2}}=2{{qI}}_{B}$ , $\overline{{v}_{b}^{2}}=4{{kTr}}_{b}$, $\overline{{i}_{c}^{2}}=2{{qI}}_{C}$, $\overline{{v}_{{RL}}^{2}}=4{{kTR}}_{L}$, where I_B is the base bias DC current, I_C the collector bias DC current, with ${I}_{C}=\beta {I}_{B}$, k the Boltzmann constant and T the temperature in Kelvin.

The optimum source resistance is provided by (39)

$$\begin{eqnarray}&&{R}_{\mathrm{sopt}}=\sqrt{\displaystyle \frac{{r}_{b}+\tfrac{1}{2{g}_{m}}+\tfrac{{R}_{L}}{{g}_{m}^{2}\left({R}_{L}^{2}+{\omega }^{2}{L}^{2}\right)}}{\tfrac{{g}_{m}}{2\beta }+\tfrac{{\omega }^{2}{\left({C}_{\mathrm{be}}+{C}_{\mathrm{bc}}\right)}^{2}}{2{g}_{m}}+\tfrac{{R}_{L}{\omega }^{2}{\left({C}_{\mathrm{be}}+{C}_{\mathrm{bc}}\right)}^{2}}{\left({R}_{L}^{2}+{\omega }^{2}{L}^{2}\right){g}_{m}^{2}}}}.\end{eqnarray} \tag{ 39 }$$

Equation (39) becomes (40) when the output inductor is assumed to be noiseless

$$\begin{eqnarray}&&{R}_{\mathrm{sopt}}=\sqrt{\displaystyle \frac{2{r}_{b}{g}_{m}+1}{\tfrac{{g}_{m}^{2}}{\beta }+{\omega }^{2}{\left({C}_{\mathrm{be}}+{C}_{\mathrm{bc}}\right)}^{2}}}.\end{eqnarray} \tag{ 40 }$$

Because $\beta \gg 1$ and ${\omega }_{T}={g}_{m}/\left({C}_{\mathrm{be}}+{C}_{\mathrm{bc}}\right)$, (40) can be approximated by (41). Expression (41) is also found in Nyssens (2016)

$$\begin{eqnarray}&&{R}_{\mathrm{sopt}}=\displaystyle \frac{{\omega }_{T}}{\omega }\sqrt{\displaystyle \frac{2{r}_{b}}{{g}_{m}}+\displaystyle \frac{1}{{g}_{m}^{2}}}.\end{eqnarray} \tag{ 41 }$$

The expression of Z_sopt in Niknejad & Hashemi (2008) for the CE bipolar transistor is:

$$\begin{eqnarray}&&{Z}_{\mathrm{sopt}}=\left(\displaystyle \frac{{\omega }_{T}}{\omega }\right)\sqrt{\displaystyle \frac{2\left({r}_{b}+{r}_{e}\right)}{{g}_{m}}}+\displaystyle \frac{j}{\omega \left({C}_{\mathrm{be}}+{C}_{\mathrm{bc}}\right)}.\end{eqnarray} \tag{ 42 }$$

In Niknejad & Hashemi (2008), the NF is derived from noise sources referred to the input. The voltage and current noise source referred to the input are correlated and this correlation is accounted for in further calculations. The approach used in this work aims to avoid the complexity resulting from the calculations related to the correlation between the noise voltage and the noise current referred to the input (Hillbrand & Russer 1976) and leads to (41). However, for collector currents in the range of 2 mA or less, the term in $1/{g}_{m}^{2}$ can result in significant deviations, when (41) and (42) are compared. Elaborated expressions of R_sopt and X_sopt are provided in Voinigescu et al. (1997).

Equations (41) and (42) show that R_sopt can be made to match the source resistance in varying g_m , hence the collector current. Because the best noise performance of the transistor is achieved at a constant collector current density (Chen et al. 2004), g_m is set in varying the length of the emitter.

From the two-port noise model, noise matching is achieved when Z_s  = Z_sopt, as shown in (43), where F_min is the minimum possible noise factor, G_s the source admittance, R_n the noise resistance and Z_s the source impedance

$$\begin{eqnarray}&&F={F}_{\min }+\displaystyle \frac{{G}_{S}}{{R}_{n}}{\left|{Z}_{S}-{Z}_{\mathrm{sopt}}\right|}^{2}.\end{eqnarray} \tag{ 43 }$$

The expression of the noise resistance is given in (44)

$$\begin{eqnarray}&&{R}_{n}\approx \displaystyle \frac{1}{2{g}_{m}}+{r}_{b}+{r}_{e}.\end{eqnarray} \tag{ 44 }$$

Equation (42) shows that Z_sopt has an imaginary component; hence the second part of (43) is not nil. However, the impact of this mismatch to (43) is reduced when R_n is large. As shown in (44), a large R_n corresponds to a small collector current. As elegantly demonstrated in Fu et al. (2010), an inductor in the base signal part can be used to cancel this imaginary part. However, this research seeks to avoid using such an inductor.

The design of matching networks can be a tedious task for wideband networks and non-standard input and output impedances. For simple problems, such as narrow-band matching, the analytic theory related to impedance matching can be used. However, for wideband matching, the analytic theory is complex and may not provide a solution. Also, solutions found can be sub-optimal and can lead to circuits that are difficult to implement (Yarman 2008). Hence, impedance matching is not a methodical and efficient process when computer-aided tools—based on the brute force technique or the real frequency technique—are not used because the process depends on impedances to match and is based on trial and error (Sharma 2011).

The matching network used is a 4th order circuit, where the parallel RLC components correspond to an SLMPA in the technique by Anguera et al. (2001) and Andújar et al. (2010). In the proposed LNA, the parallel RLC components are connected between the collector of the output transistor and the power supply and serve for DC biasing and for impedance matching. The inductor L_o and the capacitor C_o , with the parallel RLC components, constitute the matching circuit.

The LNA is followed by another block and it is desired to match its output to the input impedance of the block and of the measuring test equipment. This impedance is expected to be 50 Ω and the 4th order output matching circuit is proposed at the output of the LNA. For this circuit, the technique used by Anguera et al. (2001) and Andújar et al. (2010) is expanded in this paper. This technique was initially developed to improve the bandwidth of the single-layer microstrip patch antenna (SLMPA) and is based on the equivalent circuit in Figure 8, where the parallel RLC components model the SLMPA and L_o and C_o are matching components. It is found in Pues & Van De Capelle (1989) that the radiation pattern of an SLMPA is unchanged for frequencies that are within 10% to 20% of the resonant frequency of the antenna. Therefore, the bandwidth of the SLMPA improves when the relevant matching circuit is inserted between the antenna and the transmitter. Power flows from plane B to the SLMPA in plane A. For the designed LNA, power flows from plane A to plane B.

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As indicated, the SLMPA antenna can be modeled by the RLC parallel circuit in Figure 8. The series LC circuit constitutes the matching network. The circuit in Figure 8 can be used at the output of the LNA for the DC biasing of its output stage and for output matching, where the matching is achieved in the impedance plane B. It is assumed that the output impedance of the last stage of the LNA is high and can be neglected in the calculations. The impedance of the circuit in Figure 8 is given by (45):

$$\begin{eqnarray}&&{Z}_{\mathrm{in}}\left(f\right)={Z}_{\mathrm{in}{RLC}}\left(f\right)+j2\pi {{fL}}_{o}-\displaystyle \frac{j}{2\pi {C}_{o}}.\end{eqnarray} \tag{ 45 }$$

It can be shown that the equation Im{Z_in (f )} = 0, related to the imaginary part of Z_in(f), may have three solutions corresponding to three resonant frequencies f_o , f₁, and f₂, when R, L, C, ${C}_{o,}$ and L_o are chosen accordingly. This is shown in Figure 9, where f_o , f₁, and f₂ are in a circle of constant voltage standing wave ratio (VSWR), S.

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At f_o , the reflection coefficient τ is superior to nil but less than 1. Therefore, the expression of the VSWR is given by (46)

$$\begin{eqnarray}&&\mathrm{VSWR}=S=\displaystyle \frac{1+\left|\tau \right|}{1-\left|\tau \right|}=\displaystyle \frac{1+\tau }{1-\tau }.\end{eqnarray} \tag{ 46 }$$

The reflection coefficient is related to the characteristic impedance Z_o and the impedance Z by the expression:

$$\begin{eqnarray}&&\tau =\displaystyle \frac{Z-{Z}_{o}}{Z+{Z}_{o}}.\end{eqnarray} \tag{ 47 }$$

Combining (46) and (47) yields (48)

$$\begin{eqnarray}&&Z={Z}_{o}S.\end{eqnarray} \tag{ 48 }$$

Equation (49) is derived from (45) and (48)

$$\begin{eqnarray}&&{R}_{e}\left\{{Z}_{\mathrm{in}}\left({f}_{o}\right)\right\}={{SZ}}_{o}.\end{eqnarray} \tag{ 49 }$$

At f₁ and f₂, the reflection coefficient τ is negative. The VSWR is given by:

$$\begin{eqnarray}&&\mathrm{VSWR}=S=\displaystyle \frac{1+\left|\tau \right|}{1-\left|\tau \right|}=\displaystyle \frac{1-\tau }{1+\tau }.\end{eqnarray} \tag{ 50 }$$

Combining (50) and (50) yields (51):

$$\begin{eqnarray}&&Z=\displaystyle \frac{{Z}_{o}}{S}.\end{eqnarray} \tag{ 51 }$$

Equation (52) is derived from (45) and (51):

$$\begin{eqnarray}&&{R}_{e}\left\{{Z}_{\mathrm{in}}\left({f}_{1}\right)\right\}={R}_{e}\left\{{Z}_{\mathrm{in}}\left({f}_{2}\right)\right\}=\displaystyle \frac{{Z}_{o}}{S}.\end{eqnarray} \tag{ 52 }$$

Finally, the imaginary parts of Z_in(f ) must be nil at f₁ and f₂, which is expressed in (53)

$$\begin{eqnarray}&&\mathrm{Im}\left\{{Z}_{\mathrm{in}}\left({f}_{1}\right)\right\}=\mathrm{Im}\left\{{Z}_{\mathrm{in}}\left({f}_{2}\right)\right\}=0.\end{eqnarray} \tag{ 53 }$$

After several analytical transformations, the following equations are derived:

$$\begin{eqnarray}&&{L}_{o}=\displaystyle \frac{{{QZ}}_{o}}{2\pi {f}_{o}S}\end{eqnarray} \tag{ 54 }$$

where Q is the Q factor of the RLC parallel circuit in Figure 8 and f_o its frequency of resonance

$$\begin{eqnarray}&&{f}_{o}=\displaystyle \frac{1}{2\pi \sqrt{{LC}}}\end{eqnarray} \tag{ 55 }$$

$$\begin{eqnarray}&&{C}_{o}=\displaystyle \frac{1}{4{\pi }^{2}{f}_{o}^{2}{L}_{o}}\end{eqnarray} \tag{ 56 }$$

$$\begin{eqnarray}&&{f}_{1}=\left(\displaystyle \frac{\sqrt{{S}^{2}-1+4{Q}^{2}}-\sqrt{{S}^{2}-1}}{2Q}\right){f}_{o}\end{eqnarray} \tag{ 57 }$$

$$\begin{eqnarray}&&{f}_{2}=\left(\displaystyle \frac{\sqrt{{S}^{2}-1+4{Q}^{2}}+\sqrt{{S}^{2}-1}}{2Q}\right){f}_{o}.\end{eqnarray} \tag{ 58 }$$

The bandwidth enhancement factor F is given by (59)

$$\begin{eqnarray}&&F=\displaystyle \frac{\sqrt{{S}^{3}-S}}{S-1}.\end{eqnarray} \tag{ 59 }$$

A typical graph of S₂₂ after bandwidth enhancement is shown in Figure 10.

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The resistance R is related to the desired gain, L and C resonate at f_o . The values of C_o and L_o are derived from the desired VSWR, S.

The 130 nm process BiCMOS8HP from GlobalFoundries and Advanced Design System are used for the design (Yeom 2015). Silicon–germanium heterojunction bipolar transistors (SiGe HBTs) achieve higher linearity and lower NFs at high frequency, compared to their complementary metal oxide semiconductor (CMOS) counterparts (Kang et al. 2011). The value of f_o in (49) and represented in Figure 10 is 1.420 GHz (21 cm wavelength), close to the neutral atomic hydrogen radiation frequency of 1,420,405,751.7667 Hz. The value of the VSWR corresponding to an S₂₂ value of −10 dB is 1.925. The value L of the inductor in (55) is 2.27 nH. The Q factor of the spiral inductor derived by simulation is 12.22 at 1.418 GHz and the parasitic resistance R of the inductor is 1.656 Ω. The values of the parasitic resistance and the inductance obtained by simulation show that the inductor can be represented by a series RL circuit whose Q factor is given by $Q=2\pi {f}_{o}L/R$. When the inductor is in parallel with the capacitor C, as shown in Figure 11, the resonant frequency of the circuit is given by (60)

$$\begin{eqnarray}&&{f}_{o}=\displaystyle \frac{1}{2\pi \sqrt{{LC}}}\sqrt{1-\displaystyle \frac{{R}^{2}C}{L}}=\displaystyle \frac{1}{2\pi \sqrt{{LC}\left(1+1/{Q}_{\mathrm{ind}}^{2}\right)}}\end{eqnarray} \tag{ 60 }$$

where Q_ind is the Q factor of the inductor.

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When ${Q}_{\mathrm{ind}}\geqslant 10$, ${f}_{o}\approx 1/2\pi \sqrt{{LC}}$ and the corresponding value of C is 5.53 pF.

It is desired to evaluate the Q factor of the tank circuit, comprising R, C, and L, all in parallel. A simplified model of a spiral inductor is represented in O (1998) and Haobijam & Palathinkal (2014). This model is further simplified and represented in Figure 12, when one port of the inductor is grounded.

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The resistance R_p and the capacitance C_p are related to the modeling of the substrate whose effect is neglected. The circuit in Figure 12 is equivalent to the circuit in Figure 11 where the parallel resistance R_p is added and C is the sum of C_p and C_s . Therefore, the expression of the Q factor of Figure 12 in (61) and (62) and from Haobijam & Palathinkal (2014) can be used to evaluate the Q factor of the output tank circuit. It is found that the Q factor of the tank circuit is equal to 2.38

$$\begin{eqnarray}&&Q=2\pi \displaystyle \frac{\left|\mathrm{Peak}\ \mathrm{Magnetic}\ \mathrm{Energy}-\mathrm{Peak}\ \mathrm{Eletric}\ \mathrm{Energy}\right|}{\mathrm{Energy}\ \mathrm{loss}\ \mathrm{per}\ \mathrm{cycle}}\end{eqnarray} \tag{ 61 }$$

$$\begin{eqnarray}\begin{array}{rcl}Q & = & \displaystyle \frac{\omega {L}_{S}{R}_{p}}{{R}_{S}{R}_{p}+\left[{\left(\omega {L}_{S}/{R}_{S}\right)}^{2}+1\right]{R}_{S}^{2}}\\ & & \times \left[1-\displaystyle \frac{{R}_{S}^{2}\left({C}_{p}+{C}_{S}\right)}{{L}_{S}}-{\omega }^{2}{L}_{S}\left({C}_{p}+{C}_{s}\right)\right].\end{array}\end{eqnarray} \tag{ 62 }$$

The value of L_o is required to be as low as possible, to reduce its size. Therefore, from (54), a low Q is preferred. Although the Q factor of the spiral inductor is already low, the Q factor of the output tank circuit can be reduced further by adjusting R_p . The values of L_o and C_o derived from (54) and (56) are respectively 6.931 nH and 1.812 pF. The values of f₁ and f₂ derived from (57) and (58) are respectively 1.01 GHz and 1.99 GHz. The plot of S₂₂ shows that S₂₂ is less than −10 dB in a bandwidth of 500 MHz, which is remarkable. The value of L_o is further adjusted by simulation to 7.77 nH.

A cascode circuit is used for the output stage for a low S₁₂ (−92 dB) and the DC base bias voltage is 868 mV, corresponding to maximum gain. The input stage is biased with a base voltage corresponding to minimum NF; this DC voltage is 615 mV. Therefore, the collector current of the input transistor corresponds to the emitter density current for minimum noise. The emitter length of the input transistor is 18 μm.

The LC load of the input stage is represented in Figure 13 whose resonant frequency is f_L . The frequency f_L is initially required to be lower but close to 1.4 GHz, the lower end of the frequency band of the LNA.

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The frequency of f_L is 1.370 GHz. For this value of f_L , the midpoint of the descending branch of the frequency response of the tank circuit corresponds to 1.42 GHz. The corresponding values of L_L and C_L are derived from (63) from Arshad (2008) and are respectively 2.27 nH and 5.9 pF. A similar approach is used by Adabi & Niknejad (2007), where a frequency offset is performed between f_L and the operating frequency

$$\begin{eqnarray}&&Q=\displaystyle \frac{1}{{R}_{p}}\sqrt{\displaystyle \frac{L}{{C}_{p}}}.\end{eqnarray} \tag{ 63 }$$

The approach used in this work is different and is based on (30) and (8), where C_L is nil. This approach results from the inference described below. The input impedance of an amplifier with capacitive feedback can be resistive when the load is capacitive. A capacitive load can be achieved by an LC tank circuit when the operating frequency f is greater than the resonant frequency of the tuned circuit. However, it was shown that the input impedance remains resistive when the operating frequency is equal to the resonant frequency of the LC tank circuit. Therefore, a capacitive load is not required to achieve a resistive input impedance for an amplifier with capacitive feedback and operating at the resonant frequency of the tank circuit.

Equation (30) shows that the imaginary part of the input impedance is related to C_f , C_be and L and can still be nil when C_L is nil. The real part of the input impedance is approximated by $1/{g}_{m}$ when the imaginary part is nil. Therefore, L_L and C_L can be determined while seeking the minimum value for S₁₁ at 1.42 GHz by parametric simulation of S₁₁, the parameters being L_L and C_L .

The proposed LNA is represented in Figure 14. The resistance R_L improves the stability of the input stage but decreases the noise performance. The transistors Q₂ and Q₃ are the output cascode stage. The emitter length for Q₂ and Q₃ is 3 μm.

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Simulations of noise parameters and S-parameters from 0.4 to 2.5 GHz are presented in this section. The value of S₁₁ is less than −10 dB from 1.317 to 1.502 GHz and better than −12 dB at 1.42 GHz. The output return loss S₂₂ is better than −10 dB from 1.1 to 1.764 GHz, as shown in Figure 15. These results indicate that the proposed output matching technique can be used for large bandwidths and that capacitive feedback impedance matching can provide relatively large bandwidths.

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The plot of the input impedance as a function of frequency is represented in Figure 16, where the real and imaginary parts of the input impedance are respectively 49.88 Ω and −0.899 Ω at 1.42 GHz, which confirm the theoretical analysis in previous sections.

A gain of 26 dB is achieved at 1.420 GHz and a reverse isolation better than −92 dB is attained, owing to the cascode output stage, as shown in Figure 17.

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The minimum possible NF (NF${}_{\min }$) and the NF, as shown in Figure 18, are respectively 1.788 and 2.335 dB at 1.42 GHz. The bias circuit is ideal and noiseless.

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The optimal noise impedance as function of frequency is represented in Figure 19. The optimum noise resistance is close to the input resistance at the operating frequency but the optimum noise reactance is not negligible, which justifies the difference between NF and NF${}_{\min }$.

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The linearity of an amplifier is characterized by the 1 dB compression point ${P}_{1\mathrm{dB}}$ and the third-order intermodulation intercept point referred to the input, IIP3. ${P}_{1\mathrm{dB}}$ is the power at the input corresponding to a gain decrease of 1 dB at the output and defines the upper limit of the input signal. ${P}_{1\mathrm{dB}}$ and IIP3 are related by the expression: IIP3 – ${P}_{1\mathrm{dB}}$ = 9.6 dB (Pajkanovic et al. 2017). The 1 dB compression point is −8.5 dBm, corresponding to an IIP3 of 1.1 dBm. The power consumption of the proposed LNA is 26 mW. The plot of the output power as a function of the input power is depicted in Figure 20.

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The amplifier is unconditionally stable when the stability factors μ and $\mu ^{\prime}$ are greater than 1, where μ and $\mu ^{\prime}$ are defined by (64) and (65)

$$\begin{eqnarray}&&\mu =\displaystyle \frac{1-{\left|{S}_{11}\right|}^{2}}{\left|{S}_{22}-\bigtriangleup {S}_{11}^{* }\right|+\left|{S}_{12}{S}_{21}\right|}\end{eqnarray} \tag{ 64 }$$

where $\bigtriangleup ={S}_{11}{S}_{22}-{S}_{12}{S}_{21}$

$$\begin{eqnarray}&&\mu ^{\prime} =\displaystyle \frac{1-{\left|{S}_{22}\right|}^{2}}{\left|{S}_{22}-\bigtriangleup {S}_{11}^{* }\right|+\left|{S}_{12}{S}_{21}\right|}.\end{eqnarray} \tag{ 65 }$$

On the Smith chart, the stability factor μ measures the distance between the area of instability and the center of the chart resulting from the load. The stability factor $\mu ^{\prime}$ measures the same distance resulting from the signal source. For a 50 Ω source and load, $\mu \gt 1$ and $\mu ^{\prime} \gt 1$ from 100 MHz to 10 GHz, as shown in Figure 21. For low frequencies, μ and μ' are close to 1 but still greater than 1 and the LNA remains unconditionally stable. This is verified by the plot of the Rollett's stability factor K in Figure 22.

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The K-factor is another measure of stability and a two-port network is unconditionally stable when the K-factor is greater than 1. However, when a network is unstable, only μ and μ'can indicate if the instability occurs at the input or the output of the network, contrary to the K-factor.

Prototyping measurements will deviate from simulation results because of parasitic resistances, capacitances, inductances, process and temperature and supply bias voltage variations. At frequencies close to 1 GHz, parasitic resistances are caused by signal tracks, while parasitic capacitances result mainly from signal tracks and bonding pads. Bonding wires create additional inductances at input and output ports. The layout of the chip starts with floor planning during which the position of power and signal bonding pads, as well as the relative positions of various functional blocks of the chip and the size and the structure of interconnection tracks are investigated and determined. Parasitics extracted from the layout tool are used to update the schematic for new simulations. The impact of process variations to performance parameters can be investigated by Monte Carlo and corners simulations whose results are also used to improve the design and the layout. The results of these simulations serve to adjust the values of some components in the schematic prior to new layouts and simulations, in an iterative process.

It is recommended to use "C4" type bonding pads from the manufacturing process, only for the validation of the concept by on-chip measurements. Such pads are intended for testing and do not require bonding wires or packaging. The parasitic inductance of a typical gold bonding wire with a diameter of 25 μm is about 1 nH mm⁻¹. Hence, a bonding wire can be used as an inductance in the base input signal path to cancel the imaginary part of Z_sopt in (42). However, the bonding wire will add a reactive component to the input impedance, degrading input impedance matching. For the proposed LNA, special attention is required for μ and μ' because their values are close to 1 for low frequencies.

A comparison with previous literature is shown in Table 2.

The proposed design is not limited to applications in radio astronomy. Therefore, the design methodology, summarized below, can be reused for other applications:

• 1.  
  The base DC bias voltage of the input stage is determined by simulation of NF${}_{\min }$ at the operating frequency f_o . The NF NF${}_{\min }$ corresponds to a constant emitter current density, J_opt.
• 2.  
  The length of the emitter of the input transistor and the number of transistors in parallel at the input stage are set to achieve ${Z}_{\mathrm{in}}=1/{g}_{m}$, where Z_in is 50 Ω and the emitter current density is J_opt.
• 3.  
  An arbitrary value of L_L for the output LC circuit of the input stage is selected. The capacitance C_L is set to resonate with L_L at f_o .
• 4.  
  The optimum noise resistance R_sopt being a function of C_f through ω_T and g_m , as per (41), g_m being determined, C_f is determined by simulation to achieve the minimum NF, corresponding to an optimum noise resistance R_sopt of 50 Ω.
• 5.  
  The DC base bias voltage of the output stage is determined by the simulation for maximum gain.
• 6.  
  Determine at f_o , S (VSWR) and the quality factor Q of the output parallel RLC circuit. The Q factor is related to R, L and C. Calculate f₁, f₂, C_o and L_o using Equations (57), (58), (56) and (54). L and R are selected to provide the desired bandwidth and to derive a value of L_o that can be achieved in the semiconductor process of fabrication.
• 7.  
  The feedback capacitor C_f and the tank circuit inductor L_L are fine-tuned by a parametric simulation of the NF and of S₁₁, whose value at 1.42 GHz is desired to be minimal. The capacitor C_L can be replaced by parasitic capacitances at the collector of the input transistor. The resistor R_L allows adjusting S₁₁ and improving the linearity.

This paper has shown that the input impedance of a CE bipolar junction transistor can be real when used with capacitive feedback and when the load of the transistor is capacitive. This impedance remains real when the load is an LC tank circuit operating at resonance. It was also shown that impedance matching can be achieved without affecting NF${}_{\min }$ in varying the length of the emitter or in connecting several transistors in parallel. Noise matching was achieved in matching the real part of Z_sopt to the source resistance, the imaginary part causing a mismatch whose impact is small when the noise resistance R_n is high. A high R_n is achieved when the transistor is biased for minimum noise, the collector current corresponding to the emitter current density for minimum noise. The real part of Z_sopt was made to match the source resistance in varying C_f , the feedback capacitor. Hence, impedance and noise matching can be achieved without inductors in the base and emitter circuits of the input transistor, which avoid using on-chip inductors whose noise performance is low. An analytical method, developed to improve the bandwidth of a single-layer microstrip patch antenna, was used for the design of the output matching network. Simulation results show an NF of 2.3 dB, a voltage gain of 26 dB, with S₁₁ and S₂₂ better than −10 dB at 1.42 GHz. The simulated performances of the designed LNA compare favorably with similar capacitive feedback LNAs.