Conductive filament shape in HfO₂ electrochemical metallization cells under a range of forming voltages

p+Si/HfO₂/Cu devices were fabricated on highly doped 〈100〉 p+Si substrates purchased from NovaElectronics (0.001 Ω m). Substrates were first cleaned in a buffered oxide etch solution (5:1 HF) for 30 s before loading in a Cambridge Nanotech Fiji atomic layer deposition (ALD) chamber. TMAHf was used as the Hf precursor and an O₂ plasma (300 W) was used as the oxidant. Fifty-six growth cycles consisting of a 25 ms TMAHf pulse, 20 s Ar(g) purge, 20 s O₂ plasma pulse, and 5 s Ar(g) purge were carried out at either 100 °C or 250 °C to deposit 30 nm of HfO₂ uniformly on the p + Si substrate. HfO₂ films of 5, 10, and 15 nm thickness were also grown by decreasing growth cycle numbers proportionally. Wafers were post-deposition annealed at 400 °C or 600 °C for one hour to induce crystallization in the HfO₂ films. XRD characterization was performed on a Rigaku Smart-lab diffractometer to assess crystal structure of the films. Ellipsometry and XRR characterization on a Rigaku Smart-lab diffractometer were carried out to confirm film thickness.

Resistance switching devices were defined photo-lithographically (figure 1) after cleaning the HfO₂ surface in acetone, methanol, isopropyl alcohol, and DI H₂O. To provide an isolation layer, a SiO₂ film (70 nm) was sputtered from a SiO₂ target (99.99% purity) in an Ar(g) plasma with 4% O₂ at a total pressure of 3 × 10^–3 Torr at 500 W. Base pressure in the deposition system was below 5.0 × 10⁻⁶ Torr and the target was cleaned for 20 min prior to deposition. The resulting deposition rate was ∼0.2 Å s⁻¹. A Cr film (10 nm) was subsequently deposited as an adhesion layer by e-beam evaporation. After lift-off in acetone and photoresist stripper, patterns for the copper electrodes were photo-lithographically defined. Copper was e-beam deposited (25 nm) across the edge of the SiO₂ pads to create 20 × 20 μm devices connected by a thin (5 μm wide) line to 400 × 400 μm probe pads, so that electrical testing of devices with W micro-probes could be achieved without directly contacting the device top electrode. Such contact was previously observed to introduce mechanical tears in the copper top electrode which might obfuscate electric field or current induced damage, as well as influence the filament forming process. Copper electrodes were intentionally thin (25 nm) in order to facilitate further experiments in which the copper electrode might be physically removed.

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Devices were formed at a range of 3–15 V under constant bias stress using a Keithley 4200 SCS parameter analyzer. A positive bias was applied to copper top electrode using a W probe tip (1 μm radius) applied to the contact pad and the bottom p+Si electrode was grounded in order to drive copper migration into the HfO₂ film. A compliance current of 100 μA was employed to limit destructive breakdown of the HfO₂ film. However, an overshoot current did flow through the cell for at least several 100 μs due to the time lag of the 4200 SCS internal circuitry.

Following electrical characterization, atomic force microscopic (AFM) imaging was used to characterize damage morphologies both before and after a wet chemical etch of the copper top electrode. First, tapping mode images were taken of the device top electrode using a Bruker Icon AFM with a scan rate of 0.5 Hz, and resolution of 384 pts/line. Any visible defects were imaged at higher magnification. The top electrode was then chemically etched away in a dilute 0.5% FeCl₃ (CE-100 Transene Electronic Chemicals) solution for 20 s. Post-etch, the area of bare HfO₂ where the top electrode had previously been located was imaged in conductive atomic force microscopy (c-AFM) mode using a conductive Pt-Ir AFM tip (MikroMasch HQ: NSC18/Pt, fo = 75 kHz, k = 2.8 N m⁻¹, coated tip radius < 30 nm) to obtain conductivity maps. A −5.0 mV bias was applied at the stage to which the sample was electrically connected via Ag paste, and the sensitivity range was 1 nA V⁻¹ with signal saturation at 12 nA. With these settings, the noise floor of the measurement circuit was approximately 5.0 pA.

Once filaments were located, continuous scanning of 2.5 μm × 625 nm areas using doped diamond coated tips (Bruker DDESP-V2, fo = 400 kHz, k = 80 N m⁻¹) with a set-point of (0.4–0.6) V allowed for serial removal of HfO₂ layers. Periodic 'wide scan' areas of 5 μm × 1.25 μm with a lower imaging set-point of 0.2 V were taken to measure the progressive depth of the resulting etch-well. AFM data was corrected for planar offsets using Gwyddion software package. Compilation of 2D scans into a 3D tomogram was accomplished using a cross-correlation function in MATLAB to sequentially align scans correcting for thermal drift, as well as including the topography data in the conductive signal of each scan.

We used a selective wet etch process to remove the Cu top electrode, revealing the dilectric layer, as well as damage in that layer. A solution of 35 wt% FeCl₃ and 6 wt% HCl (CE-100 Transene Chemicals) was serially diluted to 0.1 wt% FeCl₃ and the devices, with alignment marks protected with photoresist, were immersed in solution for 20 s until Cu was no longer optically visible. To verify the selectivity of the Cu etchant, AFM topography scans were performed on a region of patterned material that was partially protected by photolithography during wet etching. We investigated regions that (1) were protected by photoresist and therefore not exposed to Cu etchant, (2) bare HfO₂ films that were exposed to Cu etchant, and (3) HfO₂ films underlying Cu top electrodes which were exposed by the etching procedure. A comparison of these regions illustrated nearly complete removal of Cu electrode in the protected region coupled with no discernible difference in HfO₂ film thickness (to the sub-nm resolution) or average surface roughness. No occurrence of localized etch pits in the underlying HfO₂ films was observed.

Suites of HfO₂ films varying in thickness (5 nm, 10 nm, 15 nm, and 30 nm) and growth conditions were created to test effects of electric field and film microstructure. Thickness as fit from XRR data (S-figure 1 is available online at stacks.iop.org/NANO/31/075706/mmedia) and ellipsometry data (S-table 1) collected from 5, 10, and 15 nm as-deposited HfO₂ films were within 6 Å of nominal thicknesses. Growth conditions used to control film microstructure were varied between two ALD deposition temperatures (100 °C or 250 °C) and three post-deposition annealing conditions (no anneal, 400 °C, and 600 °C). Detailed microstructural results of these thermal processing conditions in 30 nm HfO₂ films are reported elsewhere [46], but in general resulted in a range of microstructure from amorphous to polycrystalline films with varying degrees of ($\overline{1}11$) orientation with increasing thermal budget.

Degree of HfO₂ crystallinity and texture was observed to vary as a function of ALD growth temperature, post-deposition annealing temperatures, and film thickness (table 1). In all cases, crystalline HfO₂ was observed in the stable low-temperature monoclinic Baddelyite structure (P2₁/c, #14). 30 nm thick films grown at 100 °C and annealed at 400 °C show no diffraction peaks in XRD, suggesting an amorphous film. Films grown at 100 °C crystallized upon annealing at 600 °C. Conversely, ALD deposition at higher temperature (250 °C) resulted in polycrystalline films with some dependence on film thickness. Powder XRD characterization showed polycrystalline structure in 30 nm films, but no discernible peaks could be found in 15 nm thick films grown under identical conditions. Instead, 15 nm films grown at 250 °C crystallized only upon post-deposition annealing at 400 °C. This crystallization at a lower annealing temperature than their lower temperature growth counterparts (400 °C versus 600 °C) indicates that some nuclei may have formed with a volume below the detection limits of the instrument. Therefore, HfO₂ film growth at 250 °C may result in nano-crystallites within an amorphous matrix which lead to full crystallization at a critical thickness between (15 and 30 nm). No meaningful peak intensity could be obtained in 5 nm and 10 nm films due to the limited volume of the films. Therefore, the crystallinity of these thinner film suites is inferred from results in 30 nm thick HfO₂ films. For clarity, films are referred to by their inferred crystallinity and growth conditions (growth temperature/post-deposition anneal temperature).

AFM characterization shows that areal root mean square surface roughness (S_q) of the HfO₂ films depends strongly on the roughness of the p + Si substrate (S_q < 0.2 nm), as well as on the deposition temperature, but very little on the post-deposition annealing temperature. In 30 nm films, an increased roughness is observed in subsets of films between initial growth temperatures, with films grown at 100 °C having similar roughness to the polished p+Si (S_q = 0.4 nm), and films grown at 250 °C showing increased roughness (1.2 nm < S_q < 1.32 nm; table 1). Interestingly, in thinner films (5–15 nm thick) grown at 250 °C, surface roughness is much smoother, again similar to the roughness of the substrate (0.21 < S_q < 0.31 nm). Post-deposition annealing temperature has little influence on the surface roughness of HfO₂ films in these thickness suites as well. Therefore, the roughness of the HfO₂ surface is primarily inherited from the roughness of the polished p + Si electrode, with the higher growth temperature (250 °C) causing increased roughness only once a critical film thickness has been reached (15–30 nm). Finally, because the surface roughness of the film is independent of film crystallinity and is relatively smooth, any changes in forming kinetics or conductive filament shape are ascribed to factors other electrode roughness.

Because the behavior of subsequent cycles is determined largely by the properties of the initial filament, this study focuses only on the morphology of the initially formed filament. Forming of conductive filaments was accomplished using a constant bias (V_form) applied to the top electrode and the time at which current rose precipitously to the compliance current taken as the forming time (t_form). As previously observed [46], forming times in HfO₂ films showed an exponential dependence on applied bias and were much shorter in polycrystalline layers than in amorphous layers due to the existence of fast migration paths along grain boundaries (figure 2(a)). However, a common forming voltage of 8 V was preserved in order to make direct comparison between polycrystalline and amorphous layers formed under identical bias conditions. Between HfO₂ films of different thickness, results in 10 nm thick HfO₂ films show similar trends with voltage and between processing conditions, albeit with a shift toward lower voltages, as expected from the scaling of the electric field with film thickness (S-figure 2). In fact, when the slope of forming time versus electric field is extracted, significant difference between slopes are obtained between microstructural suites, but not between different thicknesses of HfO₂ films with identical thermal treatments. In 5 nm thick films, significant differences in t_form are not observed between amorphous HfO₂ films (250 °C/400 °C) and polycrystalline films (250 °C/---). Because of the limited thickness of the film, lab XRD results could not confirm a difference in crystallinity between heat treatments. It is possible that at such limited thickness, the roughness of the bottom electrode and top surface serve to drastically reduce the migration distance in both cases.

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Current-time traces of devices selected for AFM imaging are representative of I–t curves obtained for the majority of devices formed, and show similar characteristics, regardless of the crystallinity of the HfO₂ layer (figure 2(b)). An initial decay in current associated with charging of the capacitance of the dielectric layer proceeds, followed by either an abrupt or step-like increase in current, until a final breakdown is achieved with current limited at 100 μA. We interpret these intermediate current jumps as the beginning of filament formation as ionic migration of Cu⁺ into the HfO₂ film creates additional sites for electronic Poole–Frenkel hopping conduction or trap assisted tunneling to occur. In some cases, sharp decreases in current are observed as in device C (figure 2(b)). In this case, these fluctuations are attributed to fluctuations in charge trapping and de-trapping. I–t curves in 10 nm films show similar characteristics. Both abrupt and gradual forming traces are observed (figure 2(b)) which may have implications for the initial shape and size of the conductive region.

Resistance of formed devices was measured after the forming operation and results show that as V_form decreases, the resistance of the formed device increases. Here, when devices are formed above 4 V, the resistance of the 'on-state', R_on does not scale with the set compliance current by ohm's law as expected, indicating some overshoot of the compliance current due to charge storage in parasitic elements of the test circuit [47]. Notably, R_on decreases as V_form increases both within and between HfO₂ films of differing microstructure (S-figure 3), so that resistance of the conductive filament is primarily controlled by the compliance current overshoot and indirectly, V_form, rather than the electric field across the dielectric or microstructure of the dielectric. Finally, the variability in R_on is uniform across all forming conditions and HfO₂ dielectric microstructure groups (σ ∼ 15 kΩ). Therefore, although the principal determinant of resistance state is I_cc overshoot, the source of variability could still have several sources: (i) changing capacitance of the test circuits between runs (ii) materials properties that limit ion migration (iii) materials properties that limit heat transfer.

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3.3.1. Device deconstruction

3.3.2. 3D Tomograms

Following this initial deconstruction, selected devices were chosen for further investigation to establish the 3D shape of the formed conductive filaments. While 2D scans can give insight into area scaling at the top of the filament and filament location, subsequent switching parameters (V_reset, V_set, and the resistance states) are determined by the narrowest diameter and shape of a filament which could be buried within the matrix of the dielectric layer. In 10 nm thick and 30 nm thick polycrystalline HfO₂ films with devices formed at 4 V and compliance current of 100 μA, no macroscopic damage to the Cu top electrode or to the underlying HfO₂ films was observed by optical microscopy. Instead, the filament location corresponds to a topographic hillock (2–17 nm) above the plane of the HfO₂ film. Devices formed under these conditions were therefore chosen to study conductive filaments in the absence of catastrophic dielectric breakdown mechanisms.

Etch-wells were created over the course of more than 100 scans until the bottom electrode was reached and identified by the appearance of weak conductive signal across the bottom of the well. Etch removal rates were variant over both space and time. As the diamond AFM tip removed material from the initial hillock during the first several scans, the overall height of the scan area was increased by 1 nm, rather than decreased, indicative of the redistribution of material from the original hillock position. Following this process, the depth of the scratch through well increased at a decreasing rate, related to the progressive dulling of the conductive AFM tip. A removal rate of approximately 0.1–0.3 nm scan⁻¹ was achieved with AFM set-point of 0.4 V, extracted by linear interpolation between the etch-well depth measured by periodic wide scans. In later cases, the contact force was gradually increased between wide scans in order to maintain a near constant etch rate. In all cases, the conductive signal saturates the AFM circuit (12 nA) and is contiguous throughout the scan area. Although drift of the conductive area is noticeable as an artifact of unavoidable thermal sample drift during AFM imaging over a period of several hours, the boundaries of the conductive region do not change drastically between individual scans—indicating a small spatial uncertainty. Because an excessive contact force is employed to remove HfO₂ during scanning, it unlikely that filament area is underestimated due to poor tip-sample contact.

Conductive filament shape was studied in three conductive filaments in 10 nm thick polycrystalline HfO₂ layers (250/400 °C). Reconstructed tomograms show a wide degree of variability in shape, but also show that the filaments are similar in size and share a few common features. Topography maps initially showed oblong conductive regions associated with hillocks with dimensions lengths (100–300 nm) and width (50–75 nm). As the diamond tip begins to etch into the HfO₂ surface, conductivity narrows and expands non-uniformly approaching the bottom electrode (figure 4). Moreover, the location of the conductive spot seems to be more readily removed with the progression of the initial hillock into a shallow pit at the location of the conductive region, indicative of material mechanically weaker and more defect filled than that of the surrounding matrix. In all cases, the overall dimensions of the conductive signal is smaller than the topographic features it is associated with, indicating that not all of the deformed and defect rich region is highly conductive. Topographic data simultaneously collected was used to correct the conductive signal of the scans, so that reinterpreted 2D bisection of the conductive volume yields the true shape of the filament (figure 4(d)). The final dimensions of the filaments is relatively similar with an overall oblong shape and maximum dimensions of (∼100 nm × ∼50 nm). Here, the largest dimensions of these 'filaments' far exceed the median grain size (∼25 nm) for these films, with even the narrowest points approaching the width of a single grain. Clearly, whatever route along a grain boundary ionic migration may have initially taken, this route was subsumed in the expansion of the filament laterally and vertically during forming. Here, the large temperature gradients caused by high current densities flowing through the nascent filament serve to broaden conductive filaments laterally and become the principal determinants of the maximum filament radii.

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Despite these similarities, a comparison in shape between three filaments formed under identical conditions shows the wide degree of variation in shape expected from measured device R_on values (table 2). In filament A, an inverted cone shape is apparent as conductivity narrows from the HfO₂ surface (0 nm) to the bottom electrode reaching ∼20 nm in diameter at its narrowest point, as can be seen in the tomogram (figures 4(a), (d)). Filament B is more cylindrical in nature, albeit with some regions narrowing around −3 nm. Filament C is the most distinctively different in shape from the others, with a narrow cylindrical shape which branches above the HfO₂ surface (figure 4(c)). At least one of the filaments (Filament A) demonstrates the inverse cone shape expected from the accepted electrochemical metallization model [6, 8], where the broad base of the cone is associated with the electro-active filament (in this case, Cu). This same structure has been observed previously in a conductive filament in an amorphous HfO₂ dielectric layer, where in this case, the electro-active electrode was metallic Hf [54]. Interestingly, in this study, observations of multiple conductive filaments results in other geometries which deviate strongly from this expected shape. This observation of deviation from the accepted model may stem from thermally driven filament broadening, while the wide range of shapes encountered in filament formed under identical electrical stress conditions could stem from (i) differences in initial ionic migration routes, due in part to the structure of the dielectric layer (ii) differences in heat transfer and thermal gradients through the oxide layer or electrodes [55], or (iii) differences in stored parasitic capacitances. Here, the final size and shape of the filament formed under the present electrical bias conditions (representative of device testing conditions in many other studies [56–58]) is likely determined by potent thermal driving forces during the broadening phase of the filament, which are themselves susceptible to several sources of variability.

The conductive filament shape formed under equivalent bias (V_form = 4 V) within a 30 nm thick oxide layer was also examined and compared with results obtained in 10 nm films. At lower electric field (1.3 MV cm⁻¹) in the 30 nm thick randomly oriented polycrystalline HfO₂ film (100 °C/600 °C), the conductive filament (figure 5) is larger in area as compared with the filaments in 10 nm films (figure 4), corresponding to the lower measured resistance of the device (table 2). The initial height of the hillock was 17.8 nm tall and required several scans itself to remove. The dimensions of the filament at its' largest point near the HfO₂ interface and at the bottom electrode are on the order of 150 nm × 50 nm. The filament's narrowest point (20 nm in radius) corresponds to the intersection of the HfO₂ surface, and rather than being the true shape of the filament, it is likely that redistribution of the material from the scribed away hillock limits the conductive signal area in this region. In contrast to the shape of the filaments in the thinner films, the area of the filament does not decrease progressing toward the bottom electrode, but instead remains fairly constant until splitting into several branches intersecting the bottom electrode (figure 5). Although the entire thickness of the film was not able to be removed before dulling of the diamond tip precluded further scratching (final depth of the well was 28 nm), it is likely that a continuation of the branches would be observed penetrating into the p + Si bottom electrode. As in the 10 nm thick films, the shape of the conductive filament deviates strongly from the expected inverse conical shape under the given electroforming conditions. However, given the variability observed between different filament shapes in 10 nm films (despite forming under identical conditions), it is important not to over-interpret distinctions between filaments observed in 10 nm films versus those observed in 30 nm films.

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In order to determine the relative impacts of V_form, electric field, and HfO₂ film microstructure on the deformation caused by uncontrolled mass flux during device forming, a combination of optical microscopy and atomic force microscopy was used to observe first the copper top electrode and then the uncovered dielectric layer. The extent of deformation lies along a spectrum from nm scale uplift of the Cu top electrode and HfO₂ layer deformation to micron scale catastrophic disruption and melting away of the top electrode, implicating thermal dielectric breakdown mechanisms. Importantly, the area of the damage scales with V_form and the scaling is relatively unaffected by HfO₂ layer microstructure or film thickness i.e. electric field (figure 6; S-figures 4–6).

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In all devices formed above 5 V, the copper top electrode appears to have melted in a ridge surrounding a depression in the HfO₂ layer (figure 6 inset). Optical Microscopy and AFM topographic imaging of device top electrodes revealed linearly increasing melt area as forming voltage increased within each oxide microstructure series in 30 nm HfO₂ films (figure 6). Between oxide microstructure series, and over the full range of forming voltages, a few common features were observable in dielectric breakdown spots. In amorphous oxides (100/400 °C), as the forming bias increases between 7 V and 14 V, the oxide breakdown observed on the edges of devices grows in area from ∼1 μm² at 7 V to ∼10 μm² at 14 V (figure 6). In oriented polycrystalline HfO₂ films (250/--- °C), damage areas range from (∼0.2 to 2) μm² at 8 V and 10 V, respectively. In the more randomly oriented polycrystalline film (100/600 °C) cumulative damage area scales from 500 nm² at 4 V to 2 μm² at 8 V. In many cases, devices in this film formed at (4–5) V showed no penetration of the copper top electrode optically. However, AFM imaging of the top electrode later revealed the presence of (10–30) nm hillocks which deformed, but did not penetrate the 25 nm thick copper top electrode.

The morphology of the breakdown in the HfO₂ dielectric layer is similar to breakdown morphologies observed in capacitance failure and gate oxide failures in MOS-caps. A small hillock (3–50 nm in height and 50–500 nm in width) is observed before and after the removal of the copper electrode in all samples (figure 3) and over all forming voltages. It is likely that this hillock represents the initial site of breakdown with damage irradiating outward from this site. In devices formed above 5 V, this hillock is surrounded by a pit, which in some cases penetrates into the p+Si substrate. The area and depth of this pit also scales with forming voltage, ranging from (∼1 to 3) μm² (figure 7; S-figures 4–6). Within each oxide microstructure series, the area of the damage scales with V_form (figure 7; S-figures 4–6), with the most dramatic breakdown structures observed in 30 nm amorphous HfO₂ films (V_form = 14 V) and minimized in polycrystalline films at 4 V with 'hillocks' 2 nm–30 nm tall. Thus, damage in the HfO₂ dielectric layer shows the same trends in scaling with V_form as top electrode melting and is indicative of redistribution of the dielectric layer along a spectrum, from simple expansion/extrusion at 4 V to increasing mass loss at 14 V.

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The primary mechanism for the massive damage of the HfO₂ layer and Cu top electrode observed optically and by AFM is frequently encountered in studies of capacitor breakdown and gate oxide breakdown, as well as during electrostatic discharge (ESD) events [49, 53, 59–61]. As the resistance of the device under test transitions from the initial high resistance state to the final low resistance state within hundreds of ns, parasitic capacitance in the testing equipment and the contact pad of the device (estimated around ∼1 nF), discharges a large current into the device. Measurement of discharge currents at ns time scales has shown that this overshoot can range from 10 to 100 times the compliance current [47, 62, 63]. The solution widely adopted includes integration of a transistor or diode lithographically connected to the device on chip, so that the area which accumulates stray capacitance is minimized. However, it has also been shown that parasitic currents can be limited via reduction of applied forming voltage indirectly by increasing the discharge time and reducing the amplitude of the discharge peak [64]. The magnitude of this current was not measured as in other studies, but can be estimated from the reset current (I_reset) obtained in the subsequent cycle by the relationship I_set ≈ I_reset. In tested devices, I_reset ranged between 1 mA and 10 mA, indicating that the parasitic current overshoot was at least 10 times greater than the set I_cc of 100 μA when V_form > 4 V. At it is lowest levels, this uncontrolled current discharge then causes local heating via joule heating, driving ion diffusion leading to broadening of the conductive filament. At the other extreme, temperatures reached are high enough to participate in a feedback loop of catastrophic dielectric breakdown. As electrons release heat passing through the dielectric layer, more defects are thermally created, which in turn allow even more electrons to flow through the breakdown location, eventually leading to the observed catastrophic breakdown structures.

Between HfO₂ films with different initial microstructure tested at an identical V_form (8 V), the morphology of the breakdown differs in shape and in location (S-figure 7). In amorphous HfO₂ films, damage occurs only at the edge of devices so that the central hillock is surrounded by a semicircle of missing HfO₂ material, penetrating down to 30 nm through the p + Si bottom electrode. In more oriented polycrystalline film, the site is within the interior of the device electrode, and encompasses a hillock surrounded by a bowl, again penetrating through the depth of the bottom electrode. Finally, in more randomly oriented polycrystalline films, several shallow sites are identified with a central hillock. The randomly oriented grain structure of the polycrystalline (100/600 °C) film provides for significantly different damage morphology than that observed in the amorphous (100/400 °C) and more oriented polycrystalline (250/--- °C) films. Copper migration is energetically favored along several different grain boundary pathways, leading to the observation of multiple breakdown spots. Moreover, the total device current is divided and reduced in each separate parallel branch in the case of multiple filaments, resulting in a smaller damage extent at each location. Therefore, while V_form is the principal determinant of damage area and depth, the microstructure of the oxide layer determines the location and multiplicity of disruption.

Although these observations of top electrode melting and oxide disruption dependence on V_form have already been extensively explored in the context of the wide body of dielectric breakdown literature, the implications for resistance switching device based studies are not inconsequential. While it has been demonstrated that parasitic discharges and I_set/I_reset can be controlled below 10 μA with lithographically integrated transistors or diodes [65], some amount of thermal energy dissipation is still required during reset operations or even during the initial filament forming operation. Many groups report relatively large compliance currents (I_cc ≥ 100 μA) in order to achieve stable R_on states and R_on/R_off > 10³ [24, 57, 66–69], suggesting that thermal dielectric breakdown mechanisms observed in this work might also be observed in studies in which large on/off ratios are reported with limited device cycles. As shown, these mechanisms are highly destructive to the oxide layer and contribute a large degree of variability in physical size/shape of damage spots, possibly occluding the impact of tested variables.