Table of contents

The color sensitivity of a thin-film phototransistor using a polycrystalline-silicon film with a p/i/n structure has been evaluated. First, the illuminance and voltage dependences of the detected current for white, red, green, and blue light are measured. It is found that the photoinduced current is proportional to the illuminance and that the detected current is slightly dependent on the applied voltage. Next, the conversion efficiencies from the colored light to the photoinduced current are calculated. It is found that the illuminance efficiency is considerably different for the different colors, whereas the quantum efficiency is similar for the different colors. The quantum efficiency is on the order of 0.1 but lower for the red light and higher for the blue light. This suggests that the electron–hole pairs generated by the red light have lower energy and tend to be recombined and disappear, whereas those generated by the blue light have higher energy and tend to be separated and contribute to the photoinduced current. The color sensitivity must be considered when the thin-film phototransistor is used in actual photosensor applications.

We report defect reduction in 50-nm-thick laser-crystallized polycrystalline silicon (poly-Si) films by a combination of hydrogen plasma at 100 W for 5 s at room temperature with 4.7×10⁵ Pa H₂O vapor heat treatment at 150 °C for 6 h. The present treatment increased the photoconductivity to 1×10^-3 S/cm for undoped poly-Si films under the illumination of 532 nm light at 100 mW/cm². It also increased the electrical conductivity to 30 S/cm for 2×10¹⁹ cm^-3 phosphorus-doped poly-Si films. Those values were comparable to those for samples treated with 1.3×10⁶ Pa H₂O vapor heat treatment for 3 h at 260 °C. Hydrogen concentration increased from 1.6 to 5.4 at. % as hydrogen plasma duration increased from 5 to 120 s. It was decreased by subsequent H₂O vapor heat treatment at 150 °C, and ultimately ranged from 1.1 to 4.5 at. %. Hydrogen atoms play a catalytic role in the dissociation of H₂O molecules at 150 °C.

A high-quality SiO₂ film was successfully achieved at a temperature of 150 °C by inductively coupled plasma chemical vapor deposition (ICP-CVD) with a bipolar pulsed bias applied to a substrate. When the SiO₂ film was deposited without the pulsed substrate bias, its density rapidly decreased and its insulating property deteriorated. However, its densification was enhanced and its insulating property was improved by the pulsed substrate bias even though the deposition rate increased. A leakage current of less than 10.0 nA/cm² and a breakdown voltage of 5.2 MV/cm at 1.0 µA/cm² were obtained at a temperature of 150 °C with a deposition rate of 18.0 nm/min.

We have investigated the electrical characteristics of short-channel p-type excimer laser annealed (ELA) polycrystalline silicon (poly-Si) thin-film transistors (TFTs) under high gate and drain bias stress. We found that the threshold voltage of short-channel TFTs was significantly shifted in the negative direction owing to high gate and drain bias stress (ΔV_TH = -2.08 V), whereas that of long-channel TFTs was rarely shifted in the negative direction (ΔV_TH = -0.10 V). This negative shift of threshold voltage in the short-channel TFT may be attributed to interface state generation near the source junction and deep trap state creation near the drain junction between the poly-Si film and the gate insulator layer. It was also found that the gate-to-drain capacitance (C_GD) characteristic of the stressed TFT severely stretched for the gate voltage below the flat band voltage V_FB. The effects of high gate and drain bias stress are related to hot-hole-induced donor like interface state generation. The transfer characteristics of the forward and reverse modes after the high gate and drain bias stress also indicate that the interface state generation at the gate insulator/channel interface occurred near the source junction region.

The changes in off-current under on- and off-state stress voltages in n-channel polycrystalline silicon (poly-Si) thin-film transistors (TFTs) are investigated through measurements and simulations. It is found that the off-current increases markedly in the shallow-negative-gate-voltage region and decreases in the deep-gate-voltage region after applying both on- and off-state stresses, resulting in a weaker dependence on negative gate voltage. It can be supposed from the simulations and experiments that the donor-type trap states (positive charges) with a hump-type state profile, located at 0.1–0.2 eV below the midgap, and tail states are generated near the drain junction after applying both stresses. The amount of donor-type states increases in phonon-assisted tunneling with the Pool–Frenkel effect (PAT) and Schockley–Read–Hall generation (SRH) owing to the increase in the deep-trap-state density, and decreases in band-to-band tunneling (BBT) owing to the decrease in electric field, giving rise to a predominant PAT+SRH current in off-current in a wide-negative-gate-voltage region.

We have investigated the charge trapping phenomena that occur in gate insulator biased under back-light irradiation of a liquid-crystal display. Two types of gate insulators (SiO₂ and SiN_x/SiO₂) were evaluated. In both cases, it was found that electron trapping in the insulators is caused by light irradiation under gate bias stress and that the locations of the electron trapping in gate insulator vary according to the kind of insulator and the polarity of gate bias. As for the dependence of degradation on stress time and luminance, the phenomena can be explained by an approximate equation derived from first-order rate equation. Furthermore, it was found that the analysis of the light-induced degradation is valid for evaluation of insulator quality. We confirmed that gate insulators formed in different deposition conditions have different light-induced degradation rates.

The lateral crystallization of silicon–germanium (Si–Ge) thin films on glass substrates was carried out by using a continuous-wave laser. The Ge composition x and its distribution in the films were characterized by micro-Raman spectroscopy. Average x values in two films were observed to be 0.38 and 0.06, which were nearly equal to 0.41 and 0.05 obtained by X-ray photoelectron spectroscopy. Cellular structures with ridges were observed in certain parts of both films, many of which oriented along the laser scanning direction. The lengths of especially long cells were >100 µm. Twin and grain boundaries were observed along the top of a ridge and the bottom of a valley, respectively. The mapping of the Raman spectra indicated that Ge segregates toward the grain boundaries. The formation of directed cellular structures can be explained by the constitutional undercooling model that is characteristic of alloys. The addition of Ge to Si thin films was found to be useful for enhancing lateral growth in Si-related thin films on glass.

The electrical characteristics of thin-film transistors (TFTs) fabricated by thermal plasma jet (TPJ)-crystallized microcrystalline Si (µc-Si) films have been investigated. Amorphous Si (a-Si) films were crystallized with the TPJ under the scanning speed (v) of 350 to 550 mm/s, and µc-Si TFTs were successfully fabricated with a 300 °C process. By reducing v, µ_FE increases from 3.2 to 17.1 cm² V^-1 s^-1, and V_th and S decrease from 9.2 to 5.2 V and 1.3 to 0.6 V/decade, respectively. The variations of µ_FE, V_th, and S were kept within small values of 1.06 (±4.4%), 0.14 (±1.1%), and 0.04 (±4.0%), respectively. The µc-Si is formed with ∼20-nm-sized randomly oriented small grains, and this isotropic nature results in very small variation of TFT performance. With decreasing v, the fraction of nano sized grains and disordered bonds at the grain boundary decreases, which results in improved TFT performance.

In this paper we will report successfully fabricated six transistor static random access memory (6T SRAM) cells using single-grain thin film transistors (TFTs). SRAM cells have been designed by analytical calculations and verified by DC and transient simulations. TFTs are fabricated by µ-Czochralski process that consists of making grain filter and Excimer laser crystallization at temperatures below 550 °C. The gate length of transistors are 2 µm. Fabricated SRAM cells based on single grain TFTs, show good read and write static noise margin (SNM and WNM) equal to 0.55 and 0.75 V at 3.3 V power supply, respectively. Finally, excellent read and write access times equal to 13 and 8 ns in 87 MHz worldline frequency were obtained.

Semiconductor blue-multi-laser-diode annealing (BLDA) for amorphous Si film was performed to obtain a film containing uniform polycrystalline silicon (poly-Si) grains as a low temperature poly-Si (LTPS) process used for thin-film transistor (TFT). By adopting continuous wave (CW) mode at the 445 nm wavelength of the BLDA system, the light beam is efficiently absorbed into the thin amorphous silicon film of 50 nm thickness and can be crystallized stably. By adjusting simply the laser power below 6 W with controlled beam shape, the isotropic Si grains from uniform micro-grains to arbitral grain size of polycrystalline phase can be obtained with reproducible by fixing the scan speed at 500 mm/s. As a result of analysis using electron microscopy and atomic force microscopy (AFM), uniform distributed micro-poly-Si grains of smooth surface were observed at a power condition below 5 W and the preferred crystal orientation of (111) face was confirmed. As arbitral grain size can be obtained stably and reproducibly merely by controlling the laser power, BLDA is promising as a next-generation LTPS process for AM OLED panel including a system on glass (SoG).

This study was the first to investigate the fabrication of yttrium–indium–zinc-oxide (YIZO) thin film transistors (TFTs) using the sol–gel process. YIZO thin films were made using various yttrium (Y) compositions from 10 to 20%. Thermogravimetry and differential scanning calorimetry (TG–DSC) data from the 15% Y sample revealed that the YIZO thin films crystallized above the temperature of 535 °C, much hotter than that of indium–gallium–zinc-oxide (IGZO) thin films. The best performance of YIZO TFTs was observed with a 15% ratio of Y to Zn: this yielded a saturation mobility of 1.12 cm² V^-1 s^-1, an on/off ratio of 4.61×10⁵, a threshold voltage of 0.54 V, and a subthreshold swing of 1.03 V/decade. This study also assessed the post-annealing temperature dependence of YIZO TFTs. The findings demonstrated the possibility of using Y to replace gallium (Ga), which has been used in previously reported solution-processed IGZO TFTs.

In this study, we analyzed the temperature-dependent characteristics of amorphous indium–gallium–zinc-oxide (a-IGZO) thin-film transistors (TFTs). We observed that a-IGZO TFTs obey the Meyer–Neldel rule (MN rule) at low gate-to-source voltage (V_GS) and the inverse MN rule at high V_GS, both of which can be explained by the statistical shift of Fermi level and electrostatic potential. Large Fermi level movement for small V_GS change and the inverse MN rule, which are hardly observed for conventional amorphous TFTs, indicate that there is a very low density of state (DOS) in the sub-bandgap region for a-IGZO TFTs and the performance of TFTs is not affected by contact characteristics, respectively. By using the field-effect method and considering surface band bending, we extracted the DOS in the sub-bandgap region, the distribution of which is clearly distinguished by deep and tail states. The calculated parameters for tail and deep states were N_ta = 3.5 ×10¹⁷ cm^-3 eV^-1, E_ta = 0.18 eV, N_da = 1.6×10¹⁶ cm^-3 eV^-1, and σ_da = 0.21 eV.

The origin of photo-leakage current of zinc oxide thin-film transistors (ZnO TFTs) under light irradiation was investigated using a light shield technique. The irradiation position dependence revealed that the effect of light irradiation is much stronger near the source region in the channel than near the drain region. This can be explained by the enhanced carrier injection from the source electrode. The irradiation near the drain region, on the other hand, simply induced photocurrent, which is much smaller than the carrier injection on the source side. Therefore, completely transparent ZnO TFTs under visible light irradiation will be obtained, if the carrier injection from the source electrode is successfully suppressed.

We fabricated an inverted-staggered amorphous In–Ga–Zn-oxide (a-IGZO) thin film transistor (TFT) and measured the temperature dependence of its characteristics. A threshold voltage (V_th) shift between 120 and 180 °C was as large as 4 V. In an analysis with two-dimensional (2D) numerical simulation, we reproduced the measured result by assuming two types of donor-like states as carrier generation sources. Furthermore, by ab initio molecular dynamics (MD) simulation, we determined the electronic structures of three types of a-IGZO structures, namely, "stoichiometric a-IGZO", "oxygen deficiency", and "hydrogen doping".

DC–DC converters integrated into a panel are proposed for mobile display applications using indium gallium zinc oxide (IGZO) thin film transistors (TFTs). The proposed positive DC–DC converter uses cross-coupled and diode-connected structures for a high output voltage and a high power efficiency, while the proposed negative DC–DC converter uses also a cross-coupled structure but with separated pumping capacitors for a negative output voltage and a high power efficiency. The simulated results show that the output voltage and power efficiency are 21.3 V and 69.5% for the positive DC–DC converter and -5.1 V and 56.1% for the negative DC–DC converter, respectively, at a supply voltage of 10 V and a load current of 250 µA. The measured results show that the output voltage and power efficiency of the proposed positive DC–DC converter are 20.8 V and 66.6%, respectively, under the same conditions as those for the simulated results.

We present two types of touch in-cell technology for active-matrix liquid crystal displays (AMLCDs) with liquid-crystal capacitance detector arrays embedded in a hydrogenated amorphous silicon (a-Si:H)-based backplane. The scanning method can determine and provide multiple simultaneous touch locations on the basis of the information extracted from each sensing element. On the other hand, the crossing method provides the position information from the coordinate information such that the system complexity and power consumption are expected to be considerably reduced. In both cases, by limiting the operation of sensors to the subthreshold region, we expect that the degradation of a-Si:H thin-film transistors (TFTs) will be suppressed and reliability will be ensured. Their relatively simple architecture enables the proposed touch-panel function to be readily integrated within large-area displays.

We designed, prototyped, and evaluated a liquid crystal panel integrated with a gate driver and a source driver using amorphous In–Ga–Zn-oxide thin film transistors (TFTs). Using bottom-gate bottom-contact (BGBC) thin film transistors, superior characteristics could be obtained. We obtained TFT characteristics with little variation even when the thickness of the gate insulator (GI) film was reduced owing to etching of source/drain (S/D) wiring, which is a typical process for the BGBC TFT. Moreover, a favorable ON-state current was obtained even when an In–Ga–Zn-oxide layer was formed over the S/D electrode. Since the upper portion of the In–Ga–Zn-oxide layer is not etched, the BGBC structure is predicted to be effective in thinning the In–Ga–Zn-oxide layer in the future. Upon evaluation, we found that the prototyped liquid crystal panel integrated with the gate and source drivers using the TFTs with improved characteristics had stable drive.

An active matrix touch sensor is integrated into a liquid crystal display (LCD) panel. The sensor is composed of a liquid crystal capacitor and a sensing circuit with amorphous silicon thin film transistors (a-Si TFTs). The change in sensor capacitance when the sensor is touched is converted into current change by the sensing circuit in the pixel. The proposed touch sensor is pressure-sensitive enough to work at an external push force of 10 gf. The simplified sensing circuit also gives an improved aperture ratio over that in previous work.

A voltage-programming-based pixel circuit with three thin-film transistors (TFTs) and one capacitor (3T1C) is proposed and simulated for active-matrix organic light-emitting diode (AMOLED) displays. Unlike the previously published voltage-programming pixel circuits, which only compensate for threshold voltage (V_T) unevenness, this circuit also compensates for mobility (µ) unevenness. OLEDs can be used not only as light-emitting devices but also as capacitors. This circuit uses the natural capacitance of OLEDs to compensate for the mobility unevenness. The Rensselaer Polytechnic Institute (RPI) model of smart simulation program with integrated circuit emphasis (SMART SPICE) is used to simulate the circuit. Moreover, we propose another pixel circuit that consists of three TFTs and two capacitors (3T2C). The additional capacitor allows control of the range of the data voltage of each color.

We have newly developed a 4.0-in. quarter video graphics array (QVGA) active-matrix organic light-emitting diode (AMOLED) display integrated with gate and source driver circuits using amorphous In–Ga–Zn-oxide (IGZO) thin-film transistors (TFTs). Focusing on a passivation layer in an inverted staggered bottom gate structure, the threshold voltage of the TFTs can be controlled to have "normally-off" characteristics with suppressed variation by using a SiO_x layer formed by sputtering with a low hydrogen content. In addition, small subthreshold swing S/S of 0.19 V/decade, high field-effect mobility µ_FE of 11.5 cm² V^-1 s^-1, and threshold voltage V_th of 1.27 V are achieved. The deposition conditions of the passivation layer and other processes are optimized, and variation in TFT characteristics is suppressed, whereby high-speed operation in gate and source driver circuits can be achieved. Using these driver circuits, the 4.0-in. QVGA AMOLED display integrated with driver circuits can be realized.

This paper shows that a part of a digital-to-analog conversion (DAC) function can be included in a pixel circuit to save the circuit area of an integrated data driver fabricated with low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs). Because the pixel-level DAC can be constructed by two TFTs and one small capacitor, the pixel circuit does not become markedly complex. The design of an 8-bit DAC, which combines a 6-bit resistor-string-based DAC and a 2-bit pixel-level DAC for a 4-in. diagonal VGA format active matrix organic light-emitting diode (AMOLED), is shown in detail. In addition, analysis results are presented, revealing that the 8-bit DAC scheme including a 2-bit pixel-level DAC with 1:3 demultiplexing can be applied to very high video formats, such as XGA, for a 3 to 4-in. diagonal AMOLED. Even for a 9- to 12-in. diagonal AMOLED, the proposed scheme can still be applied to the XGA format, even though no demultiplexing is allowed. The total height of the proposed 8-bit DAC is approximately 960 µm, which is almost one-half of that of the previous 6-bit resistor-string-based DAC.

A simple pixel structure using a video data correction method is proposed to compensate for electrical characteristic variations of driving thin-film transistors (TFTs) and the degradation of organic light-emitting diodes (OLEDs) in active-matrix OLED (AMOLED) displays. The proposed method senses the electrical characteristic variations of TFTs and OLEDs and stores them in external memory. The nonuniform emission current of TFTs and the aging of OLEDs are corrected by modulating video data using the stored data. Experimental results show that the emission current error due to electrical characteristic variation of driving TFTs is in the range from -63.1 to 61.4% without compensation, but is decreased to the range from -1.9 to 1.9% with the proposed correction method. The luminance error due to the degradation of an OLED is less than 1.8% when the proposed correction method is used for a 50% degraded OLED.

In this paper, we propose a new pixel circuit for organic light-emitting diode-on-silicon (OLEDoS) microdisplays. The proposed pixel circuit is composed of only two metal oxide semiconductor field-effect transistors (MOSFETs) and one capacitor in order to integrate the pixel circuit into the restricted pixel area (12.6×4.2 µm²). The proposed pixel circuit has a source follower structure that can control an extremely low emission current. The measured results show that the maximum deviation in the emission current of the proposed pixel circuit occurs at the highest gray level of 6 bits. The deviations in the measured emission current range from -0.9 least significant bit (LSB) to +1.0 LSB among 8 pixels.

See pdf for details

See pdf for details