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The ATLAS detector has been designed for operation at CERN's Large Hadron Collider. ATLAS includes a complex system of liquid argon calorimeters. The electronics for amplifying, shaping, sampling, pipelining, and digitizing the calorimeter signals is implemented on the Front End Boards (FEBs). This paper describes the design, implementation and production of the FEBs and presents measurement results from testing performed at several stages during the production process.

A complete modular data acquisition system based on a field programmable gate array (FPGA) and dedicated for high resolution, fast X-Ray elemental mapping has been designed and realized. The system is suitable for application with both X-ray (XRF) and Charged Particles (PIXE) excitation beams. Each board serves four channels and comprises an analog and a digital section. The analog section is composed of four semi-Gaussian shaping amplifiers with two software-selectable shaping times. The shaping times (150 and 450 ns) were chosen to perform either high rate or best resolution XRF measurements with state-of-the-art silicon drift detectors (SDD). The pulse amplitude is caught by four large bandwidth peak-stretchers whose outputs are multiplexed into a single 10 MHz 14-bit analog-to-digital converter (ADC). The FPGA operates at 48 MHz clock frequency and controls the whole process. The on-chip RAM stores the four acquired spectra. The spectra are sent to the host PC via USB2.0 interface. Custom made control software provides data visualization and analysis.

A 4 bit very low power and low incoming signal analog to digital converter (ADC) using a double sampling switched capacitor technique, designed for use in CMOS monolithic active pixels sensor readout, has been implemented in 0.35μm CMOS technology. A non-resetting sample and hold stage is integrated to amplify the incoming signal by 4. This first stage compensates both the amplifier offset effect and the input common mode voltage fluctuations. The converter is composed of a 2.5 bit pipeline stage followed by a 2 bit flash stage. This prototype consists of 4 ADC double-channels; each one is sampling at 50MS/s and dissipates only 2.6mW at 3.3V supply voltage. A bias pulsing stage is integrated in the circuit. Therefore, the analog part is switched OFF or ON in less than 1μs. The size for the layout is 80μm*0.9mm. This corresponds to the pitch of 4 pixel columns, each one is 20μm wide.

The ATLAS Level-1 Calorimeter Trigger uses reduced-granularity information from all the ATLAS calorimeters to search for high transverse-energy electrons, photons, τ leptons and jets, as well as high missing and total transverse energy. The calorimeter trigger electronics has a fixed latency of about 1 μs, using programmable custom-built digital electronics. This paper describes the Calorimeter Trigger hardware, as installed in the ATLAS electronics cavern.