High-Speed Nonvolatile MNOS/CMOS RAM

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Copyright (c) 1980 The Japan Society of Applied Physics
, , Citation Gary Derbenwick et al 1980 Jpn. J. Appl. Phys. 19 239 DOI 10.7567/JJAPS.19S1.239

1347-4065/19/S1/239

Abstract

Problems associated with MNOS RAM development are described. The write characteristics of a fast MNOS transistor under constant injecting field are presented and indicate that further speed improvements should result from increasing the injected current for a given write voltage rather than increasing the trap density in the nitride. The dependence of endurance upon several parameters is presented and an electrical screen for endurance is suggested. The major design features of a prototype 1 K×1 metal-gate MNOS/CMOS RAM chip are described.

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10.7567/JJAPS.19S1.239