Noise Reduction Methods for Large-scale Intensity-mapping Measurements with Infrared Detector Arrays

Intensity mapping observations measure galaxy clustering fluctuations from spectral-spatial maps, requiring stable noise properties on large angular scales. We have developed specialized readouts and analysis methods for achieving large-scale noise stability with Teledyne 2048$\times$2048 H2RG infrared detector arrays. We designed and fabricated a room-temperature low-noise ASIC Video8 amplifier to sample each of the 32 detector outputs continuously in sample-up-the-ramp mode with interleaved measurements of a stable reference voltage that remove current offsets and $1/f$ noise from the amplifier. The amplifier addresses rows in an order different from their physical arrangement on the array, modulating temporal $1/f$ noise in the H2RG to high spatial frequencies. Finally, we remove constant signal offsets in each of the 32 channels using reference pixels. These methods will be employed in the upcoming SPHEREx orbital mission that will carry out intensity mapping observations in near-infrared spectral maps in deep fields located near the ecliptic poles. We also developed a noise model for the H2RG and Video8 to optimize the choice of parameters. Our analysis indicates that these methods hold residual $1/f$ noise near the level of SPHEREx photon noise on angular scales smaller than $\sim30$ arcminutes.


INTRODUCTION
The history of galaxy formation can be studied using intensity mapping measurements of the near-infrared extragalactic background light.Galaxy clustering produces large-scale structure on the order of tens of arcminutes (Cooray et al. (2004), Kashlinsky et al. (2004)).The sources that comprise the background can be accessed using fluctuation measurements rather than galaxy-by-galaxy photometry (e.g.Zemcov et al. (2014)).Such intensity-mapping measurements promise to trace total light production, including diffuse and faint sources of emission, over the history of galaxy formation back to the Epoch of Reionization (Kovetz et al. (2017)).In order to optimize measurements of these large-scale background fluctuations, it is critical to minimize readout noise on tens of arcminute scales in astrophysical images.
The Spectro-Photometer for the History of the Universe, Epoch of Reionization, and Ices Explorer (SPHEREx) mission is an all-sky infrared (0.75-5.0 µm) survey satellite (Doré et al. (2014), Crill et al. (2020)) selected under NASA's Medium Explorer (MIDEX) program.Alongside other mission objectives, in deep maps, SPHEREx will study large-scale infrared extragalactic background structure.SPHEREx uses 6 Teledyne HAWAII-2RG (H2RG) HgCdTe sensors (Blank et al. (2012)), each with a 2048×2048 array of pixels.Included in this count is a frame of reference pixels which are not sensitive to light, consisting of the outermost 4 pixels surrounding the sensor.These reference pixels are designed to emulate the electrical response of a typical optical pixel, allowing them to be used to correct for dark current and electrical noise in an image.The array is divided into 32 2048×64 pixel channels, each of which is read out simultaneously row by row.Noise from the readout electronics can manifest itself as spatial 1/f noise when the H2RG array is read.
In order to minimize spatial noise on angular scale θ ≈ 30 ′ in intensity mapping observations, we present several new methods for reducing the effects of electronics 1/f noise."Row-chopping" reduces the effect of temporal 1/f noise by reading rows non-sequentially.Combined with multiple H2RG reference pixel samplings, we obtain significant noise reduction on the spatial scales of interest, optimizing large-scale background fluctuation measurements.We use a phantom pixel correction scheme based on measuring a stable reference voltage to remove dark current offsets produced by our custom ASIC amplifier.We validated these noise reduction methods first in a noise simulator and later in laboratory tests with a physical H2RG array.
In this paper, spatial noise power is expressed in terms of the spatial power spectrum P (k), which represents the azimuthally-averaged spatial power as a function of angular wave number.For SPHEREx detectors, each array pixel corresponds to 6.2 arcseconds of sky angle, resulting in a wave number k = 2π(6.2′′ /θ) in pix −1 units for an angular period θ.This paper is structured as follows: In Section 2 we describe the SPHEREx readout electronics and Video8 amplifier, and outline various noise reduction techniques.In Section 3 we describe a full noise simulator to model the electronics noise, followed by optimization of noise reduction techniques in Section 4. Section 5 compares the simulation outputs and modeled noise reduction with measured laboratory images.Finally, Section 6 summarizes our conclusions.

Readout Boards
The SPHEREx readout electronics consist of 6 identical readout boards (see Figure 1), a central electronics board (CEB), and a low voltage power supply.The boards are housed in a card cage and communicate with each other and the spacecraft via a backplane.Each readout board services a single H2RG array, providing bias, control signals, and readout via low-noise Video8 amplifiers (see Section 2.2) operated in 32-channel 100kHz mode.The channel blocks are 64 pixels wide (see Figure 2).The readout board logic and processor are embedded in an RTG4 FPGA, with a 3 Gbit SDRAM device providing on-board sample-up-the-ramp processing for all ∼ 4 million H2RG pixels.The processor, aided by dedicated logic, compresses and formats the sample up the ramp data before sending it to the spacecraft via the CEB.Each readout board also has a housekeeping system to monitor various voltages and temperatures.
The CEB interfaces with the spacecraft, communicates with the 6 readout boards, monitors 25 Cernox temperature sensors mounted on the telescope, and controls the temperature of the focal plane arrays via precision readout of 8 Cernox sensors and 16 bit control of 8 heaters.An RTG4 FPGA with an embedded processor orchestrates the CEB activity, which includes the generation of low-speed (38.4 kbaud) housekeeping telemetry and the booting of all the embedded processors using code stored in MRAM.
The H2RG bias supply is designed for stability and is housed in an oven-controlled region of the readout board to minimize thermal drifts.Each of the 32 H2RG channels sees a common bias voltage from this supply, resulting in any bias noise fluctuations or temperature offsets being repeated across all channels.

Video8 Amplifier
The Video8 amplifier is an Application-Specific Integrated Circuit (ASIC) designed at Caltech for SPHEREx.It interfaces preamplifiers and integrators between SPHEREx H2RG arrays and external RT2378-20 20 bit ADCs.The Video8 amplifiers are designed for stable operation over a wide temperature range from -50 • C to +50 • C. For SPHEREx, the Video8 devices are located within the instrument electronics box and do not require special cooling.A cryo-harness connects the H2RG detectors, operating at 50-80K, to the Video8 inputs.In order to minimize spatially correlated noise, the Video8 was designed for low 1/f noise and low channel-to-channel crosstalk.Table 1 summarizes the performance characteristics of the Video8 architecture.
The Video8 incorporates 8 fully differential readout channels, each composed of a preamplifier and a pair of integrators (Figure 1).The 8 channels are grouped into two banks of 4, with each bank being serviced by a single off-chip 20 bit ADC.The integrators box-car filter the signal for optimum noise performance, then perform a sample and hold.The two integrators associated with a given preamplifier operate in ping-pong fashion, with one performing an integration while the other holds a prior integration result for multiplexed output to one of the two off-chip ADCs.Multiplexing four channels to each ADC results in ADC operation at 400 kHz.The amplifiers and other internal circuitry of Video8 operate with a 5V supply voltage, while a separate 3.5V supply voltage determines the digital input signal voltage range.
Analog switches at the inputs to the preamplifiers provide flexibility for the input of reference and test levels.The inputs to the preamplifier are capacitively coupled and the feedback is purely capacitive, with a reset switch in parallel.Closing the reset switch nominally brings the preamplifier outputs to 2.5V.Additional capacitor/switch networks at the preamplifier inputs allow the preamplifier output levels to be adjusted, post-reset, in preparation for operation.The outputs of each preamplifier are connected through off-chip resistors to the inputs of a pair of integrators (see Figure 1).The feedback for the integrators is again purely capacitive with an associated reset switch in parallel.Switches at the integrator outputs multiplex the integrator signals for off-chip analog-to-digital conversion.The Video8 switches may be sequenced by external logic for optimal performance.Using off-chip resistors allows for some adjustment of the overall channel gain.With the use of low temperature coefficient (TC) resistors, the feedback capacitors (∼ 20ppm/ • C) dominate the temperature susceptibility.
The Video8 devices are manufactured using the C5N 0.5 µm CMOS process at Onsemi (ON Semiconductor), the same process used for manufacturing several ASICs designed at Caltech for prior space missions.Guard rings around groups of NMOS and PMOS FETs provide a "rad-hard by design" feature that boosts the latch-up threshold to >80 MeV/(mg-cm2), verified in test with heavy ions.The total dose tolerance has been verified up to 20 krad, well beyond the 7.5 krad SPHEREx lifetime requirement.The Video8 die size is 3.3x3.3mm, and each device is packaged in a standard 84 pin ceramic quad flat pack.Caltech and the NASA Jet Propulsion Laboratory worked closely on the Video8 space qualification, following the process for prior Caltech-designed space ASICs.We found that the SPHEREx readout noise timestream can be modeled by a noise power spectrum function p of the form: (1) The factors α and β correspond to the white and 1/f noise coefficients of the system, respectively.Here, γ is only used to model a component of excess noise in the readout integrated circuit (ROIC) amplifier, with the additional power of 1.3 being found to best match the measured noise data.

Generating Simulated Images
We determined the noise coefficients for each of the readout components by fitting α, β, and γ to a measured noise power spectrum (Table 2).Power spectra corresponding to the different noise components are show in Figure 4. We measured the ROIC amplifier white noise by correlated double sampling due to this noise component overwhelming other sources of noise at high sampling rates.For the Video8 and ROIC noise sources, we generate independent unique noise timestreams for each of the 32 H2RG channels.
Since the noise components of the bias supply act simultaneously across all channels, we generate a single bias timestream for the entire 32-channel image at the start of each simulation.We further split bias contributions into three components to model how they affect phantom pixel measurements (see Section 2.5).These consist of a "phantom uncorrelated" bias term which is only visible to the phantom pixel reads, a "phantom uncorrelated" bias term which is only visible to the array and not to the phantom pixels, and a "phantom correlated" bias term that is visible to both.There terms account for the fact that the phantom reference and the detector bias are partially correlated, with independent and common-mode noise.The magnitude of the independent components largely determines how effectively the phantom pixel correction method in Section 2.5 corrects for bias fluctuations in addition to its primary function of removing Video8 amplifier leakage current.Video8 3.71e-5 8.40e-3 0 ROIC amplifiers 1.97e-3 0 1e-1 Phantom correlated bias 0 8.80e-5 0 Phantom uncorrelated bias, visible to phantom pixels 0 3.64e-6 0 Phantom uncorrelated bias, invisible to phantom pixels 2.91e-6 3.07e-7 0 Note-Coefficients are calculated assuming a one-sided power spectrum convention With noise coefficients for all sources defined, we produce unique timestream realizations.Let R represent a random number with a uniform distribution on (0, 1) and let f s be the sampling frequency of the system (100 kHz).Given an arbitrary n x 1 two-sided power spectrum array p, n odd, we produce a timestream realization x corresponding to p by applying random phases to the non-DC components of the two-sided power spectrum components and taking an inverse Fourier transform as follows: φ = [e 2πiR0 , e 2πiR1 , ..., e 2πiR floor(n/2) ], (3)

Figure 1 .
Figure 1.(a) Overview of the SPHEREx readout electronics and (b) internal schematic of a single Video8 preamplifier channel, one of eight on the chip.Differential input lines are capactively coupled to a low-noise integrator, and the output is read with one of two sample and hold circuits.The Video8 input can be switched to a reference voltage intermittently to track amplifier drift.

Table 2 .
Measured best-fit noise components for SPHEREx readout electronics