Highly efficient operation and uniform characteristics of curved mirror vertical-cavity surface-emitting lasers

This study obtained highly uniform and efficient GaN-based vertical-cavity surface-emitting lasers with curved mirrors from a single wafer. The average threshold current (I th) and the optical output power (P max) of 14 chips measured up to 7.0 mA were 0.64 mA and 4.5 mW, respectively. The standard deviations of I th and P max were 6.7% and 5.1%, respectively. Additionally, the best chip showed maximum values of wall plug efficiency and output power of 13.4% and 7.6 mW, respectively, at 5.2 mA and 12.8 mA operating currents.

G allium nitride (GaN)-based vertical-cavity surfaceemitting lasers (VCSELs) have attracted attention in the field of semiconductor light emitters for several decades. 1) VCSELs offer several advantages, such as low power consumption, high-frequency operation, arraying capability, and a simpler fabrication process. Thus, GaN-based VCSELs are expected to be used in next-generation displays such as high-brightness projectors and mobile displays, 3D printers, laser processing, atomic clocks, novel light sources such as car headlights, and visible-light communications. 2) Near-infrared VCSELs composed of arsenide-and phosphide-based materials have been used in a variety of technologies, including optical communication, laser printers, and sensors. However, GaN-based VCSELs that emit light of shorter wavelengths, such as green, blue, and UV light, have not been practically used.
A VCSEL is typically a laser resonator with an active region with two distributed Bragg reflectors (DBR) at both sides. The DBR mirrors vertically confine light, which leads to resonance. Further, it can efficiently confine the current in the active layer to obtain inversion distribution and amplification. GaAs-based materials can satisfy such conditions. Light and current can be efficiently confined not only in vertical direction, but also in the lateral direction by providing a layer with a high Al composition and oxidizing from the lateral direction. Both DBRs are conductive, which easily establish the current path to deliver the carrier to the active region. Lattice matching is easily obtained as the DBRs and the oxidized layers are made of a material such as GaAs, AlAs, or a mixed crystal thereof, wherein lattice matching is easily obtained. Therefore, almost all parts of the structure can be obtained using only epitaxial growth. However, the situation around GaN-based VCSELs is completely different. Following the initial studies on the continuous operation of GaN-based VCSELs reported in 2008, 3,4) multiple types of structures for this device have been reported. One major structural type uses a hybrid-DBR scheme, wherein the top-side DBR comprises dielectric materials over a transparent electrode. [4][5][6][7][8][9] These materials are, for example, made from SiO2, Ta2O5, and indium tin oxides. Conversely, the bottom is composed of nitride-based semiconductor materials. 5) An example of this type of device is the AlN/GaN bottom DBR. 4) The report addressed the difficulty of this combination owing to the lattice mismatch between these two materials. A study adopted a bottom DBR of AlInN/GaN, where the composition of AlInN was precisely controlled to match the GaN's lattice constant. 6) This approach allowed lamination of these layers without cracks and enabled VCSELs with high wall plug efficiency (WPE) of 8.9% in 2018 7) and 13.5% in 2021. 8) These structures require a simple fabrication process because the bottom DBR, n-spacer, quantum wells, and p-spacer layers can be obtained by single-crystal growth using metal-organic chemical-vapor deposition (MOCVD). Further, all-dielectricmirror-type VCSELs, wherein mirrors on both sides comprise dielectric materials, have also been reported at multiple institutions. 3,[10][11][12][13][14][15] There are various approaches to forming this type of device. Initially, a structure wherein both the top and bottom mirrors were flat was proposed and laser oscillation was demonstrated. 3) Furthermore, milliwatt-class oscillations have been reported. 10) In recent years, a combination of flat and curved dielectric DBRs, reported in several studies, has shown significant improvements in device performance 2,[16][17][18] including the highest WPE of 9.5% in 2018 16) and the lowest threshold current (I th ) of 0.25 mA in 2019, respectively. 17) Despite abundant reports on the efficiency of these devices, intensive investigation on the dependence of uniformity of the device is limited. For the hybrid-DBR VCSELs, a lasing yield as high as 80% or more across a 2inch wafer has been reported, excluding the outer fringe. 8) Certain reports have highlighted challenges encountered when using this approach. One example is the roughness on AlInN layers in DBR, 19) which may be related to the intrinsic phase decomposition of this semiconductor alloy. 20) The low refractive index difference between AlInN and GaN provides a 10-20 nm-class narrow stop band of the DBR, which may result in degradation in the device yield owing to a shift in the reflectivity peak caused by the thickness error in DBRs. Regarding all-dielectric flat-mirror VCSELs, there is little discussion about uniformity. Dielectric DBR can easily achieve high reflectivity over a stop bandwidth of 100 nm or more owing to the high refractive index difference of the materials. However, the instability of cavity length control should lead to deterioration of yield. 10) Because the semiconductor layers grown on dielectric materials tend to suffer from crucial deterioration in crystal quality, in many cases, the bottom DBR is deposited by vacuum deposition both after forming p and n spacers, active region, top-side DBR, and after the substrate is thinly polished. This indicates that the cavity length is determined by the polishing process, which lacks nanometer-scale precision, although it is mainly provided by MOCVD in the case of the hybrid-DBR type. This is a crucial issue when the cavity is short. When the cavity length is 2-3 μm, as in typical VCSELs, the wavelength interval between the longitudinal modes is approximately 10-20 nm, 21) which is equal to or larger than the typical value of the gain width at the active layer. Thus, unless the cavity length is accurately controlled, the longitudinal mode tends to deviate from the gain peak, which hinders the laser oscillation. One possible solution is to extend the cavity length. The longitudinal mode spacing could be 1-2 nm when the cavity length is extended to, for example, more than 10 μm. In such cases, certain longitudinal modes should hit near the peak of the gain spectrum to facilitate lasing 21) without cavity length control, which would lead to higher yields of lasing. Although cavity extension with flat mirrors causes a fatal increase in the diffraction loss in the device, it can be eliminated by introducing a concave mirror on one side. In such a structure (see Fig. 1), the radius of curvature (ROC) of a concave mirror must be larger than the cavity length to obtain a stable resonator according to classical Gaussian optics. 22) The ROC determines the spot size of the light field. 21) No extra lateral loss should be introduced under conditions where the spot is subsumed within the current injection region. 18) From the above, concave mirror VCSEL with long cavity and dielectric DBRs is expected to have robustness against fabrication deviations in ROC and cavity length, and to exhibit uniform and stable device characteristics. In addition, this structure retains a stable resonance against tilt of mirrors, unlike in flat-mirror VCSELs which requires a perfectly parallel arrangement. That should further stabilize the laser characteristics of the devices. However, for such VCSELs, discussion on uniformity has been limited. Only a single report showed a lasing yield of 100% in 2019, 16) which still lacks detailed information on optical and electrical performances of the device. This study is the first one to investigate device uniformity with regard to current (I) versus light output power (L)/voltage (V ) curves for multiple devices obtained from a single test wafer with VCSELs with curved mirrors.
In this paper, the fabrication process has been concisely summarized as the details have been provided elsewhere. 21) First, an epitaxial layer comprising n-GaN, quantum wells, and p-GaN was formed on a several-centimeter wide {0001} GaN substrate. Next, ITO and DBR layers 10) consisting of 7.5 pairs of Ta 2 O 5 /SiO 2 formed by vacuum deposition were deposited on the front side mirror. Subsequently, a current aperture of 3 μm was formed using boron-ion implantation. 23) Thereafter, a metal electrode (Ti/Pt/Au) was deposited on both ITO and n-GaN exposed by reactive-ion etching; thus, a current path for injecting holes through ITO and p-GaN and electrons through n-GaN was established. The back surface of the wafer was polished to obtain a nitride plate with a thickness of approximately 24 μm. During reactive-ion etching (RIE) of GaN, a ball-up resin pattern with ROC of 33 μm was used as a sacrificial mask to monolithically fabricate curved surfaces on the backside of the (000-1) surface of polished GaN. The DBR of 14 pairs of Ta2O 5 /SiO 2 arranged by vacuum deposition formed a curved mirror on the rear surface of the device. Finally, the device wafer was configured p-up and fixed to the supporting wafer using bi-side sticky membrane. Figure 1 shows the structure of the measured device.
The values for the device dimension were measured using various methods. The thickness of the GaN substrate at 20 points after the polishing process, i.e. before the lens forming process, were measured by using a laser displacement meter (SI-T1000, Keyence). We adopted values that represent the cavity length by subtracting 2.0 μm, the over-etching depth during lens formation estimated through the preliminary measured RIE rate and set time, from these measured thicknesses. The dimensional profiles of the curved mirror of the fabricated device formed on GaN were measured using confocal laser scanning microscopy (VK-X 1000, Keyence). The ROC values were calculated by fitting an area of ±5.0 μm from the top of the lenslet to circle the least-squares method. ±5.0 μm is sufficiently larger than where the light field exists. 21) Five lenslets on the same substrate were measured, and their standard deviation was used to represent the variation in ROC of the obtained devices. Further, the morphology of the top of the curved mirror was observed using atomic force microscopy (AFM, Dimension Icon, Bruker). These measurements were conducted onto dummy patterns of lenslets, not the ones for devices, to avoid any impact on the device characteristics caused by the measurement.
To evaluate the variation of the characteristics, 14 devices were selected from a one-centimeter-wide area at the center of the wafer. The current-voltage (I-V ) and current-light output (I-L) curves of these devices on the wafer, before separating into individual chips were measured up to 7.0 mA with a power source (2912 A, Keysight) and photodetector (S1227, HAMAMATSU PHOTONICS) at room temperature. We obtained a percentage of the standard deviation divided by the mean to estimate the characteristic variation for parameters such as I th , slope efficiency and voltage. After the measurement, the selected devices were diced into individual chips (400 μm × 400 μm) and assembled into a 5.6j TO-can package with a p-up configuration. The emission spectrum and far-field pattern (FFP) were measured using a laser analyzing system (LD4200, ALPHAX) with the stage temperature controlled at 25°C by the Peltier element. The full width at half maximum (FWHM) of FFP emitted from the curved mirror VCSELs can be calculated from the cavity length, ROC, and wavelength 21,24) Figure 2 shows the I-V and I-L characteristics of 14 chips in a one-centimeter wide area. As shown in Fig. 2(a), the average voltage at 7.0 mA was 5.5 V with standard deviation of 0.35%. As shown in Fig. 2(b), the average threshold current (I th ) and optical output power (P max ) at 7.0 mA operating current were 0.64 mA and 4.5 mW, respectively. The standard deviations of I th and P max were calculated to be 6.7% mA and 5.1%, respectively. The average thickness was measured to be 29.0 μm with a standard deviation of 2.4% (N = 20). Thus, the cavity length is estimated to be in the range of 25.6-28.4 μm, assuming ±2σ and taking into account that it later becomes 2.0 μm thinner in RIE. Figure 3 shows the curved mirror structure observed using a laser microscope. Figure 3(a) shows a threedimensional view, and Fig. 3(b) shows a cross-sectional view cut by the green plane in Fig. 3(a). The ROC of this curved mirror was calculated by fitting it to be 32.1 μm  with a coefficient of determination of 0.996. The mean and standard deviation of ROC for multiple lenslets are 33.5 μm and 5.2% (N = 5). The morphology at the top of the curved mirror is shown in Fig. 3(c). The root mean square on the curved surface was 0.5 nm. Reference 25 indicated that sub-micrometer roughness yields only a negligible optical scattering loss of 0.1%. The ROC is sufficiently larger than the cavity length even considering their variations. Furthermore, the spot size of the light field (4σ defined in Ref. 21) is calculated to be less than 2 μm, which is sufficiently smaller than the current injection region. Therefore, the losses affecting threshold and slope efficiency are estimated to be almost constant and stable across these devices, which is consistent with the experimental results.
The chip with the highest P max among these chips was mounted on a 5.6j TO-can and evaluated. Figure 4 shows the current-WPE (I-WPE) and I-V/L characteristics up to 15 mA, yielding maximum values of WPE and output power of 13.4% and 7.6 mW, respectively, at 5.2 and 12.8 mA operating currents. The higher output optical power of this measurement than that of in-a-wafer measurement is considered to be due to the improved heat dissipation by the TO-CAN package mounting and the temperature control by the Peltier element.
The emission spectrum exhibited a single longitudinal mode of 442.3 nm as shown in Fig. 5(a). The measured FFP above I th is plotted in Fig. 5(b), which shows a single lateral mode with nearly the same FWHM of 13.3°and 13.5°in the horizontal and vertical directions, respectively. With the measured parameters such as wavelength, ROC of curved mirror and cavity length, the FWHM was calculated to be 11.6°, which are consistent with the measured value.
In conclusion, this study examined the optical characteristics of multiple VCSELs with curved mirrors and confirmed that these have high uniformity with standard deviations of I th and P max of 6.7% and 5.1% under a maximum current of 7.0 mA. The high-efficiency operation of WPE 13.4% at a 5.2 mA operating current was also confirmed as the best chip. This report suggests that a GaN-based dielectric curved mirror VCSEL achieves both high performance and uniformity.