Low turn-on voltage rectifier using p-GaN gate AlGaN/GaN high electron mobility transistor for energy harvesting applications

For the fixed p-GaN doping, the variation of p-GaN thickness has a significant effect on the threshold voltage of p-GaN gate HEMT. In order to tune the V_th close to 0 V, the relation between p-GaN thickness and V_th has been studied. The thickness of p-GaN was varied between 140 and 25 nm with the p-GaN gate length fixed at 6 μm. Figure 2 shows DC characteristics measured for each p-GaN gate HEMT. V_th is extracted as a gate-to-source voltage (V_GS) at the drain current density (I_D) of 1 mA mm⁻¹ at a source to drain voltage (V_DS) of 5 V and plotted as a function of p-GaN thickness in Fig. 2(a). As can be seen, no change of V_th occurs until p-GaN thickness is below 55 nm. With further decreasing p-GaN thickness, V_th decreases and finally reaches negative. As the p-GaN thickness decreases, the potential of the interface between p-GaN and AlGaN decreases. Therefore, the gate bias applied to the 2DEG channel increase, which results in highly effective 2DEG modulation and therefore a reduced V_th. ^27,28) In particular, for the p-GaN thickness of 35 nm, V_th as low as 0.05 V was obtained with a drain current of 100 mA mm⁻¹ at V_GS and V_DS of 5 V [Fig. 2(b)]. The cross-section transmission electron microscopy (TEM) image of the 35 nm p-GaN HEMT structure is shown in the inset of Fig. 2(a) which proves the accuracy of the ICP-RIE approach. In addition, a double-peak feature is clearly observed in the transconductance (g_m ) versus V_GS curve. The second peak indicates conductivity modulation of 2DEG channel by the p-GaN gate layer. The onset of hole injection induces more electrons at the channel to maintain charge neutrality, and therefore results in a significant increase of the drain current, which offers a solution for high current applications. ²⁶⁾ It should be noted that a thin oxide layer is observed between the 2 μm long gate electrode and p-GaN by TEM, which explains the high onset voltage of hole injection due to a non-optimized ohmic contact.

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The reverse current–voltage (I–V) measurement was also carried out to the gate-to-drain diode with the source floating. A reverse current as low as 50 nA mm⁻¹ was observed at the reverse bias of 200 V, which is the limit voltage of the current measurement setup.

35 nm thick p-GaN gate HEMT has exhibited an extremely low V_th and high on-state current potentials with hole injection, which is promising for low power-loss rectifiers. In this section, we demonstrate p-GaN gated anode diodes based on 35 nm thick p-GaN gate HEMT, aiming to realize low turn-on voltage and high on-state current simultaneously.

Since the forward current could benefit from the intrinsic gate p–n diode (exiting between p-GaN and 2DEG channel), we intentionally employed an elongated p-GaN layer of 54 μm to promote hole injections. Figure 3 compares I–V characteristics of p-GaN gated anode diode with different gate electrodes (Schottky and ohmic). As forward bias initially increases, devices with ohmic and Schottky electrode display identical current. When the forward bias increases above 1 V, the current of the ohmic gate device start to rise sharply, exceeding the device with Schottky gate significantly. In contrast, the Schottky gate device demonstrates a linear voltage dependent current. The additional current for the ohmic gate device is attributed to hole current which occurs when the gate p–n diode turns on. ²⁹⁾ For the current device, the turn-on voltage of the gate p–n diode is 1 V. It should be noted that the high reverse current of 0.2 mA mm⁻¹ and the resulted low rectification factor of 10³ (defined as the ratio of current for positive and negative voltage of 3 V) are related to the non-optimized gate ohmic contact, which can be improved by optimizing the processing conditions or employing different gate metals.

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To understand the contribution of the hole current to the total forward current, current components of the gated anode device were analyzed in Fig. 4. The total anode current can be decomposed into HEMT electron current (I_2DEG) and gate p–n diode hole current (I_{p–n diode}). When a positive bias was applied to anode, 2DEG turns on at V_th, which is determined by the p-GaN layer design, and increases with the forward voltage. After the forward voltage is above 1 V, dramatic increase of total current is observed. At this point, the gate p–n diode turns on and gradually dominates the total current. Therefore, I_{p–n diode} could enhance the total current without affecting the turn-on voltage, i.e. high current and low turn-on voltage can be obtained simultaneously. This is superior to other normally-off HEMT approaches, where either the forward current is inversely correlated with the turn-on voltage, or the complicated processing scheme is always needed for the recess-gate to etch the recessed region down to several nanometer. ^30–32) Furthermore, I–V characteristics of the ohmic gated anode diodes were compared for different p-GaN lengths (p-GaN thickness is fixed at 35 nm) in Fig. 5. As shown in Fig. 5(a), the I–V characteristics are divided into two regions, namely HEMT region and gate p–n diode region. In the HEMT region, the device with shorter p-GaN displays higher current while the opposite holds in the p–n diode region. This phenomenon can be well explained by the dominated current component in each region in Fig. 5(b). In region I, the forward current is inversely proportional to the p-GaN gate length, which is consistent with the 2DEG current of conventional HEMTs, indicating that the HEMT current from 2DEG channel dominates the total current. Besides, the p–n diode current is hardly observed. In region II, HEMT current becomes saturated. In contrast, gate p–n diode turns on and the corresponding current is proportional to the p-GaN gate length (i.e. gate area), which thus enables enhanced current for the 54 μm long p-GaN device. Therefore, the gate p–n diode is able to enhance the forward current by employing an enlonged p-GaN gate layer with an ohmic gate electrode.

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To demonstrate the present p-GaN gated anode diode beneficial for high-efficiency rectification applications, rectification characteristics of the gated anode of with 35 nm thick and 54 μm long p-GaN was measured and demonstrated in Fig. 6. Figure 6 (a) shows the testing circuit schematic where a load of 10 kΩ was used. As seen in Fig. 6(b), half-wave rectification was achieved without any signal distortions at an AC input signal of 1.5 V. Rectification of half cycle [box in Fig. 6(b)] is magnified and shown in Fig. 6(c). Thanks to the low turn-on voltage by our p-GaN designs, nearly zero-crossing is clearly observed for the gated anode diode, i.e. even close to 0 V AC signal could be rectified which is able to reduce the power loss.

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To showcase the potential of the demonstrated p-GaN gated anode diode for future rectifier applications, four of the p-GaN gated anode diodes (35 nm thick, 54 μm long) were monolithically integrated to form a full bridge rectifier. Figure 7 shows the testing circuit schematic where a load of 10 kΩ was used and the corresponding rectification characteristics. As seen in Fig. 7(b), full-wave rectification was achieved at an input signal of 1.5 V. In particular, the rectifier can operate properly at an input signal of 0.5 V as shown in Fig. 7(c), which is impossible for the current Si diodes. Furthermore, an input signal as low as 0.18 V can be rectified (not shown here). Such behavior is derived from the low turn-on voltage and high on-state current of the p-GaN gated anode diode demonstrated above. It should be noted that with further reducing the input signal, the output signal cannot be detected because of the high-level noise with the current testing setup.

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