ZrS2 symmetrical-ambipolar FETs with near-midgap TiN film for both top-gate electrode and Schottky-barrier contact

ZrS2 amibipolar MISFETs are obtained in operations with both electrons and holes. A layered polycrystalline ZrS2 thin film was formed by sputtering and sulfur-vapor annealing on a whole surface of a 2.4 cm × 2.4 cm SiO2/Si substrate. The ZrS2 FETs have Al2O3 gate insulator and TiN film for both the top-gate electrode and Schottky-barrier contact, which show symmetrical I d–V gs curves with a V off of 0.4 V contributed by the TiN film with midgap work function to the sputtered ZrS2 film. Notably, ambipolar FET operations because of both electrons and holes were successfully observed with an on/off current ratio of 250. This is an important step to realize n/p-type unipolar ZrS2 FETs.


Introduction
The scaling of silicon FETs has currently reached down to 5 nm technology node. Although new FET structures such as nanosheet, forksheet and n/p-stacked complementary FETs have been proposed for the sub-3 nm technology node, [1][2][3][4][5][6][7][8][9][10] it is very difficult for these structures to maintain device performances due to the mobility degradation caused by scattering mechanisms in a channel with a thickness of only a few nano-meters. Therefore, adoption of new materials with high mobilities even at the atomically thin thickness has been considered. Two-dimensional (2D) semiconductors have attracted intense attention because of their excellent electrical properties. In particular, 2D transition metal dichalcogenide films have unique electrical and physical properties, such as a high mobility and a steady band gap despite an atomically-thin thickness. [11][12][13][14][15][16][17][18][19][20][21][22][23][24][25][26][27][28] A zirconium disulfide (ZrS 2 ) film has reported to perform high mobilities of more than 1000 cm 2 V −1 s −1 and 700 cm 2 V −1 s −1 for electrons and holes, respectively, and a reasonable band gap of approximately 1.1 eV. [29][30][31] Although a chemical vapor deposition (CVD) method for the synthesis of ZrS 2 film has been reported, 32,33) a large area formation of this film has not been demonstrated yet. On the other hand, there has been a different attempt to use the sputtering method that achieves a uniform thickness with less contamination, and also fabrication of FETs has been demonstrated with this method. [34][35][36][37][38] It has been reported that a large-area film of layered-polycrystalline ZrS 2 with a high Hall-effect electron mobility of 1250 cm 2 V −1 s −1 was achieved by sputtering and sulfur-vapor annealing. 39) To realize CMOS logic circuits based on ZrS 2 films, both p-and n-type transistors are required. Although electron conduction has been observed in ZrS 2 films, hole conduction of a ZrS 2 film has not been demonstrated yet. For both electron and hole conductions, an intrinsic ZrS 2 channel film, low resistance contacts to the channel and appropriate gate metals for the channel are necessary. ZrS 2 MISFETs with both electron and hole conductions were preliminary demonstrated by using only a near-midgap TiN film for both the top-gate electrode and the Schottky-barrier contact. 40) In this paper, characteristics of an interface between the ZrS 2 and dielectric films, and a configuration of a bandgap for the ZrS 2 film are intensively discussed in details.

Experimental methods
TiN source and drain (S/D) electrodes with a thickness of 80 nm formed on an SiO 2 /Si substrate by sputtering and subsequent wet etching. A ZrS 2 film was formed using an ultra-high-vacuum radio frequency magnetron sputtering tool and a ZrS 2 target of 99%. 39) Then, sulfur-vapor annealing was carried out for sulfur compensation in which sulfur powder was evaporated at 250°C for 60 min, and wafers were heated at 700°C for 60 min in Ar flow under 100 Pa. 39) A 20 nm Al 2 O 3 gate insulator was deposited by atomic layer deposition (ALD) at 300°C using trimethyl aluminum and H 2 O precursors. Then, an active area was defined by photolithography and reactive ion etching (RIE). After those, a 60 nm SiN sidewall beside the active area was formed by sputtering and lift-off method, as shown in Figs. 1 and 2. A top-gate of the TiN film was also formed by sputtering and wet etching. Then, S/D contact through the Al 2 O 3 gate insulator were fabricated by RIE and sputtering. Finally, forming gas (F.G.) annealing was conducted at 300°C for 10 min.  voltages are obtained with and without F.G. annealing at a high V ds . Especially with F.G. annealing, ambipolar transfer characteristics at V ds of 1.0 V are confirmed.

Results and discussion
To confirm the insulation property of the Al 2 O 3 film, the I d , I s and I g -V gs characteristics of the ZrS 2 MISFETs obtained with and without F.G. annealing are shown in Figs. 4(a) and 4(b). Since the I d directly corresponds to the I s value at high V gs and the I g is sufficiently suppressed, the ALD Al 2 O 3 film shows good insulation behavior even on the ZrS 2 film. The I g appears to be independent of the gate voltage because of a floating channel voltage with a semiconductor-on-insulator structure of the ZrS 2 MISFET. 41,42) To elucidate the origin of the V th shift, the I d -V gs characteristics in forward and backward sweeps for the ZrS 2 MISFETs obtained with and without F.G. annealing are shown in Figs. 5(a) and 5(b). Regardless of the F.G. annealing, only a small V th shift is observed for a relatively high gate voltage range. It is speculated that the density of interface states between the Al 2 O 3 and the ZrS 2 films are very low despite the polycrystallinity of the sputtered ZrS 2 film. Therefore, it is considered that fixed charges in the Al 2 O 3 film play the dominant role in the V th shift. This indicates that positive fixed charges are reduced by the F.G. annealing resulting in the positive V th shift. In addition, the reduction of the off-current after F.G. annealing is considered to be because of the termination of an edge of the ZrS 2 channel by hydrogen.
To evaluate the drive current on F.G. annealing, the I d and I g -(V gs − V off ) characteristics of the ZrS 2 MISFETs obtained with and without F.G. annealing are shown in Fig. 6, where V off is extracted at the minimum I d . The I d values at high positive V gs − V off with and without the F.G. annealing are almost identical.
To confirm the saturation characteristics at negative and positive gate voltage ranges, the I d -V ds characteristics of the ZrS 2 MISFETs obtained with F.G. annealing are shown in Figs. 7(a) and 7(b), respectively. The Schottky-like I d curves are observed at the negative gate voltage, while at the positive one, I d shows Ohmic-like curves. Since a parasitic resistance at the negative gate voltage is larger than that at the positive one, it is speculated that a TiN work function approximately locates above the intrinsic energy level of the ZrS 2 film.
Ambipolar transfer characteristics, as discussed above, can be explained by the Schottky-barrier FET model, 43) as shown in Fig. 8. According to this model, the Schottky barriers for electrons and holes are controlled by the gate voltage. At a positive gate voltage, electrons mainly contribute to the current at a positive V ds . By contrast, at a negative gate voltage, holes mainly contribute to the current at the positive V ds . As discussed   To discuss the configuration of the band gap for the sputtered ZrS 2 film, the band diagrams are shown in Fig. 9. Since the TiN work function is located in the middle of the Si band gap, 44) it is predicted that the bandgap of the sputtered ZrS 2 film is surprisingly located at a shallower level than calculated one with a large electron affinity of 5.71. 45) Furthermore, it is speculated that the intrinsic level of the ZrS 2 locates a lower level than the TiN work function, which is consistent with the discussion on the gate stack above. These suggest that it is convenient to design the ZrS 2 FETs, comprehensively.
To evaluate the intrinsic drivability in the operation of electrons, parasitic resistances are extracted from the R total of the ZrS 2 MISFETs as a function of L ch at the V ds of 1.0 V, as shown in Fig. 10. An R ext of 0.038 GΩ cm and a 2ΔL of −1.5 μm were calculated with the Terada method. 46) To compare the difference in the conductivity between the holes and electrons, the g m -(V gs − V off ) characteristics without parasitic resistance of the ZrS 2 MISFETs are shown in Fig. 11. Here R ext and 2ΔL of electrons are applied even for hole operation. It is observed that the electron mobility is higher than the hole one, because the I d value at the positive V gs − V off is larger than that at negative one. This is consistent with that electron mass is approximately a half of hole one. 31) From these g m values, an electron field-effect mobility of approximately 0.001 cm 2 V −1 s −1 is calculated, which does not meet the previous report. 39) It is because that the Al 2 O 3 gate insulator film influences transport properties of the ZrS 2 channel as well as other reports, 47) and also the mobility can be deteriorated by the interface roughness between the ZrS 2 and Al 2 O 3 films which might be unfortunately enhanced by SiO 2 surface roughness during the bottom TiN-electrode formation. Table I shows the benchmarks of the ZrS 2 MISFETs obtained using different formation methods. It is observed

Conclusions
Chip-level-integrated ambipolar-ZrS 2 MISFETs were successfully achieved by sputtering and sulfur-vapor annealing. In particular, the FETs performed both electron and hole conductions with a smaller V off of 0.4 V. In addition, the band gap of the sputtered ZrS 2 films was predicted to be at a shallower level than the calculated value, which is advantageous for the engineering of the contact and gate metals. This study is an important milestone for the realization of n/p-type unipolar ZrS 2 FETs, and it is expected the more discussions to satisfy to precisely control the device operation.

Acknowledgments
This paper is partly supported by JST CREST and COI with Grant Nos. of JPMJCR16F4 and JPMJCE1309, respectively.

ORCID iDs
Masaya Hamada https://orcid.org/0000-0002-5830-5283  The band gap of the sputtered ZrS 2 film is speculated to be located at a shallower level than the reported band gap, 45) which is advantageous for the engineering of the gate and contact metals.