Abstract
Over the past two decades, different nanomaterials have been proposed for the design of novel silicon-based electronic devices or to push the performance of existing ones, leveraging the unique properties of charge carriers traveling in meso-to-nano scale structures.
Porous silicon (PSi) is the nano- (n-PSi) to micro- (m-Psi) structured form of silicon achieved by anodic etching of a silicon wafer in acidic HF-based electrolytes. However, the low mobility and reduced lifetime of charge carriers traveling in n-PSi have been mainly perceived such as a deterioration the bulk silicon properties, thus hampering the use of n-PSi in micro and nano electronics to date.
Here, we show that the integration of n-PSi in specific regions of a solid-state diode significantly improves both static and dynamic electrical performance of the diode, with respect to the unmodified device. Specifically, leveraging the unique mobility and lifetime of charge carriers traveling in the n-PSi layer, we achieve a significant increase of the breakdown voltage (>2x) and reduction of the turn-off time (about 30%). This improvement is shown to be robust with respect to n-PSi preparation conditions and diode typologies. Two dimensional (2D) TCAD simulations further corroborate that the improvement of the electrical performance of n-PSi modified diodes is related to the strong mobility and lifetime reduction of carriers in the nanostructured porous silicon layer. Remarkably, no significant drawbacks are observed after the peripheral integration of n-PSi in solid-state diodes, thus confirming the beneficial effect of n-PSi when employed for the modification of micro and nano electronic devices.
A. Paghi, L. M. Strambini, F. F. Toia, M. Sambi, M. Marchesi, R. Depetro, M. Morelli, G. Barillaro, Peripheral Nanostructured Porous Silicon Boosts Static and Dynamic Performance Of Integrated Electronic Devices, Advanced Electronic Materials 6, 2000615 (2020).