Abstract
Ubiquitous electronics is the seamless integration of smart systems into our everyday life and a cornerstone of the trillion-sensor vision. Wafer level bonding though 3D-integration could enable multi-sensor fusion with logic in a vertical high-speed package. However, such complex levels of integration require a robust understanding of the manufacturing processes influence on sensitive Micro-Electro Mechanical Systems (MEMS), such as residual stresses and trace impurities.
One promising wafer-level bonding method is Solid Liquid Interdiffusion (SLID) bonding, often referred to Transient Liquid-Phase (TLP) bonding. A reliable Cu-Sn SLID bonding at 320ºC has been demonstrated on numerous occasions. However, sub 250ºC bonding temperatures are of significant interest due to low processing temperatures and subsequent low thermally induced Coefficient of Thermal Expansion (CTE) induced global and local residual stresses.
This presentation reviews the recent results on Low Temperature (LT) Cu-In-Sn SLID process from Aalto University that exploits the In-Sn eutectic composition enabling low temperature processing, which results in a wafer-level bond with a high re-melting temperature of >600°C.
The outcomes of this work demonstrate: (i) an optimised LT-SLID process including processing parameters, (ii) resulting microstructural evolution and (iii) mechanical reliability (pre- and post-thermal annealing), such as tensile measurements and fracture surface analysis, to assess the LT-SLID bond stability.
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