Comparison of Dual-Stack Dielectric Field Plates on β-Ga 2 O 3 Schottky Rectifiers

The effects of bilayer field plates with various dielectric (SiO2/SiNx, Al2O3/ SiNx, HfO2/ SiNx) on Ga2O3 Schottky rectifier performance were investigated. The rectifiers were fabricated on 10 μm thick, Si doped (n = 2.8 × 1016 cm−3) β-Ga2O3 epitaxial layers grown by hydride vapor phase epitaxy on Ga2O3 Sn-doped substrates (n = 4.8 × 1018 cm−3) grown by edge-defined, film-fed growth. Temperature-dependent forward current-voltage characteristics were used to extract the average Schottky barrier height of 1.14 eV ± 0.03 eV for Ni, average ideality factor of 1.02 ± 0.02, and the Richardson’s constant of 48.1 A/cm2K2. The reverse breakdown and leakage current were the two characteristics predominantly affected by the field plate dielectrics. The highest reverse breakdown reached was 730 V for rectifiers with Al2O3/ SiNx, which was significantly higher than 562 V and 401 V for rectifiers with SiO2/ SiNx and HfO2/ SiNx, respectively. The on-resistance ranged from 3.8-5.0 × 10−3 -cm2, which was dependent on diode size, with diameters from 50 to 200 μm. This led to a power figure-of-merit (VB/RON) of 140 MW-cm2. Design of the field plate is crucial in determining where reverse breakdown occurs. © The Author(s) 2019. Published by ECS. This is an open access article distributed under the terms of the Creative Commons Attribution 4.0 License (CC BY, http://creativecommons.org/licenses/by/4.0/), which permits unrestricted reuse of the work in any medium, provided the original work is properly cited. [DOI: 10.1149/2.0391907jss]

2][3][4][5][6][7][8] In such cases, power electronics are responsible for the controlled transmission and conversion of electric energy for the appropriate end-use.Electronic switching devices based on materials such as Ga 2 O 3 , GaN, and SiC have great potential for these uses.GaN has recently found application for fast-charging of home electronics such as phones and laptops. 9To enable greater power savings than the current state of the art achieved with GaN and SiC requires ultra-wide bandgap materials such as Ga 2 O 3 (E g = 4.5-5.0eV). 10,11An advantage of Ga 2 O 3 is the ability to grow large, inexpensive substrates.High quality Ga 2 O 3 substrates have been successfully prepared using conventional melt growth techniques like floating-zone, edge-defined film-fed growth (EFG), and Czochralski methods.This will enable low-cost mass production of bulk β-Ga 2 O 3 , a clear economic advantage over GaN and SiC.3][14][15][16][17][18][19] As prices of wafers continue to decline with improvements to growth methods, adoption of Ga 2 O 3 comes closer to a reality.
The primary usage of Ga 2 O 3 will likely come in the form of low to medium frequency high-power switching applications (>1 kW).This arises due to Ga 2 O 3 providing a 2-3x fold improvement in critical electric field over SiC and GaN; however, the primary limitations of Ga 2 O 3 are its low electron mobility and low thermal conductivity.The low electron mobility is dominated by the high ionicity of the Ga-O bonds, which give rise to a 3x stronger Frölich coupling than found in GaN. 20Little can be done to increase the intrinsic electron mobility, however formation of Al x Ga 1-x O 3 /Ga 2 O 3 heterostructures may provide an avenue for improved mobility with the formation of a two-dimensional electron gas (2DEG) channel. 21To alleviate the poor thermal conductivity, epitaxial growth on sapphire has been pursued, which can produce dislocation free growth of the α phase, along with epitaxial liftoff techniques to highly thermally conductive metal supports. 18,22n the pursuit of high-power switching devices, vertical Schottky rectifiers fabricated on Ga 2 O 3 have already shown much promise, with records of V BR = 2300 V for large diodes and absolute forward current of 2 A. 23,24 At these early stages of development for Ga 2 O 3 rectifiers, edge termination methods have not been fully developed.6][27] For Ga 2 O 3 , thus far the primary avenues of improving the reverse breakdown has been through field plating with a single dielectric layer and trenching. 24,28he benefit of pursuing a dual stack, such as SiO 2 /SiN x , is the improved reverse breakdown as the SiO 2 absorbs the high electric field and provides for conduction and valence band confinement, while the highk dielectric lowers the field.
In this paper, we report on the effects of dual layer dielectric stacks on the performance of edge termination of Schottky diodes.The three dielectric stacks, Al 2 O 3 / SiN x , SiO 2 / SiN x , and HfO 2 / SiN x were compared in terms of reverse breakdown, ideality factor, SBH, and C-V.

Experimental
The bulk 2-inch n + β-Ga 2 O 3 (001) wafers were grown by EFG, doped with Sn at 4.8 × 10 18 cm −3 as determined by Hall effect measurements.A 10 μm (final thickness) Si-doped (2.8 × 10 16 cm −3 ) n-type epi layer was grown by HVPE.The epitaxial layers were subjected to chemical mechanical planarization to remove surface roughness due to the HVPE growth.The back surface was also polished to remove sub-surface damages and improve the ohmic contact.
Schottky rectifier fabrication began with full back side deposition of ohmic contacts, Ti/Au (20/80 nm) deposited by electron beam evaporation, subsequently annealed at 550°C in flowing N 2 for 30 seconds.Immediately prior to E-beam evaporation, the sample was treated with UV Ozone for 20 minutes and soaked in 1:10 HCl: DI water for 1 minute to remove environmental carbon contamination.
Prior to all dielectric depositions on the epilayers, the samples also underwent the UV Ozone cleaning for 20 minutes.The Al 2 O 3 , and HfO 2 layers were deposited at 200°C in a Cambridge Nano Fiji 200 atomic layer deposition (ALD) system to a thickness of 20 nm.For Al 2 O 3 , trimethylaluminum and H 2 O were used as the precursors.For HfO 2 , tetrakis(dimethylamido)-hafnium (IV) and H 2 O were used.40 nm of SiO 2 was deposited using a Plasma-Therm SLR Series plasma-enhanced chemical vapor deposition (PECVD) at 300°C using SiH 4 and N 2 O as precursors.360 nm of SiN x was deposited by PECVD at 300°C using SiH 4 and NH 3 as precursors on top of all three insulators.
The frontside Schottky contact window through the dual stacks was patterned using traditional photo-lithography and opened with buffered oxide etchant (BOE) at room temperature.The frontside Schottky contacts Ni/Au (80/300 nm) were formed by traditional solvent lift-off techniques and E-beam evaporation; the contacts were overlapped by 10 μm on the dielectric window to form a field plate, as shown in Figure 1 (top).A range of different sized circular diodes were tested with diameters from 50 -200 μm.An optical image of the fabricated diodes is shown in Figure 1 (bottom).Current-voltage (I-V) characteristics were collected using an Agilent 4156B semiconductor parameter analyzer.Capacitance-voltage (C-V) characteristics were collected using an Agilent 4284A precision LCR Meter.Temperature dependent measurements from 25 to 125°C were carried out on a Wentworth automated temperature-controlled chuck.

Results and Discussion
In order to compare the dielectric stacks fairly, the device properties must be similar, thus C-V measurement was carried out to determine the intrinsic carrier concentration.Figure 2 shows the 1/C 2 -V characteristics used to extract the n-type donor concentration from the slope of the linear regime of this data.The carrier concentration was in the range of 3-5 × 10 16 cm −3 in cases, indicating good uniformity.Figure 3a shows the temperature dependence of forward J-V characteristics from 25-125°C for the 200 μm diameter diodes with dielectric stack Al 2 O 3 /SiN x .The zero-bias Schottky Barrier height and ideality factor (η) were extracted by fitting of the thermionic emission model to the linear region of the J-V curves.The average ideality factor, barrier height and On/Off ratio are presented at room temperature for each dielectric stack in Table I.The ideality factor and barrier height were fairly invariant across each sample and indicate the passivation plays little role in determining on-state characteristics.The Al 2 O 3 /SiN x stack produced the closest to ideal diodes, with an average ideality factor of 1.02 and a SBH of 1.14 eV.From the J-V vs T curves, a Richardson plot, Figure 3b, was generated and produced a Richardson constant of 48.06 A•cm −2 •K −2 , which aligns with previous reports. 23,24,29,30The on-state resistance values extracted from the linear regime of the J-V curves ranged from 3.8-5.0× 10 −3 -cm 2 .These values are comparable to those found by Yang et al. (5.9 × 10 −4 to 0.26 -cm 2 ). 232][33] These are shown in Figure 4.For a lateral MOSFET, 1 eV conduction and valence band offsets are generally accepted as the minimum offset required for a dielectric.However, with a vertical diode, the same rule does not apply necessarily as the dielectric is primarily present to lower the electrical field induced at the edges of the diode to prevent premature reverse breakdown.Based on this assessment, it would be expected that regardless of passivation on the Schottky surface, the reverse leakage current would be similar between dielectrics under low electric field conditions as the passivation has yet to play a significant role.However, Figure 5 shows this is not true.Al 2 O 3 produces approximately an order of magnitude improvement in reverse leakage current.There are two primary reasons for Al 2 O 3 achieving lower leakage current than SiO 2 .The SiO 2 while having a larger conduction band offset than Al 2 O 3 was deposited by PECVD and even with deposition parameters optimized to reduce the DC bias voltage on the sample to essentially zero, there may be some plasma induced damage.First, a charge on an insulator can induce a mirror charge on the opposing side of the insulator as such during the deposition as charged ions deposit, there must be an equilibrium of charge. 34At the start of deposition, the SiO 2 layer is very thin and if the charge on the insulator is to exceed the breakdown capacitance of the  thin SiO 2 , that will produce conducting defects in the insulator layer.5][36] Post-PECVD annealing has been found to greatly improve the interfaces and insulators properties through reordering and removal of hydrogen content. 35,36im et al. performed a very similar comparison of ALD Al 2 O 3 and PECVD SiO 2 passivation, using SiGe as the substrate. 37Kim found the interfacial trap density to be more than an order of magnitude less for ALD Al 2 O 3 than PECVD SiO 2 and as a result the reverse leakage current was approximately 1 order of magnitude lower.
Figure 6 presents a set of reverse breakdown measurements on diodes for each dielectric stack.Al 2 O 3 /SiN x field-plated diodes exhibited the highest breakdown of 730 V.Under high electric field, the properties of both Ga 2 O 3 and the dielectric stack with the field plate become increasingly important.In our experiments, we noted that a defect would become visible after breakdown measurements on the field plate; indicating it is likely breakdown occurring at the edge termination region and not on the center rectifier region.At the edge of the Schottky contact, breakdown will occur when the electric field exceeds the critical breakdown strength of the Ga 2 O 3 epi layer or dielectric stacks.The electric field in the dielectric layer can be approximated from Gauss's Law (E low κ /E high κ = κ high κ /κ low κ ).Gauss's law predicts that the breakdown will likely occur in the low k material due to the elevated electric field.This could be the main cause of rectifier terminated with SiO 2 /SiN undergoing failure.HfO 2 has the lowest maximum breakdown strength as shown in Table II; therefore, the rectifier terminated with HfO 2 /SiN exhibits the lowest breakdown voltage.Likely, for both the HfO 2 and SiO 2 based field plates, failure is induced within these layers rather than within the nitride.
To determine which layer was failing in our highest performing field plate, Al 2 O 3 /SiN x , modeling of the estimated electric fields was performed via TCAD software FLOODS d.The model places the maximum peak at the edge of the field plate within the SiN x passivation, as shown in Figure 7. Key parameters for the simulation are presented     in Table II.For the maximum breakdown of 730 V, the simulation predicts a peak value of 12.2 MV/cm and 7.1 MV/cm within the SiN x and Al 2 O 3 , respectively.To verify which layer of the field plate was failing, metal contacts were deposited across each individual dielectric to form a capacitor and test the vertical breakdown of each dielectric.The SiN x capacitor in this formation withstood a field of 6.7 MV/cm and the Al 2 O 3 capacitor withstood a field of 8.7 MV/cm.This indicates that likely the SiN x layer was failing prematurely.This simulated result confirms our observation of a defect forming on the edge of the field plate during breakdown measurement and indicates the failure is likely within the nitride layer.The discrepancy of the simulated peak field and experimental can be attributed to the unknown taper angle of the wet etched field plate along with error in exact epi layer thickness that was achieved in chemical mechanical polishing of the test wafer.

Conclusions
β-Ga 2 O 3 Schottky diodes were fabricated with various dielectrics to delineate the effect of field plating parameters on the reverse breakdown.Al 2 O 3 /SiN x showed superior characteristics compared to HfO 2 /SiN x and SiO 2 /SiN x , due to the trade-off of bandgap and dielectric constant.Future efforts will focus on further tuning the field plate overlap length and dielectric thicknesses to maximize the reverse breakdown of the Schottky diode.These results discussed here provide a basis for comparing dielectrics based on their band alignments to Ga 2 O 3 and demonstrates the need and promise for advanced electrical field mitigation techniques.

Figure 3 .
Figure 3. (a) Temperature dependence of forward current characteristics from 25 to 125°C and (b) Richardson plot with an extracted Richardson constant of 48.06 A/cm 2 K 2 .

Figure 5 .
Figure 5. Low electric field J-V characteristics of 200 μm diameter diodes with varying dielectric stack.

Figure 7 .
Figure 7. Simulated electric field distribution of the test device with an Al 2 O 3 /SiN x field plate at avalanche breakdown.