Abstract
The presence of crystal originated particle (COP) on the 64 Mbyte dynamic random access memory (DRAM) device isolation region causes the current path between neighboring transistors, resulting in COP induced isolation failure. The probability of the COP induced isolation failure occurrence depends on the COP size; i.e., larger COP size leads to higher probability of failure. In addition, failure strongly depends on the process condition applied to the isolation structure, for example, the nitride film thickness; i.e., thicker nitride film results in a less probability of failure. Furthermore, failure also depends on the isolation structure itself; i.e., higher probability of the COP induced isolation failure follows local oxidation of silicon (LOCOS) > polysilicon space LOCOS (PSL) > selective polysilicon oxidation (SEPOX).