Contact resistance and mobility in back-gate graphene transistors

The isolation of graphene [1–3] in 2004 and, later on, of h-BN [4], phosphorene [5], $\text{Mo}{S}_{2}$ [6–14], ${\rm{WS}}{{\rm{e}}}_{2}$ [15–17], $\text{PdS}{e}_{2}$ [18, 19], ${\rm{PtS}}{{\rm{e}}}_{2}$ [20, 21] etc, has strongly attracted the interest of the material science community to the world of two-dimensional (2D) materials.

Graphene, the two-dimensional layer of carbon atoms arranged in a honeycomb lattice, is still one of the most studied 2D systems for the unmatched electron mobility, the remarkable current capability and thermal conduction, the relatively high optical absorption coefficient, the mechanical strength as well as the easy and low cost fabrication [22–27].

Graphene is commonly produced by exfoliation from graphite [28, 29], epitaxial growth on SiC [30] or chemical vapor deposition (CVD) [31, 32]. In particular, CVD produces uniform and large-scale graphene flakes of high-quality and is compatible with the silicon technology; therefore, it has been largely exploited to realize new electronic devices such as diodes [33–36], transistors [37–39], field emitters [40, 41], chemical-biological sensors [42, 43], optoelectronic systems [44], photodetectors [45–50] and solar cells [51].

Due to its gapless band-structure, with the valence and conduction bands touching each other at the so-called Dirac points, graphene originates ambipolar field-effect transistors with V-shaped transfer characteristics, dominated by a p-branch at negative and n-type conduction at positive gate voltage [52]. The ambipolar conduction can be an important feature for complementary logic applications; however, the limited on/off ratio caused by the absence of intrinsic bandgap is a significant obstacle and requires delicate material engineering for real applications [53–55].

Despite the several doping techniques available to tune the graphene conductivity and boost the performance of graphene transistors, a major problem remains the suppression of device on-current caused by the graphene/contact resistance [56]. Indeed, ohmic and low resistance contacts are important figures of merit for high frequency devices and the realization of stable and low-resistance contacts is still under intensive study [57–61]. The variation of the contact resistance, ${R}_{C},$ is attributed to many different causes, related to graphene growth and number of layers, metal type and deposition process, quality of the metal graphene/interface, measurement conditions, etc.

Conventional ohmic contacts between graphene and various metals exhibit rather large contact resistance ranging from few hundreds to thousands ${\rm{\Omega }}\cdot \mu {\rm{m}}.$ Studies have been conducted on various types of metal/graphene interfaces showing that the best contact resistances can be achieved with Ni and Cu contacts yielding ${R}_{C}\,$as low as $\sim 300\,{\rm{\Omega }}$ [62–65]. Although the choice of the metal type is an important ingredient for good quality contacts, recent researches have developed special techniques for the reduction of the contact resistance. The most successful strategies have been the modification of the contact area to increase charge injection through the graphene edges and the graphene etching under the contacts to favor the formation of dangling carbon-to-metal bonds. Contact resistances down to $100\,{\rm{\Omega }}\,\cdot \mu {\rm{m}}$ have been obtained in this way [63, 65–67]. Anzi et al [67] report that the under-contact graphene etching reduces the contact resistance both for Au and Ni/Au contacts. Smith et al [63] demonstrate a contact resistance dependence on the number of graphene cuts under the contacts. Similarly, Lisker et al [57] optimize the metal/graphene interface by incrementing the contact perimeter. A low contact resistance enables the study of intrinsic graphene properties and increases the performance of graphene devices. As the matter of fact, the contact resistance can be tuned by the application of a gate voltage (${V}_{gs}$), which modulates the carrier concentration of the graphene channel. In this scenario, the contact resistance becomes larger in correspondence of the Dirac points, where the graphene conductivity is suppressed [68, 69].

The temperature dependence of ${R}_{C}$ in graphene devices is still a controversial topic. A conspicuous number of studies report discrepant results evidencing either a negligible dependence of ${R}_{C}$ on T or strong changes of contact resistance with temperature [70–72].

In this work, we investigate the effect of back-gate voltage and temperature on the contact and channel resistance and on the carrier mobility in graphene field-effect transistors with Ni contacts. We fabricate back-gate devices with multiple leads which we analyze by both the transfer length method (TLM) [73–77] and the Y-function method [78–80]. The complementary application of the two methods leads to a more robust estimation of the contact resistance and of the gate-voltage dependence of the carrier mobility. We show that the gate voltage modulates the contact and the channel resistance in a similar way but has negligible effect on the carrier mobility. We also find that the field effect mobility decreases with raising the temperature, which does not affect the contact resistance, but can induce a transition from a semiconducting to a metallic behavior in the channel resistance, depending on the gate voltage. Finally, we show that eliminating the detrimental effect of the contact resistance can result in more than 80% increase of the field effect mobility.

Graphene synthesis has been performed on 200 mm Ge/Si substrates using Aixtron's Black Magic BM300T CVD tool. The synthesis was carried out at the deposition temperatures of $885\,^\circ {\rm{C}}$ using ${{\rm{CH}}}_{4}$ as source of carbon and ${\rm{Ar}}/{{\rm{H}}}_{2}$ mixture as carrier gas, at 700 mbar for 60 min Raman and micro-Raman mapping confirmed that the optimized fabrication process led to high quality, defect-free, and uniform graphene film over the whole wafer [57, 81]. The so-obtained graphene was then transferred on p-type doped Si $\left(5-20\,{\rm{\Omega }}\cdot {\rm{cm}}\right)$ capped with 100 nm ${{\rm{SiO}}}_{2}$ layer, patterned in long stripes by electron beam lithography (EBL) and dry etching, and finally covered by PMMA to prevent damages. Ni metal contacts were sputtered using a 50 W low-power process after keeping the sample degassing in vacuum at pressure $\lt {10}^{-8}$ mbar for 24 h. An annealing in 1:2 mixture of hydrogen and argon at 580 °C for 30 min was applied to further reduce the specific contact resistivity. The devices consist of patterned graphene stripes contacted with several parallel leads, at gradually increasing distances (${d}_{i}$). Structures with diverse combinations of the contact size, distance and/or shape, were fabricated and analyzed as well, with an example reported in figures 1(a), (b).

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Measurements at different temperatures were performed using a Janis probe station equipped with four metallic nanotips connected to the source-measurement units of a Keithley 4200 SCS (Tektronix Inc.), at pressure of $\sim 0.8$ mbar. The metal contacts were used as the drain and source electrodes while the $\mathrm{Si}/\mathrm{Si}{O}_{2}$ substrate as the back gate and the gate dielectric, respectively.

The schematic of figure 1(d) shows that the total resistance, ${R}_{T},$ obtained from the ${I}_{ds}-{V}_{ds}$ (drain-to-source current versus drain-to-source voltage) curves measured in a two-probe configuration between two given contacts, includes the contributions of the metal resistance, ${R}_{m},$ the contact resistance, ${R}_{C},$ i.e. the resistance at the 3D-metal/2D-graphene interface, and the channel resistance, ${R}_{channel}:$

$$\begin{eqnarray}&&{R}_{T}={R}_{channel}+2{R}_{m}+2{R}_{C}\end{eqnarray} \tag{ 1 }$$

The channel resistance can be written as

$$\begin{eqnarray}&&{R}_{channel}={R}_{sheet}\displaystyle \frac{d}{W}\end{eqnarray} \tag{ 2 }$$

where ${R}_{sheet}$ is the graphene sheet resistance in ${\rm{\Omega }}/sq$ ($sq={\rm{square}}$), W the width of the graphene stripe and $d$ the distance between the two chosen contacts. We can express the contact resistance in terms of the transfer length, ${L}_{T},$ that represents the distance over which most of the current ($1-1/e$) flows between the contact and the channel: ${R}_{C}={R}_{sheet}\tfrac{{L}_{T}}{W}$ [82]. Therefore, neglecting ${R}_{m}$ (order of magnitude lower than ${R}_{C}$ and ${R}_{channel}$), it results

$$\begin{eqnarray}&&{R}_{T}={R}_{sheet}\displaystyle \frac{d}{{\rm{W}}}+2{R}_{C}=\displaystyle \frac{{R}_{sheet}}{W}(d+2{L}_{T})\end{eqnarray} \tag{ 3 }$$

Equation (3) is used to estimate ${R}_{sheet}$ and ${R}_{C}$ from the straight-line fitting of a ${R}_{T}\,\mathrm{vs}\,d$ plot (TLM plot). The intercept of the straight-line with the horizontal axis $(-2{L}_{T})$ provides the transfer length. If ${L}_{T}$ is small compared to the size D of the contact, the current flows mostly through the edge of the contact (current crowding effect) and only the contact edge influences the carrier injection and the conduction in the graphene channel. In this scenario, there are only two possibilities to reduce the contact resistance: etching the graphene under the contact to increase the contact edges or increasing the perimeter of the edge, for instance using zig-zag shaped edges.

For two-probe configuration measurements, an alternative approach to estimate the contact resistance is the so-called Y-function method (YFM). The method includes the contact resistance in the expression of the transistor current ${I}_{ds}$ as a function of ${V}_{ds}$ and ${V}_{gs}$ (the gate-to-source voltage) [79, 83]:

$$\begin{eqnarray}&&{I}_{ds}=\displaystyle \frac{\displaystyle \frac{W}{L}\mu {C}_{ox}{V}_{ds}({V}_{gs}-{V}_{Dirac})}{1+\displaystyle \frac{W}{L}\mu {C}_{ox}{R}_{C}({V}_{gs}-{V}_{Dirac})}\end{eqnarray} \tag{ 4 }$$

where ${C}_{ox}$ is the ${{\rm{SiO}}}_{2}$ capacitance (${C}_{ox}=33\,nFc{m}^{-2}\,$ for 100 nm $\left.{{\rm{SiO}}}_{2}\right),$ $\mu$ is the field-effect mobility and ${V}_{Dirac}$ is the gate voltage corresponding to the Dirac point, i.e. to the minimum of the ${I}_{ds}-{V}_{gs}$ characteristic of the graphene transistor.

The ${V}_{gs}$ derivative of equation (4) represents the transconductance

$$\begin{eqnarray}&&{g}_{m}=\displaystyle \frac{d{I}_{ds}}{d{V}_{gs}}=\displaystyle \frac{\displaystyle \frac{W}{L}\mu {C}_{ox}{V}_{ds}}{{\left[1+\displaystyle \frac{W}{L}\mu {C}_{ox}{R}_{C}({V}_{gs}-{V}_{Dirac})\right]}^{2}}\end{eqnarray} \tag{ 5 }$$

and the ratio

$$\begin{eqnarray}&&\displaystyle \frac{{I}_{ds}}{\sqrt{{g}_{m}}}=\sqrt{\displaystyle \frac{W}{L}\mu {C}_{ox}{V}_{ds}}\,({V}_{gs}-{V}_{Dirac})=Y\end{eqnarray} \tag{ 6 }$$

is the so-called Y-function. Y results independent of ${R}_{C},$ while ${g}_{m}^{-1/2}$ depends linearly on $({V}_{gs}-{V}_{Dirac})$ with angular coefficient proportional to the contact resistance. Thus, the plots of ${I}_{ds}{g}_{m}^{-1/2}\,{\rm{and}}\,{g}_{m}^{-1/2}$ versus $({V}_{gs}-{V}_{Dirac})$ can be exploited to obtain the mobility $\mu$ (which is not affected by the contact resistance) and the contact resistance ${R}_{C},$ respectively.

Finally, taking the derivative of the Y-function in equation (6) with respect to ${V}_{gs}-{V}_{Dirac},$ we obtain the mobility unaffected by the contact resistance, which should be independent of ${V}_{gs}-{V}_{Dirac}:$

$$\begin{eqnarray}&&\mu ={\left[\displaystyle \frac{dY}{d\left({V}_{gs}-{V}_{Dirac}\right)}\right]}^{2}\displaystyle \frac{L}{W{C}_{ox}{V}_{ds}}\end{eqnarray} \tag{ 7 }$$

A two-probe configuration is adopted to measure the transfer (${I}_{ds}-{V}_{gs}$ curve at given ${V}_{ds}$) and output (${I}_{ds}-{V}_{ds}$ curves at selected ${V}_{gs}$) characteristics for different contact combinations. In figure 2, we report an example of such measurements for the $2\,\mu {\rm{m}}$ wide and $1\,\mu {\rm{m}}$ long graphene channel contacted with Ni leads of size $D\sim 3\,\mu {\rm{m}}$ and zig-zag shaped edges (see figures 1(a), (b) and the schematic of the device figure 1(c)).

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The transfer characteristic (figure 2(a)) displays an asymmetric ambipolar behavior with a dominant hole branch and a current minimum (Dirac point) slightly above ${V}_{gs}=0\,V.$ The different slope of the two branches corresponds to the hole mobility ($\sim 150\,{{\rm{cm}}}^{2}{V}^{-1}{s}^{-1}$) higher than the electron one ($\sim 100\,{{\rm{cm}}}^{2}{V}^{-1}{s}^{-1}$), while the slight shift of the Dirac point to positive ${V}_{gs}$ indicates a low p-type carrier concentration due to adsorbates and process residues such as PMMA, not removed by the 1 mbar vacuum and 400 K annealing [59, 84]. The hole-electron asymmetry is due to both unbalanced carrier injection from metal contacts and graphene interaction with the ${{\rm{SiO}}}_{2}$ dielectric [84–89]. The interaction with ${{\rm{SiO}}}_{2}$ is also the main cause of the hysteresis which appears when the gate voltage is swept back and forth [88–90]. The low mobility is also attributed to the fabrication process which needs further optimization. Figure 2(b) shows a linear ${I}_{ds}-{V}_{ds}$ behavior confirming the ohmic nature of the Ni/graphene contacts in the investigated voltage range. We intentionally limited the analysis to the triode region, as the achievement of a saturation regime would require operating the transistor at high drain bias and power dissipation, which would make the local temperature out of control.

Figure 3(a) shows the total resistance ${R}_{T}$ measured between multiple couples of leads of the TLM structure, at room temperature and under different gate biases, ranging from −40 V to 40 V. The TLM curves display the linear behavior predicted by equation (3) and are used to extract ${R}_{C}$ and ${R}_{sheet}$ as a function of the gate voltage ${V}_{gs}$ (figure 3(b)). Both parameters exhibit a non-monotonic trend with maximum values (${R}_{C}\sim 2.5\,k{\rm{\Omega }}$ and ${R}_{sheet}\sim 14\,k{\rm{\Omega }}/{\rm{sq}}$) corresponding to the Dirac point (${V}_{Dirac}\sim 0\,V$), and a decrease when the back-gate dopes the graphene by attracting electrons or holes in the channel. We highlight that figure 3(b) demonstrates how the gate voltage affects the graphene layer not only in the channel region but also under the contacts, as previously reported [91].

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${L}_{T}$ extracted from the ${R}_{T}\,{\rm{versus}}\,d$ plot ranges between $300\,{\rm{nm}}$ and $500\,{\rm{nm}},$ smaller the $3\,\mu {\rm{m}}$ contact size, thereby confirming that the device works under the aforementioned current crowding regime.

Remarkably, comparison with a similar device contacted by straight contacts, i.e. no zig-zag edges, measured in the same conditions, exhibits $\sim 400 \%$ higher contact resistance ($\sim 3.5\,{\rm{k}}{\rm{\Omega }}\cdot \mu {\rm{m}}$ versus $\sim 700\,{\rm{\Omega }}\cdot \mu {\rm{m}}$ at ${V}_{gs}=-40\,V$), confirming the importance of increasing the length of the contact perimeter.

Similar measurements were performed as a function of the temperature, T, in the range 90 K to 400 K. The linear behavior of the ${R}_{T}\,{\rm{vs}}\,d$ curves is preserved when the temperature is changed (figure 3(c)) but their slope decreases with increasing T. Figure 3(d) reports the temperature dependence of ${R}_{C}$ and ${R}_{channel}\,$evaluated at ${V}_{gs}=0\,V.$ ${R}_{C}$ remains constant over the 90–400 K temperature range while the graphene sheet resistance decreases, changing linearly from $\sim 22\,k{\rm{\Omega }}/sq$ at 90 K to $\sim 12\,k{\rm{\Omega }}/sq$ at 400 K with slope $d{R}_{sheet}/dT\sim -15\,{\rm{\Omega }}/K.$ The independence of ${R}_{C}$ on the temperature is confirmed also when ${R}_{C}$ is evaluated at ${V}_{gs}=-40\,\,V,$ as shown in the inset of figure 3(d). Conversely, a new feature appears in the temperature behavior of ${R}_{sheet}$ at ${V}_{gs}=-40\,\,V:$ the sheet resistance decreases until the temperature reaches $\sim 200\,{\rm{K}}$ and raises for $T\geqslant 200\,{\rm{K}}$ up to $\sim 4.8\,\,{\rm{\Omega }}/sq$ at $T=400\,\,{\rm{K}}.$ Otherwise stated, a transition from a semiconducting to a metallic behavior occurs in graphene around $T\sim 200\,\,{\rm{K}},$ consistently with what has been observed before [92–95]. Similar TLM analyses have been conducted on devices of the same chip with graphene channel $2\,\mu {\rm{m}}$ or $10\,\mu {\rm{m}}$ wide or with different layout. The estimated contact resistance, normalized by the channel width, ${R}_{C}^{* }={R}_{C}W,$ and sheet resistances are summarized in figure 4, showing a mean ${R}_{C}^{* }$ value of $\sim 2\,k{\rm{\Omega }}\cdot \mu {\rm{m}}$ and ${R}_{sheet}\sim 4\,k{\rm{\Omega }}/sq.$ We note that, owed to the zig-zag geometry, the TZ structure in figure 4 (which is the previously analyzed one), shows a normalized contact resistance as low as ${R}_{C}^{* }\sim 700\,{\rm{\Omega }}\cdot \mu {\rm{m}}$ at ${V}_{gs}=-40\,V$ within the range of the good quality contacts typically reported in the literature [63, 65–67]. Considering that the device-to-device fluctuations across the wafer are less than 30% [54], the improvement of the zig-zag geometry is highly significant. The differences in the sheet resistance shown in figure 4(b)) can be attributed to local variations of the transferred graphene foil and different damage induced by the fabrication process.

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We further exploited the TLM measurements to study the dependence of the field-effect mobility, $\mu ,$ on the channel length $d$ and the temperature. The mobility was estimated from the slope $\tfrac{d{I}_{ds}}{d{V}_{gs}}$ of the linear part of the transfer characteristics as

$$\begin{eqnarray}&&\mu =\displaystyle \frac{d}{W{C}_{ox}{V}_{ds}}\displaystyle \frac{d{I}_{ds}}{d{V}_{gs}}\,\end{eqnarray} \tag{ 8 }$$

Figure 5(a) shows the hole mobility as function of channel length, an increase of $\mu$ with $d$ appears for small $d$ with a further saturation at larger channel lengths.. Such a behavior can be expressed as $\mu ={\mu }_{0}\tfrac{d}{d+\lambda },$ where ${\mu }_{0}$ is the saturated mobility and $\lambda$ the mean free path [96]. From the fit of the experimental data, we obtain $\lambda$ $\sim 1\,\mu {\rm{m}}$ and ${\mu }_{0}\sim 175\,{{\rm{cm}}}^{2}{V}^{-1}{s}^{-1}.$ The saturation at channel length $d\gg \lambda$ corresponds to the establishment of a diffusive transport regime, while the mobility degradation at lower $d$ ($d\leqslant \lambda$) is an artifact due to the application of equation (8) in a regime where the transport becomes quasi-ballistic or ballistic [96, 97]. The influence of the temperature on the mobility, for the chosen device with $d=110\,\mu {\rm{m}},$ is shown in figure 5(b), which indicates that most of the mobility degradation occurs for $T\gt 250\,K$($\unicode{x00303}15 \%$ from its value at $90\,{\rm{K}},$ ${\mu }_{90K}\sim 195\,{{\rm{cm}}}^{2}{V}^{-1}{s}^{-1}$). This behavior can be understood considering that phonon scattering in graphene becomes relevant only at higher temperatures [98–100].

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The electron/hole mobilities evaluated from the numerical derivative of the ${I}_{ds}-{V}_{gs}$ curves according to equation (8), are plotted in figure 5(c) as function of ${V}_{gs}-{V}_{Dirac}$ (gate overdrive) for two channel lengths (1 and 10 $\mu m,$ respectively). The mobilities show a minimum at the Dirac point, reach a maximum for increasing overdrive and decrease smoothly for $\left|{V}_{gs}-{V}_{Dirac}\right|\gt 10\,V.$ The contact resistance, whose effect on the mobility is not eliminated in this type of analysis, could cause this decrease of $\mu$ with gate overdrive. To confirm such a hypothesis and obtain a more accurate $\mu$ versus ${V}_{gs}$ behavior, we considered the Y-function method as complementary approach to the TLM analysis.

From figure 6(a), we obtained a field effect mobility $\mu \sim 160\,{{\rm{cm}}}^{2}{V}^{-1}{s}^{-1},$ which together with the data in figure 6(b) yields ${R}_{C}=310\,{\rm{\Omega }}$ (or ${R}_{C}^{* }=700\,{\rm{\Omega }}\cdot \mu {\rm{m}}$). These values are consistent with the results from the TLM analysis.

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The plots of the mobility versus ${V}_{gs}-{V}_{Dirac}$ (figures 6(c) and (d) for $1\,\mu {\rm{m}}$ and $10\,\mu {\rm{m}}$ channel lengths, respectively) show that $\mu$ is unaffected by ${R}_{C}$ and is independent of the gate overdrive. The elimination of the contact resistance effect by the YFM confirms that gate dependence of the field-effect mobility is only an artifact of the TLM method.

We also note from figures 6(c) and (d) that removing ${R}_{C}$ results in significantly higher mobility, with over 80% increase.

In conclusion, we have fabricated and analyzed Ni-contacted graphene FETs and studied the back-gate and temperature dependence of the contact and channel resistance. We have measured devices with different geometrical structures and achieved competitive contact resistances using zig-zag shaped Ni contacts, also confirming the importance of contact geometry in the metal/graphene contact resistance.

We have found that the gate voltage modulates the contact and the channel resistance in a similar way but does not change the carrier mobility. We have also shown that raising the temperature decreases the carrier mobility, has a negligible effect on the contact resistance and can change the initial semiconducting behavior of the channel resistance into a metallic one, depending on the gate voltage. We used two complementary methods, namely the TLM and the YFM, to show that, eliminating the detrimental effect of the contact resistance, can almost double the carrier field-effect mobility.