Trench gate β-Ga2O3 MOSFETs: a review

Gallium oxide (Ga2O3) has emerged as a promising candidate for ultra-wide bandgap semiconductors for power devices due to its high breakdown field, large Baliga’s figure of merit, and cost advantage of large size bulk crystals over SiC and GaN. Trench technology has been widely used to develop the MOSFET structure to reduce internal resistance. Due to the absence of p-type doping Ga2O3, the trench gate process is adopted as one of the effective methods to decrease the n-channel thickness to ensure the channel is fully depleted under zero gate bias voltage to implement Enhancement-mode Ga2O3 MOSFETs. Trench gate β-Ga2O3 MOSFETs have gained increasing attention. This paper provides a comprehensive review of the recent progress in trench gate β-Ga2O3 MOSFETs, including vertical and planar MOSFET structures. Besides material properties and crystal growth, the device design and fabrication process of trench gate β-Ga2O3 MOSFET are discussed. The review of device performance involves the static characteristics, temperature-dependent, radio frequency, and switching properties of various trench gate β-Ga2O3 MOSFETs.


Introduction
Power electronics plays a crucial role in modern society. It finds various applications in electric power systems, energy storage, motor control, renewable energy, hybrid and electric vehicles, and a wide range of industrial controls. Silicon has been the semiconductor material of power electronics since the 1950s, but silicon power devices are reaching their fundamental material limits. Over the past 30 years, wide bandgap materials have drawn extensive attention in developing next-generation power semiconductor devices. As the most promising wide bandgap semiconductors, silicon carbide (SiC) and gallium nitride (GaN) have exhibited much higher breakdown voltage and lower conduction loss for a higher power efficiency than silicon [1].
Recently, gallium oxide (Ga 2 O 3 ) has emerged as a promising candidate for ultra-wide bandgap material for power devices due to its outstanding material properties. The breakdown field of β-Ga 2 O 3 can reach ∼8 MV cm −1 , and its Baliga's figure of merit relative to silicon is 3214, over three times of GaN and ten times of 4H-SiC [2,3]. Various device structures and fabrication technologies have been investigated to gain the intrinsic high breakdown performance of β-Ga 2 O 3 in the transistors. The research and development work on trench gate β-Ga 2 O 3 MOSFETs have attracted interest. Trench technology was used to develop the MOSFET structure to reduce the internal resistance by eliminating the JFET region of the planar gate MOSFET, and the ideal internal resistance value of power MOSFET can be almost achieved [4]. The operating frequency of power MOSFET was increased to the 1 MHz range by using and optimizing the trench gate structure [5]. Nowadays trench power MOSFET is one of the world's most popular power semiconductor devices. Adopting trench MOSFET technology to new semiconductor materials is very encouraging. The vertical trench gate MOSFETs of SiC [6][7][8] and GaN [9][10][11][12] outperform their planar gate counterparts with a lower on-resistance and higher power density. Currently, there is no report about p-type doping Ga 2 O 3 , and it is challenging to implement enhancement-mode (E-mode) Ga 2 O 3 MOSFETs. As one of the effective ways to reduce the n-channel thickness to ensure the channel is fully depleted under zero gate bias voltage, the trench gate process is used to fabricate E-mode Ga 2 O 3 MOSFETs.
In this paper, a comprehensive review of trench gate β-Ga 2 O 3 MOSFETs is provided. The material properties of β-Ga 2 O 3 are introduced in section 2. Melt bulk growth and epitaxial growth methods are described in section 3. Vertical and planar β-Ga 2 O 3 trench gate MOSFETs are discussed in sections 4 and 5, respectively. In the end, section 6 concludes this article and presents a perspective for future study.

Material properties of β-Ga 2 O 3
It is well known that there are five polymorphs of the Ga 2 O 3 single crystal, labeled as α, β, γ, δ, and ε [13][14][15]. The monoclinic phase, β-Ga 2 O 3 , has the most stable structure, and the other four phases could transform into β-Ga 2 O 3 at high temperatures [16].
The physical properties and figures of merit (FOMs) of β-Ga 2 O 3 and other more commonly used semiconductors are listed in table 1. The bandgap E g of β-Ga 2 O 3 is reported in the range of 4.6-4.9 eV and the high critical electric field E C of 8 MV cm −1 , which results in Baliga's FOM [17] being much larger than those of SiC and GaN. Higher Baliga's FOM indicates less conduction loss of power devices. The theoretical limit of onresistance of β-Ga 2 O 3 devices is lower than those of SiC and GaN devices at the same breakdown voltage as shown in figure 1. These material properties are beneficial for β-Ga 2 O 3 power devices with higher breakdown voltage than the SiC and GaN counterparts and promising potential in unipolar power devices. β-Ga 2 O 3 has a larger Johnson's FOM [19] than other semiconductors, representing its suitability for high-frequency power transistor applications. Huang's chip area manufacturing FOM (HCAFOM) shows a cost advantage of β-Ga 2 O 3 over SiC and GaN based on large-area native substrate availability [20]. The electron mobility of 300 -cm V s 2 1 1 Figure 1. Theoretical limits of on-resistances as a function of breakdown voltage for major semiconductors and β-Ga 2 O 3 Reproduced from [18]. © IOP Publishing Ltd. All rights reserved.  18 3 because of the domination of the polar optical phonon scattering. Table 1 also shows the drawback of β-Ga 2 O 3 , low thermal conductivity, which creates self-heating effects that must be alleviated when Ga 2 O 3 is utilized in high-frequency applications [3]. This disadvantage can be relieved by heterogeneously integrating β-Ga 2 O 3 film on SiC substrate for improved thermal performance compared with the β-Ga 2 O 3 bulk substrate [24]. Another problem for Ga 2 O 3 is the absence of p-type conduction due to the difficulty for single-crystal oxide semiconductors to form shallow acceptor states [25] and self-trapped holes [26], which results in very low hole mobility and associated high effective hole mass [27].
However, the deep acceptor doping of β-Ga 2 O 3 with Mg and N can form a p-type layer, and a potential barrier is created in n-type Ga 2 O 3 for the p-n junction formation for voltage blocking or guard rings for edge termination [28]. Therefore, β-Ga 2 O 3 is considered to have great potential for high power and high voltage applications due to its ultra-wide bandgap, high breakdown voltage, and large Baliga's FOM. From an economic perspective, β-Ga 2 O 3 is also attractive with its high HCAFOM.

Melt bulk growth and epitaxial growth methods
β-Ga 2 O 3 bulk single crystal can be grown by melt-based methods, including floating zone [29], Czochralski (CZ) [30], vertical Bridgman [31], and edge-defined film-fed growth (EFG) [32]. Currently, the large-size and highquality single crystal β-Ga 2 O 3 wafers for high-volume production are mainly grown with the EFG method [33]. The high growth rate of 23 mm h −1 [34] from CZ process was reported to produce β-Ga 2 O 3 single crystals. Now n-type and semi-insulating β-Ga 2 O 3 wafers with high quality manufactured from CZ and EFG bulks are available commercially [25].
The epitaxial growth of β-Ga 2 O 3 films has been implemented by molecular beam epitaxy (MBE), halide vapor phase epitaxy (HVPE), and metalorganic chemical vapor deposition (MOCVD). MBE was commonly used in the early days for the epitaxial growth of β-Ga 2 O 3 films. The advantages of MBE are high-purity film growth with abrupt interfaces [35] and controllable doping over a wide range ( --10 10 cm 16 19 3 ) [36]. Based on the applied oxygen source, MBE consists of ozone MBE [37,38] and plasma-assisted MBE [39][40][41]. 3 ) can be grown by HVPE at a high rate [42,43]. So far vertical Ga 2 O 3 transistors fabricated on Si-dopedn -Ga 2 O 3 drift layers grown on Sn-doped + n -Ga 2 O 3 (001) substrates by HVPE have been widely reported [44][45][46][47]. Compared to MBE and HVPE, MOCVD was reported to provide a high-quality film of β-Ga 2 O 3 with a fast growth rate using trimethylgallium precursor [48,49], and room temperature electron mobility in the range of 150 image. An + n contact layer,n drift layer and + n substrate stacking structure is adopted with the mesa/trench ratio of approximately 1/2. This trench gate device structure is similar to that of the reported vertical β-Ga 2 O 3 FinFETs [54], but there is no + n contact layer in the FinFETs, and the mesa/trench ratio of the FinFETs is very small. By simply adjusting the mesa width or donor concentration in the mesa area, this device structure can be utilized in normally on and off FETs.
The fabrication process of this vertical trench gate β-Ga 2 O 3 MOSFET [44] is depicted in the flow charts shown in figure 3. Some general processes related to β-Ga 2 O 3 will be discussed in this section. As shown in figure 3 (2), inductively coupled plasma-reactive ion etching (ICP-RIE) was used to shape the trench structure. The ICP-RIE method for β-Ga 2 O 3 is summarized in table 2. Zhang et al [55] used an ICP-RIE system to apply ICP power to a coil to inductively create a high-density plasma and RIE power on the chuck to direct the reactive ions to the β-Ga 2 O 3 substrate. They confirmed that the ICP-RIE mechanism could balance the physical and chemical etch components of dry etching for β-Ga 2 O 3 with BCl 3 /Ar plasma gas, reaching the maximum etch rate of 175 nm min −1 with nearly vertical sidewalls and smooth etched surfaces [55]. These features of the ICP-RIE method are important for the fabrication of vertical power devices with high performance. As listed in table 2, Lee et al [56] reported a significant enhancement of the etch rate of β-Ga 2 O 3 to over 1000 nm min −1 achieved by the ICP-RIE process with the BCl 3 and BCl 3 /Cl 2 gas mixture. Shah et al [57] investigated the low temperature-dependence of the ICP-RIE method for β-Ga 2 O 3 with BCl 3 /Cl 2 /Ar plasmas in the temperature   range of 22°C to 205°C. Okumura et al [58] used an ICP-RIE process with a nickel-hard mask and BCl 3 /Cl 2 plasma gas in the fabrication of vertical β-Ga 2 O 3 Schottky barrier diodes. A smooth sidewall in the mesa structure was attained at an etching rate of 77 nm min −1 . As illustrated in figure 3 (3), a HfO 2 gate dielectric film was deposited on n-type β-Ga 2 O 3 layers by atomic layer deposition (ALD). ALD is a vapor phase technique that produces thin films of various materials based on sequential and self-limiting reactions, which originate the advantages of conformality and control on materials' thickness and composition over chemical vapor deposition (CVD) and physical vapor deposition (PVD) techniques [59]. Wheeler et al [60] reported that ALD high-k dielectrics of ZrO 2 and HfO 2 (E g between 5.5-6 eV for both [61]) on n-type β-Ga 2 O 3 produced staggered gap alignments with conduction band offsets greater than 1 eV, and no hysteresis in the ZrO 2 films and small hysteresis in the HfO 2 films in the capacitance-voltage In step (8) ohmic contacts were formed on the heavily doped β-Ga 2 O 3 with a deposition of Ti/Au metal stack followed by annealing in N 2 at 450°C for 1 min, which is a reliable process widely used for the fabrication of ohmic contacts to β-Ga 2 O 3 [69,70]. A low specific contact resistance (r c ) is required for high-quality ohmic contacts to minimize the device on-state resistance and conduction loss. Typically for wide bandgap semiconductor devices, the value of r c is in the range of -W --

DC characteristics and ways to improve
The DC output characteristics of the vertical β-Ga 2 O 3 trench gate MOSFET are shown in figure 4 (a), which exhibited a clear current modulation characteristic. The device was measured 250 -A cm 2 in current density at a drain voltage of 1.4 V and a gate bias of 0 V. The specific on-resistance R on sp , was 3.7 W m .cm , 2 1.0 W m .cm 2 higher than the theoretically estimated value of 2.7 W m .cm . 2 The device transfer characteristics at a drain voltage V ds of 1.5 V is presented in figure 4 (b) with a small on/off current ratio ( / I I on off ) of 10 . 3 The steep slope of the curve in the gate voltage (V gs ) range from −10 V to −20 V indicates that an apparent current leakage begins at a V gs of around −20 V. Figure 4 (c) illustrates the gate leakage characteristic at V ds = 0 V, and a large leakage current appears at V gs = −20V.
Sasaki et al [44] suggested lower R on sp , could be attained by increasing the doping concentration of + n contact layer by adopting other growth methods (such as MBE growth [73]) or Si-ion implantation [74], and the / I I on off ratio of 10 3 and breakdown voltage (10-20 V) could be increased by changing the deposition method of the SiO 2 isolation layer to reduce the gate leakage. The device technologies of vertical β-Ga 2 O 3 trench gate MOSFET are still in the early stage of development, and it shows a lot of space to explore to improve the performance of the device. Plasma-enhanced chemical vapor deposition (PECVD) [75] could replace the RF sputtering process for the deposition of the SiO 2 isolation layer, and the alternative isolation/passivation could be ALD Al 2 O 3 [76] or SiNx deposited by PECVD [77,78]. In the recent development of vertical β-Ga 2 O 3 MOSFETs, the design with a current aperture and planar gate has been successfully implemented [46,47]. This structure could be adapted to a single trench gate vertical β-Ga 2 O 3 MOSFET, and more investigation is needed.

Device design and process
Most early β-Ga 2 O 3 transistors work in D-mode since the absence of p-type doping causes no inversion layer [79]. Different solutions have been developed to fabricate E-mode β-Ga 2 O 3 MOSFETs to make n-channel accumulation-mode devices. One approach is to decrease the channel thickness to ensure the channel fully depleted under zero gate bias voltage [68], including β-Ga 2 O 3 on insulator (GOOI) field effect transistors [80][81][82] and gate recess process [83][84][85]. The gate recess process is also used to enhance the performance of D-mode planar β-Ga 2 O 3 MOSFETs [78,86,87]. A typical cross section schematic of the planar β-Ga 2 O 3 trench Gate MOSFET with gate recess process developed by Green et al [86] is shown in figure 5. A Si-doped β-Ga 2 O 3 layer was homoepitaxially grown by MOVPE [86], MBE [85] or MOCVD [78] on a Fe-doped [85,86] or Mg-doped [78] semi-insulating substrate. In the gate recess process, highly doped β-Ga 2 O 3 was firstly removed in the gate region by ICP-RIE etching. As a passivation and field plate separation layer, a SiO 2 layer was then deposited by PECVD [86]. A trench gate structure was formed after SiO 2 layer on the gate region. Following the gate-recess, a gate dielectric layer of Al 2 O 3 or SiO 2 [85] was deposited by an ALD system. Afterward, a gate electrode was formed by evaporating Ni/Au [86,87]. Metal stack of Ti/Al/Ni/Au [86] or Ti/Au [78,83] were evaporated to form source and drain electrodes, followed by annealing in N 2 at 470°C. Ti/Au was also used to fabricate electrodes by lift-off patterning process [78,87]. As shown in figure 6, Dong et al [83] fabricated an unintentionally doping (UID) β-Ga 2 O 3 buffer layer between the Fe-doped substrate and Si-doped channel by MBE growth to protect the channel from Fe outdiffusion. If the channel is Si-ion implanted, the UID β-Ga 2 O 3 buffer layer can also defend it against charge compensation by suppressing Fe out-diffusion from the substrate [89,90]. Except for the homoepitaxial growth layers, β-Ga 2 O 3 thin films heterogeneously growing on the 4H-SiC or Si (001) substrates by ion-cutting process were developed by Xu et al [91]. Later the same group fabricated the heterogeneous recessed-gate Ga 2 O 3 -on-SiC (GaOSiC) MOSFETs [87], as shown in figure 7, to effectively improve thermal performance compared with the β-Ga 2 O 3 bulk substrate [92]. The ion-cutting process includes hydrogen ion implantation on a β-Ga 2 O 3 wafer, argon ion bombardment on a 4H-SiC substrate, bonding them as a GaOSiC wafer, then annealing and exfoliation, and finally, a CMP of the bonded wafer.  [88] investigated the impacts of trench gate depth on the dc characteristics of the planar β-Ga 2 O 3 MOSFETs. They got E-mode and D-mode operations with different trench gate depths. As summarized in table 3, the E-mode device with a deeper trench depth has a higher V br than the D-mode operation, while a larger I ds,sat was achieved with the D-mode device.

Device performance
The temperature-dependent performance of heterogeneous Ga 2 O 3 -on-SiC planar trench gate MOSFET in figure 8 was investigated by Wang et al [87]. The stable electrical characteristics of the transistor with a source to drain distance L sd of 11 μm at temperatures varying from 25°C to 200°C was reported recently. Figure 8     temperature-dependent R on and drive current performance of the GaOSiC MOSFET were illustrated in figure 8 (g). A stable R on with the temperature increasing to 100°C was achieved. Figure 8 (h) presents the temperaturedependent V br characteristics of the device with a L sd of 11 μm. The breakdown voltage V br of 1014 V and 945 V at the temperature of 25°C and 200°C were measured respectively. There is no apparent degradation of V br when the temperature rises to 200°C, and a stable P-FOM of 100 -MWcm 2 was achieved. For the planar trench gate GaOSiC MOSFET with a L sd of 3 μm, a high P-FOM of 174 -MWcm 2 with a peak g m of 19.15 mS mm −1 was reported [87].
In addition to the DC output and transfer characteristics, Green et al [86] investigated the radio frequency performance of the trench gate device in figure 5. Figure 9 (a) presents cutoff frequency (f T ) and maximum oscillating frequency (f max ) as a function of drain voltage. By implementing a new highly doped ohmic cap layer and a sub-micron gate recess process, the f T of 3.3 GHz and f max of 12.9 GHz were achieved, and all measurements with the gate voltage set to the peak transconductance value of 21 mS mm −1 . Figure 9 (b) shows the measurements of an input power sweep performed at 800 MHz with passive source and load tuning, and output power (P out ), power gain (G p ), transducer gain (G T ), and power-added efficiency (PAE) were measured to be 13.7 dBm (0.23 W mm −1 ), 5.1 dB, 1.8 dB, and 6.3%, respectively. These results exhibit the potential of β-Ga 2 O 3 MOSFET in the circuit application of monolithic or heterogeneous integration of power switches and RF devices [86].
The switching performance is essential for power MOSFETs in integrated circuits. Dong et al [83] investigated the switching characteristics of β-Ga 2 O 3 MOSFET for the first time. The E-mode planar trench gate MOSFET shown in figure 6 was measured to have a threshold voltage V th of 4.2 V, on-state resistance R on of 364 Ω mm, and / I I on off > 10 . 7 Figure 10 (a) illustrates the dynamic test circuit with an external gate resistance R g of 15 Ω, a load resistive R L of 4.95 kΩ, DC bias V DD of 20 V, and a pulse generator providing gate voltage from 0 V to 10 V. The turn-on and turn-off switching waveforms are shown in figure 10 (b) and (c). The turn-on time t on (28.6 ns) is the sum of turn-on delay time ( ) t d on (4.0 ns) and current rise time t r (24.6 ns), and the turn-off time t off (94 ns) is the sum of turn-off delay time ( ) t d off (11.8 ns) and current fall time t f (82.2 ns). The longer t f may be caused by the low electron mobility and slow discharging of interfacial state [83]. The switching time is short enough for high-speed switching applications. The interelectrode capacitances affecting the switching performance were measured. The improved input capacitance (C iss ) of 37 pF mm −1 contributes to the decrease of the delay time ( ) t d on and ( ) t , d off the reverse transfer capacitance (C rss ) of 14 pF mm −1 mainly affects the current rise and fall time, t r and t , f and the output capacitance (C oss ) is 42 pF mm −1 . Furthermore, the dependence of switching time on gate length was explored, and it concluded the MOSFET structure shown in figure 6 with a shorter gate length is favorable to a higher switching speed. Because of the excellent switching performance of the trench-gate device, β-Ga 2 O 3 MOSFETs have great potential in high-speed switching applications.

Conclusions
This paper provides a review of the material properties of β-Ga 2 O 3 , its melt bulk growth and epitaxial growth methods, and the current progress of trench gate β-Ga 2 O 3 MOSFETs. The device design, fabrication process, and DC characteristics are discussed. The temperature-dependent, radio frequency, and switching performance of various trench gate β-Ga 2 O 3 MOSFETs are also reviewed. The development of vertical β-Ga 2 O 3 trench gate MOSFET is still at the early stage. It exhibits a lot of space to explore and improve, including the fabrication process and the device structure. The PECVD SiO 2 , ALD Al 2 O 3 or PECVD SiNx could be deposited for the isolation layer between the gate and source electrodes. Besides the periodic gate structure, a single trench gate vertical β-Ga 2 O 3 MOSFET with a current aperture could be considered. The temperature-dependent research of the heterogeneous Ga 2 O 3 -on-SiC planar trench gate MOSFET demonstrates stable electrical characteristics with temperatures varying from 25°C to 200°C, providing an opportunity to improve the thermal performance of β-Ga 2 O 3 . More investigations are needed for the thermal management ability of Ga 2 O 3 -on-SiC MOSFET in high-power and high-frequency applications. Trench gate β-Ga 2 O 3 MOSFET exhibits great potential in highspeed switching applications and the circuit integration application of power switches and RF devices. For the RF performance study, RF gain and roughness tests are important supplementary for high-power RF applications. With device optimization and materials development, the performances of trench gate β-Ga 2 O 3 MOSFET will be improved significantly and the outstanding potential of β-Ga 2 O 3 will be exhibited in industrial applications.