Fabrication and integration of photonic devices for phase-change memory and neuromorphic computing

In the past decade, there has been tremendous progress in integrating chalcogenide phase-change materials (PCMs) on the silicon photonic platform for non-volatile memory to neuromorphic in-memory computing applications. In particular, these non von Neumann computational elements and systems benefit from mass manufacturing of silicon photonic integrated circuits (PICs) on 8-inch wafers using a 130 nm complementary metal-oxide semiconductor line. Chip manufacturing based on deep-ultraviolet lithography and electron-beam lithography enables rapid prototyping of PICs, which can be integrated with high-quality PCMs based on the wafer-scale sputtering technique as a back-end-of-line process. In this article, we present an overview of recent advances in waveguide integrated PCM memory cells, functional devices, and neuromorphic systems, with an emphasis on fabrication and integration processes to attain state-of-the-art device performance. After a short overview of PCM based photonic devices, we discuss the materials properties of the functional layer as well as the progress on the light guiding layer, namely, the silicon and germanium waveguide platforms. Next, we discuss the cleanroom fabrication flow of waveguide devices integrated with thin films and nanowires, silicon waveguides and plasmonic microheaters for the electrothermal switching of PCMs and mixed-mode operation. Finally, the fabrication of photonic and photonic–electronic neuromorphic computing systems is reviewed. These systems consist of arrays of PCM memory elements for associative learning, matrix-vector multiplication, and pattern recognition. With large-scale integration, the neuromorphicphotonic computing paradigm holds the promise to outperform digital electronic accelerators by taking the advantages of ultra-high bandwidth, high speed, and energy-efficient operation in running machine learning algorithms.

Original content from this work may be used under the terms of the Creative Commons Attribution 4.0 licence.Any further distribution of this work must maintain attribution to the author(s) and the title of the work, journal citation and DOI.

Introduction
Integrated silicon photonic-electronic chips are a mainstream platform for optical interconnects with ultra-high bandwidth, high-speed, and wavelength-division-multiplexed signal transmission [1][2][3][4][5][6].The rapid development of silicon photonic-electronic chips is driven by the rise of open-access silicon photonics platforms [7].Silicon photonic foundries carry out chip manufacturing for fabless labs [8].Photonic devices on the silicon-on-insulator (SOI) platforms can be patterned by the electron-beam lithography (EBL) and deepultraviolet (DUV) lithography.EBL is a direct writing technique to provide very fine features, and it is attractive for rapid prototyping and development purposes [9].However, it is not suitable for high-volume manufacturing due to time-consuming point-by-point exposure.In contrast, DUV lithography performs exposure using a binary photomask, transferring a copy of large-area design onto a wafer.As a result, the DUV process has a high-throughput and is more suitable for mass production.By leveraging DUV, silicon photonic complementary metal-oxide semiconductor (CMOS) lines provide low-to high-volume manufacturing of photonic integrated circuits (PICs).Fabless labs rely heavily on the multi-project wafer (MPW) service to obtain largescale integrated system with high yield, high reliability and scalability [7,10].
In particular, silicon photonic foundries offer a number of high-performance components, including low-loss silicon waveguides, broadband waveguide grating couplers and edge couplers, high-speed Mach-Zehnder interferometer (MZI) modulators and electro-absorption modulators, high-speed GeSi photodetectors, and the arrayed waveguide grating [10][11][12][13].Based on the above high-performance components, multidimensional quantum entanglement is demonstrated on an integrated quantum photonic chip, which integrates thousands of photonic components to achieve quantum state manipulation [14].In a recent work, a very large-scale quantum graph photonic chip has been demonstrated, and onchip quantum information processing and quantum computing tasks can be performed [15].These breakthroughs demonstrate a promising path for manufacturing large-scale silicon photonic-electronic chips based on the rapid MPW prototyping service.By leveraging photonic packaging [16], such as photonic wire bonding [17] and flip-chip die bonding for photonic-electronic co-integration [18], silicon photonic chips can be calibrated, reprogrammed, and trained efficiently by using electronic microcontrollers with high reproducibility for neuromorphic computing [19,20].
The photonic deep neural network has been developed on the silicon photonic platform with an image classification accuracy higher than 93.8% and a classification time less than 570 ps [21].A photonic convolutional accelerator achieves a record-high 11 tera operations per second (TOPS) based on simultaneous interleaving temporal, wavelength and spatial dimensions [22].Based on the same principle, a microcomb-driven chip-based photonic processing unit was demonstrated, enabling a preeminent compute density and excellent performance in image recognition [23].A silicon photonic-electronic neural network was developed to compensate fibre nonlinearity in a 10 080 km submarine fiber transmission system with an improved quality factor.In this system, the bandwidth of a neuron based on the silicon ring modulator can be practically enhanced to 10 GHz for high-speed inferencing [24,25].The industry has already achieved success with the Lightmatter Mars chip that uses silicon photonics and micro-electromechanical systems technology for artificial intelligence (AI) inference acceleration, which performs matrix-vector multiplication with greatly reduced energy consumption and time delay [26].These neuromorphic photonic processors can potentially outperform digital electronic accelerators in terms of throughput, latency, and bandwidth for machine learning, computer vision, autonomous driving, speech recognition, and medical diagnosis [27].
The emerging architecture of "in-memory computing" is also a promising path towards energy-efficient photonic computing [27][28][29].Thanks to the non-volatile feature of these emerging memory devices, energy consumption can be substantially reduced compared with conventional silicon photonics, as no power supply is needed to sustain the stored data.To cope with the 'memory wall' bottleneck in the von Neumann architecture with separated processors and memories [30][31][32][33][34][35][36][37], phase-change materials (PCMs), which take advantage of rapid and reversible phase transition as well as the associated changes in electrical and optical properties [38][39][40][41][42][43][44], have been explored for non-volatile memory and in-memory neuro-inspired computing [45][46][47][48][49][50].PCMs undergo reversible phase transition between amorphous and crystalline states via Joule heating generated by electric pulse or focused laser beam, and the two solid states remain stable at room temperature for years [40].Pronounced optical or electrical contrast between amorphous and crystalline states and non-volatile properties were first employed in rewritable optical CDs, DVDs and Blu-ray disks [51], and were later exploited in electronic phase-change random access memory (PCRAM) [52][53][54].The optical contrast of PCMs stems from a fundamental change in the bonding mechanism from covalent bonding in the amorphous phase to metavalent bonding in the crystalline phase [55][56][57][58][59].

Overview on PCM-based photonic devices
The non-volatile photonic waveguide memory was first proposed by integrating PCM Ge 2 Sb 2 Te 5 (GST) thin film on nanophotonic waveguides in 2012 (figure 1) [60].Reversible and all-optical programming of a GST cell on the Si 3 N 4 waveguide was first demonstrated with multilevel operation in 2015 [61].Since then, integrated PCM photonic devices have been considered as a promising candidate for photonic memory and neuromorphic photonic computing.There has been exciting progress in the exploitation of photonic waveguide devices, including a waveguide crossing array for a chip-scale all-optical abacus in 2017 [62], integrated synapses in 2017 [63], logic gates (2018) [64], in-memory computing based on multi-bit computational memory in 2019 [65], photonic switches in 2020 and 2021 [66,67], photonic tensor cores in 2021 [28], optomemristors in 2021 [68], plasmonic nanoheater devices in 2022 [69], photonic associative learning elements in 2022 [70], and an in-memory photonicelectronic dot-product engine in 2023 [71].As shown in figure 1, most studies focus on all-optical programming of PCMs.For multilevel operation, the amorphous-to-crystalline ratio of a PCM can be fine-tuned by adjusting the parameters of optical programming pulses, i.e., pulse amplitude, pulse width, pulse profile and pulse number.There has been great progress in improving the transition levels (storage capability) of PCM cells from 3 bit to 5 bit [72] and 6 bit [73], which are critical in neuromorphic computing with improved programming precision of the synaptic weight banks.Moreover, breakthroughs in device performances have been achieved, such as nanosecond programming time [74], cycling endurance of more than one million [62], and switching threshold of 16 pJ [75].These high-performance PCM photonic cells have paved the way for developing brain-like neural networks [27], supervised and unsupervised learning [76], associative learning [70], reinforcement learning [68] and convolutional neural networks [28].Basically, a biological synapse plays a role in the formation of memory, e.g., long-term potentiation and depression, and regulating neurotransmission.Nonvolatile PCM decorated waveguide devices show neurosynaptic behaviors [63], such as well-known Hebbian learning or the spike timing-dependent plasticity rule [77].Spiking neural networks were proposed and developed by cascading these artificial synapses and spiking neurons based on PCMs into a wavelength division multiplexing (WDM) network for pattern recognition [76].
In addition to all-optical programming, the hybrid photonic-electronic integration scheme can combine the advantages of electronic programming and high-speed optical signaling.The PCM memory cell exhibits simultaneous change in optical and electrical properties during phase transition, which can be controlled by either electrical or optical pulses.In 2019, Zhang et al demonstrated electrically reprogrammable GST memory cells with ion-implantation in silicon to form p-type doped waveguide microheaters [81].This programming method offers electrical ports to interface with programming electronics.In 2020, Zheng et al integrated GST on a positive-intrinsic-negative (PIN)-type doped silicon waveguide [66], which greatly reduced the insertion loss to only ∼0.02 dB µm −1 .Another improvement in doping pattern design is segmenting one doping region into multiple bridges so as to precisely control the melting areas of PCMs [82].Very recently, Zhang et al reported a segmented structure of In 2 O 3 /GST to enhance the multilevel operation of the waveguide memory cell with electrical control by introducing a large temperature gradient [83].With measured change in transmission of 0.01 and 0.005, weight encoding precision of 6-7 bit is predicted [83].For a more general solution, a plasmonic nanogap platform was developed, supporting optical/electrical programming and optical/electrical probing or with any combination of the above [75].In addition, temperature profiles of the microheaters can be engineered to provide large-area isothermal heating, which would be beneficial for obtaining large-area phase switching of PCMs.It is also useful for tunable metasurface devices including the metalens [84] and beam deflectors [85].
The focus of this field is currently undergoing a transition from device optimization to device networking.Largescale photonic networks consisting of PCM arrays would be the cornerstone of neuromorphic computing.Fabrication methods of PCM-based waveguides, metasurfaces, photonic crossbar array, etc are critical to realize low-loss and broadband operations, and scalable integration.To achieve highperformance photonic neuromorphic computing, it is essential to achieve multilevel operation of individual photonic device, and increase the integration density of photonic devices.It is worth noting that the fabrication of PCM arrays relies on the well-established 130 nm silicon photonic CMOS line.Instead, manufacturing of electronic PCRAM utilizes a 14 nm CMOS line with successful backend integration of PCMs [86].Thus, it is feasible to develop a back-end-of-line (BEOL) process for high-quality phase-change thin film integration on the PICs, enabling rapid prototyping and wafer-scale manufacturing.In the following text, we discuss the latest advancements in integrated phase-change photonic devices, with a focus on their fabrication process and state-of-the-art device performance.Because PCMs and PICs are two fundamental building blocks of in-memory neuromorphic devices, we first discuss the optical properties of PCMs and the recent progress on materials design and optimization.We then discuss the fabrication flow of standard waveguide platforms, as well as suspended silicon and germanium waveguides.Next, we provide an overview of PCM waveguide devices with optical programming, electrical programming and mixed-mode operation, with a focus on improving the multilevel performance of the individual photonic device.Finally, we discuss the fabrication and performance of neuromorphic photonic systems for associate learning and matrix-vector multiplication.Optica Publishing Group; [67], Optica Publishing Group; [28], Nature Portfolio; [69], Wiley-VCH; [70], Optica Publishing Group; and [71] Nature Portfolio, respectively.Reprinted from [60], with the permission of AIP Publishing [78].© 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.Reproduced from [61].Copyright © 2015, Springer Nature Limited.Reproduced from [62].CC BY 4.0.Reproduced from [63].CC BY 4.0.Reprinted with permission from [79].Copyright (2018) American Chemical Society.Reproduced from [64].CC BY 4.0.Reproduced from [65].CC BY 4.0 [66].© 2020 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.Reproduced from [80].CC BY 4.0.Reprinted with permission from [67] © The Optical Society.Reproduced from [28].Copyright © 2021, The Author(s), under exclusive licence to Springer Nature Limited.Reproduced from [69].CC BY 4.0.Reproduced from [70].CC BY 4.0.Reproduced from [71].CC BY 4.0.

Materials properties of the functional layer
The Ge-Sb-Te alloys along the GeTe-Sb 2 Te 3 pseudobinary line, e.g.GeSb 2 Te 4 , and Ge 2 Sb 2 Te 5 , were explored for rewritable optical data storage [87][88][89], high-density 3D cross point electronic memory products [90][91][92], and embedded electronic memory products [53,[93][94][95], as well as on-chip photonic devices [96].The basic working principle is outlined in figure 2(a).The amorphous phase is highly disordered, in which long range structural order is absent.Upon rapid crystallization, Ge-Sb-Te alloys form a rock-salt-like phase in its crystalline state.Take Ge 2 Sb 2 Te 5 (abbreviated as GST in the following) for an example, one sublattice is taken by Te atoms, and the other sublattice is shared by 40% Ge atoms, 40% Sb atoms and 20% atomic vacancies in a random fashion [89,97,98].In terms of crystallization mode, GST is a nucleation-dominated material, as the formation of crystal nuclei occurs at nanoseconds level [99].To further reduce the stochasticity of nucleation, a Sc 0.2 Sb 2 Te 3 (SST) alloy was designed, breaking the crystallization time down to subnanosecond level in electronic devices [100][101][102][103][104][105][106].This SST alloy has been utilized in photonic devices recently, which has enabled ultrafast photonic neuromorphic computing [107].Another major type of PCM is known as growth-dominated materials [108], such as Sb 2 Te and Sb.Traditionally, these materials are doped (alloyed) with impurity atoms to enhance the thermal stability of the amorphous for practical use.Well known growth-type PCMs include Ag 4 In 3 Sb 67 Te 26 (AIST) and Ge 15 Sb 85 , which have a very low nucleation rate (microseconds level) [109].Crystallization of these materials proceeds via rapid crystal growth from the amorphous-crystalline interface [109][110][111][112][113]. The growth-type PCMs are gaining increasing attentions for photonic applications [44,[114][115][116] due to better-controlled crystallization dynamics, because the randomness associated with the stochastic nucleation process is suppressed.A thorough review of crystallization kinetics of PCMs can be found in [45].
In crystalline GST, the p orbitals of Ge/Sb/Te atoms are highly aligned (except at the vacant lattice points), which gives rise to a high dielectric constant, known as metavalent bonding [55,57].The self-doping effects, i.e. ∼1−2 at.% non-stoichiometric excess vacancies naturally form on the cation-like sublattice, move the Fermi level to the top of valence band, resulting in a high amount of hole carriers (∼10 20 cm −3 ) [117].Upon amorphization, the p orbitals are no longer well aligned (low dielectric constant, covalent bonding), and the Fermi level is pinned to the gap region by midgap defects [118], resulting in a much lower carrier concentration (∼10 16 cm −3 ) [119].As a consequence, the refractive index (n) and extinction coefficient (k) of crystalline GST are much larger than those of amorphous GST in a wide spectrum range [120] (figure 2(b)), providing a sufficient contrast window for non-volatile photonic applications [40].For photonic memory and neuromorphic computing, the changes in transmittance upon phase transition in the telecom band are typically used to encode data, in particular, 1500-1600 nm.In the waveguide device platform, PCMs serve as a functional layer loaded on the PICs.The wide range of non-volatile refractive index tunability provides design flexibility and multiple application for photonic devices, especially for brain-like computing, where large switching contrast is required to drive neuron on and off for efficient network training.The absorption loss (k) for GST at 1550 nm is 1.49 for crystalline state and 0.12 for amorphous state.The high loss in crystalline GST is due to free carrier absorption, which can be largely reduced by replacing Te with Se, e.g.Ge 2 Sb 2 Se 4 Te 1 (GSST) [121,122].Sb 2 Se 3 and Sb 2 S 3 can also be exploited for low loss photonic applications but at a cost of crystallization speed and cycling endurance [123,124].More recent materials developments include TiTe 2 /Sb 2 Te 3 phase-change heterostructure [125][126][127][128], single-element material Sb [129][130][131][132] and Te [133][134][135], self-decomposed Ge-Sb-O alloys [136,137], and many potential PCMs obtained via computational screening [138,139] and bad metals, such as In 3 SbTe 2 , AgSnTe 2 , and AgSnSe 2 [140][141][142][143][144].

Fabrication of suspended silicon and germanium waveguides
Silicon photonics, also known as group IV photonics, is the study and application of integrated optoelectronic devices made from silicon (Si) and germanium (Ge).Group IV PICs are a mainstream platform for data communication in the near-infrared telecommunication bands.Spectral range extension to mid-infrared and long-wave-infrared regimes could enable on-chip spectroscopy and chemical sensing applications.Suspended waveguides were proposed for broadband operation to avoid strong light absorption of buried oxide (BOX) layer in the SOI wafer and Ge-on-insulator wafer [145].As shown in figure 3(a), a new type of suspended waveguide was proposed by leveraging the subwavelength grating structures [146][147][148][149][150], which can act as a homogeneous material with a low equivalent refractive index based on the Rytov's effective medium theory [151].Thus, light can be guided in the waveguide core with a high refractive index based on the total internal reflection.Air holes in the subwavelength gratings also enable penetration of buffered hydrofluoric (HF) acid solution in wet etching of BOX layer for waveguide releasing.As illustrated in figure 3(b), after spin coating of resist ZEP 520 A, these suspended waveguides were defined in a single step of EBL and reactive ion etching based on the C 4 F 8 and SF 6 gases.A small electron beam current of 20 pA at 80 kV was calibrated to exposure and define fine features in the subwavelength gratings and waveguide slot with a minimal feature size of 70 nm.The exposing pattern of a long waveguide was segmented by multiple 150 µm × 150 µm writing fields with a 0.03 µm × 150 µm overlapping region to suppress insertion loss due to stitching error, which was measured as 30 nm.The slot waveguides were next released by removing local BOX below the waveguide in a stirred 48% HF:H 2 O (1:5) solution for 2 h.According to scanning electron microscopic (SEM) characterization at cross sections of cleaved waveguides, near vertical waveguide sidewalls were achieved with an improved reactive ion etching recipe.The narrow waveguide slots were etched through, and especially there is no vertical offset between two separated anchoring pillar arrays suspended in air, which demonstrates good mechanical stability.The Radio Corporation of America-1 silicon wafer cleaning was performed to remove organic residue and particles on the silicon surface after buffered oxide etch.The fabricated chip was immersed in 29%NH 4 OH:30%H 2 O 2 :H 2 O (0.1:1:5) solution at 75 • C for 15 min for particle removal, followed by dipping in HF solution of the same concentration for 30 s to remove the oxide introduced in the previous Radio Corporation of America-1 surface treatment.With a clean chip surface, propagation loss of the fundamental waveguide mode is mainly defined by the scattering loss due to roughness at waveguide sidewalls.A low propagation loss of 2.8 dB cm −1 was achieved at 2.25 µm.Numerical simulation predicted that its waveguide sensitivity can reach 1.12, which is higher than those of conventional SOI slot waveguides on BOX.This slot waveguide platform may be promising for long-range lightanalyte interaction in spectroscopy and sensing.Another study shows exploitation of the suspended Si waveguides operating at longwave infrared wavelengths with a low propagation loss of 3.1 dB cm −1 [152].
Suspended device fabrication technique was also applied to optomechanical microresonators [153][154][155], in which another step of photolithography was performed to expose the positive tone resist S1813, opening air windows above the resonators for the subsequent HF releasing.Due to fragile suspended structures, critical point drying should be performed to avoid damage of the photonic devices due to surface tension associated with liquid drying to gas [156,157].Optical resonators with ultrahigh quality factors are beneficial for quantum information processing, frequency comb generation, and cavity optomechanics [158].By tuning the wet etching time, the sidewall profiles of silica cavity can be engineered to achieve an extremely large quality factor for stimulated Brillouin lasers [159].Surface treatments are crucial for low-loss resonators operating at the mid-infrared wavelengths [160].A HF dip is useful for native oxide removal from the silicon cavities with an increased quality factor.Several cycles of piranha clean (3:1 H 2 SO 4 :H 2 O 2 )/HF dip can be performed to reduce surface roughness and surface absorption states [161].Annealing in N 2 environment can be performed to remove water moisture and desorb hydrogen from the silicon surface with reduced mid-infrared light absorption [162].In addition, photonic crystal nanocavity with a quality factor of four million was demonstrated for silicon Raman laser with a microwatt lasing threshold [163].With the state-of-the-art EBL and reactive ion etching systems, radius of fabricated air hole in the photonic crystal slab can be varied with a step of 0.375 nm to achieve a frequency spacing tuning to exactly 15.6 THz between the odd and even modes due to a narrow Raman gain width of about 0.10 THz.Nanostructures in photonic devices, such as hyperuniform disordered polarizers [164][165][166] and dual-wavelength-band grating couplers [167,168], were also patterned by the EBL system with high performances.
Compared with Si, Ge has a much wider spectral range of transparency up to 15 µm, which covers the 6-15 µm fingerprint region of molecules and enables on-chip spectroscopy for identifying molecular species.Secondly, refractive index of Ge is larger than that of silicon, enabling a higher integration density.Thirdly, third-order nonlinearity of Ge is much higher than that of Si for on-chip nonlinear optics in the mid-infrared regime [169].Fourthly, Ge CMOS transistors are a promising candidate due to a high mobility [170].Motivated by these excellent properties, high-quality Ge-on-insulator wafers were developed by leveraging the Smart-Cut, wafer bonding, and annealing [171].Figure 4(a) shows a suspended Ge waveguide platform with focusing subwavelength grating couplers for efficient fiber-chip light coupling.Figure 4(b) shows the fabrication flow of the Ge-on-insulator wafer and suspended Ge waveguides.A 4-inch p-type bulk Ge (100) donor wafer was first deposited with 100 nm SiO 2 as a protection layer in the H + ion implantation with a dose of 4 × 10 16 cm −2 at 80 keV.SiO 2 protection layer was then removed by HF wet etching.A plasma post-oxidation was performed to form GeO x [172], which was further covered by a 5 nm Al 2 O 3 layer as the bonding interface using atomic layer deposition (ALD) [173,174].Another Si wafer as the substrate was covered by a 2 µm-thick SiO 2 by thermal oxidation, and was deposited by a 5 nm ALD Al 2 O 3 layer.The Ge and Si wafers were manually bonded with a subsequent annealing at 300 • C to enhance the bonding strength.A second annealing process was performed with temperature ramping up to 400 • C to induce splitting of the bulk Ge.Chemical mechanical polishing was used to reduce surface roughness of the Ge device layer.A third step of thermal annealing at 550 • C was performed to improve Ge crystallinity with an enlarged hole mobility according to the Hall measurement.The surface roughness of the Ge device layer is lower than 0.5 nm root mean square according to atomic force microscopy (AFM) characterization [171].
With the high-quality Ge-on-insulator wafer, various photonic integrated waveguide devices, including grating couplers, resonators, and photodetectors, were developed [175][176][177][178]. Full-etched air holes and shallow-etched rib waveguides were defined in separated steps via EBL and dry etching with CF 4 gas.Misalignment between these two exposing patterns can be controlled within 100 nm.The BOX and ALD Al 2 O 3 layers below the waveguides were removed using HF wet etching to form the suspended Ge waveguides.This platform in principle offers an ultrabroad spectral range of transparency up to 15 µm.In a subsequent work, a focusing subwavelength grating coupler was demonstrated with a coupling efficiency of −11 dB at 2.37 µm [176].With an efficient fiberchip coupling, optical resonators, including photonic crystal nanocavities [179], nanobeam cavities [177], and microrings [180], were developed with high quality factors reaching 57 000 at 2.15 µm.Operating in the longwave infrared, low propagation losses of 2.6 dB cm −1 and 5.3 dB cm −1 were respectively measured at wavelengths of 7.67 µm and 7.7 µm by using the suspended Ge waveguides [181,182].All above studies pave the way for mid-infrared and longwave infrared low-loss operation of the group IV photonic platforms.These suspended waveguides are also a promising platform for integrating PCM cells as functional elements for the phase change memory and in-memory neuromorphic computing applications beyond the optical telecommunication wavelength band.Light can be guided in the low-loss Si and Ge waveguides to achieve optical programming and probing of the neurosynaptic weights encoded in the PCM elements.Si and Ge can be also doped to form electrothermal microheaters for programming PCM memory cells.We anticipate a switching energy reduction due to a strong thermal isolation provided by air cladding in the suspended waveguide structure.

Fabrication of PCM waveguide devices
Figure 5(a) shows a Si 3 N 4 waveguide decorated by a AIST thin film for mimicking a biphasic synapse [114].A low-pressure chemical vapor deposition (CVD) Si 3 N 4 on insulator wafer was spin coated by a resist arN 7520.12 and exposed by EBL to form the etch mask after development in MF-319.Reactive ion etching was performed to etch through the 325 nm-thick Si 3 N 4 device layer using CHF 3 /O 2 gases.In a next step, sputtering apertures were patterned on a spin coated bilayer polymethylmethacrylate (PMMA) 495 A8 and 950 A8 with a subsequent magnetron sputtering of a stack of 20 nm AIST with a 15 nm indium tin oxide (ITO) as a capping layer.After PMMA lifting off in acetone, PCM patches were integrated on the photonic circuitry.Same fabrication flow can be found in previous works with well-developed GST devices [61,64,72].During magnetron sputtering, argon ions are accelerated by electromagnetic field to hit the target.In this way, the atoms of the target can be sputtered onto the substrate to form thin films.In general, the deposition rate and stability of sputtering process are mainly affected by the type of electric power  [183], American Chemical Society.Panel (c) is adapted with permission from [73], Springer Nature.Reproduced from [114].CC BY 4.0.Reprinted with permission from [183].Copyright (2018) American Chemical Society.Reproduced from [73].CC BY 4.0.Reproduced from [73].CC BY 4.0.
supply, e.g.direct current or radio frequency, voltage and pressure.A higher voltage results in a higher deposition rate, but pressure imposes an opposite effect.Moreover, appropriate spinning of the substrate may improve the uniformity of the thin film.
In addition to devices decorated by PCM patches, subwavelength structured PCM on the waveguides was also exploited for robust operation and reprogrammable mode converting [73,183].A top-view SEM image in figure 5(b) shows patterned GST nanodisks with a thickness of 10 nm and a diameter of 500 nm.These nanodisks were etched with an inductively coupled plasma system using fluorinebased chemistry.Patterning of GST disks enabled relative uniform heating.Locations of these nanodisks can be designed to overlap with the maximal field of the waveguide mode.A switching contrast of 87% was achieved in a device consisting of five GST nanodisks.These GST nanodisks were encapsulated conformally with a 50 nm ALD Al 2 O 3 , avoiding reflowing and deforming of GST.However, obvious deformation was observed in devices with GST patches based on the AFM characterization due to surface tension during GST melting [183].Another work by the same group proposed a reprogrammable GST metasurface integrated on the waveguides based on the same fabrication process, as shown in figure 5(c) [73].The shortest length of the GST nanorods in the metasurface is 84 nm.With a crystalline GST nano-antennae array, a phase gradient is established to satisfy the generalized phase-matching condition between the fundamental mode and the first-order mode for efficient mode converting [184,185].However, the phase gradient is largely reduced in the amorphous GST nano-antennae array, which is insufficient for the phase-matching condition without mode converting effect.A high precision of 6 bits was achieved, and an artificial convolutional neural network was developed to perform image recognition tasks.Based on the same device, a photonic generative network was demonstrated by harnessing optoelectronic noises [186].Subwavelength structured GST nanodisks were also useful for achieving large switching contrasts.Focused ion beam was adopted in patterning three cascaded GST disks with gradually increased diameters [187].Localized resonant effect in the device enables a high extinction ratio up to 27 dB.An optical slot waveguide filled with a PCM in the slot region was also proposed to enhance light-PCM interaction and device performances for feedbackcoupled microring resonators [188] and wavelength-shift-free racetrack resonators [189].
In addition to PCM thin-film devices, PCM nanowire devices have been exploited in the nanophotonic circuits and phase-change memory.According to previous studies, PCM nanowire devices have a small size, leading to a low programming energy [190,191].Generally, the nanowires can be synthesized through the vapor-liquid-solid mechanism, where the nanowires grow directly from a range of inorganic materials [192][193][194].Based on vapor-liquid-solid process, typical methods including CVD, plasma-enhanced CVD, metal-organic CVD, and molecular beam epitaxy (MBE) are widely used to grow group II-VI, IV, III-V nanowires [195].Assembly of nanowires into the electronic devices was achieved by contact printing method [196], nanoscale combing technique [197], scanning-probe-assisted nanowire manipulation [198], electric-field-directed assembly [199], and Langmuir-Blodgett technique [200].These bottom-up strategies enable precise control over the length, density, orientation of nanowires during assembly.
Figure 6(a) illustrates the fabrication and integration processes of PCM nanowires employing the contact printing method, which involves four steps: pick-up, placement, alignment and deposition [201].These GeTe nanowires were grown by using a metal catalyst-assisted vapor-liquid-solid method, where the GeTe powder was placed in the furnace.With the assistant of Au film, the GeTe nanowires were synthesized through a heating and annealing procedure.The polyethylene terephthalate (PET) tip was used to pick-up the single nanowire due to its adjustable diameter during fabrication and better adhesion to rigid bodies compared to tungsten tips [202,203].With a PET needle tip diameter less than 2 µm, the pick-up yield for a single nanowire reached 80%.The nanowire was placed on a polydimethylsiloxane (PDMS) transparent substrate which forms a dome shape upside-down the glass slide.After alignment and contact between the PDMS-stamped nanowire and the waveguide device, separation of nanowire and the PDMS was achieved by gradually lowering the height of stage.Figures 6(b) and (c) represent the nanowire integration over an optical microcavity, where the nanowire was suspended between two Au electrodes.Presence of nanowire causes scattering and absorption of light propagating in the waveguide, which disrupts the optical mode of the microcavity.This contact printing technique improves the precision of picking up nanowires from the 'forest' and reduces the misalignment between nanowire and devices.
In another work, a novel strategy was exploited to actively modulate the mechanical properties of GeTe nanowires through a continuous tuning technique [204].The GeTe nanowires were employed as active nanoelectromechanical system resonator, enabling a tuning range of 30% for the resonance frequency and exhibiting high quality factors (Q > 10 4 ) after the phase transition.This work provides a state-of-art solution to utilize the GeTe nanowire as the frequency synthesizers and filters.Integrating GeTe nanowires on waveguide devices can also enable mixed-mode operation with associated changes in optical transmission and electrical resistance upon optical programming [205].
Recently, another type of PCM devices has been developed using two-dimensional (2D) semiconductors.Instead of utilizing phase transition between crystalline and amorphous phase, structural transition within the crystalline phase is also exploited for optoelectronic applications [206].These mechanical exfoliable 2D PCMs include In 2 Se 3 [207,208] and transition metal dichalcogenides, in particular, MoTe 2 [209], which have enabled the development of microring resonators [210], field-effect transistors [207,209,211], non-volatile memory [212,213], and photodetectors [214], at low dimensions.In a recent study, a 2D In 2 Se 3 thin layer was transferred onto a microring by mechanical exfoliation [210].A thermal release tape was applied onto the prepared MBE thin film.A thin layer of PMMA was spin coated on the substrate, and EBL was used to open windows for transferring 2D PCMs.In this way, a tape with the 2D PCM can be applied onto the device surface.At last, the thermal release tape was separated from 2D PCMs by baking the sample at an appropriate temperature (110 • C for In 2 Se 3 ).Then PMMA was removed by acetone.Transition between α and β crystalline states was experimentally demonstrated using nanosecond optical pulses [210].The optical transparency for both states of In 2 Se 3 at telecommunication wavelengths enables phase-only photonic waveguide devices.

Electrothermal switching of PCM
Ion-implanted waveguide microheaters are a mature technology provided by silicon photonic foundries.As a recent breakthrough, a high-performance non-volatile phase shifter was demonstrated based on this technology with electrical controlling, as illustrated in figure 7 [82].The SOI wafers were ion implanted with phosphorous at two different doping concentrations (4 × 10 18 cm −3 and 10 20 cm −3 at 80 keV) to form n ++ and n regions, which were used for Ohmic contact with metals and electrothermal switching of PCMs, respectively.Rapid thermal annealing was performed to activate dopant.A bilayer of 10 nm Ti and 20 nm TiN was deposited, and was subsequently patterned by using photolithography and etching, providing good contact with n ++ regions.200 nm-thick aluminum (Al) electrodes were defined on top of the Ti/TiN using photolithography and lift-off processes.The microheaters were last capped with a 10 nm-thick SiO 2 layer.The above fabrication process was implemented in the 90 nm CMOS line at Lincoln laboratory [82].With these ion-implanted heaters, silicon nanowire waveguides and PCM layers with fine features were patterned by EBL.The first step of EBL was performed to pattern the ZEP 520 A resist, which was subsequently transferred onto the silicon device layer by chlorine etching to form 500 nm-wide and half-etched SOI waveguides.In the second step of EBL, PMMA resist was defined followed by thermal evaporation and lift-off processes of 30 nm-thick Sb 2 Se 3 patches.The samples were annealed in an argon environment at 200 • C for 15 min.The devices were last capped with a 15 nm-thick Al 2 O 3 protective layer by ALD.One of the key parameters in waveguide microheater fabrication is the choice of doping concentration, which gives a trade-off between resistivity and insertion loss due to free carrier absorption.With p ++ doping, insertion loss was measured as 0.98 dB µm −1 in a microheater device based on a waveguide crossing structure [81].To obtain a good balance, a concentration of 4 × 10 18 cm −3 was used in forming the n doping region, which introduces a very low insertion loss of 0.01 dB µm −1 for the propagation of light.PIN-type doping was also proposed to avoid the free carrier absorption with near-zero additional loss [66].Two steps of ion implantation were performed in forming p ++ and n ++ regions separated by an undoped waveguide core.Thus, there is almost no overlap between the optical field of waveguide mode and free carriers.PIN diode doping in a directional coupler has enabled a large-area phase transition of GST for efficient onoff light switching with a high extinction ratio over 10 dB [215].In addition, the shape of doping region can be optimized to engineer the generated thermal profile of a microheater for PCM switching.A bowtie shape was used, and it shows temperature gradient with the highest temperature generated in the narrowest n region below the Sb 2 Se 3 .A region consisting of n-doped 'bridges' was also proposed to produce a temperature profile with multiple peaks along the waveguide as to achieve fine tuning of the crystallization-to-amorphization ratios of Sb 2 Se 3 patches.In a recent study, a segmented In 2 O 3 thin-film microheater was developed to enhance the temperature gradient with predicted 7-bit encoding precision [83].In ion-implanted microheater devices, the doping profile change due to dopant diffusion over heating cycles was estimated to be negligible.In future studies, optimization of device design and fabrication may be performed to realize efficient switching of PCMs with CMOS-compatible voltages [216,217].In this scenario, with flexible electrical programming, these PCM microheater devices can be seamlessly interfaced with CMOS nanoelectronics [218].
Due to a high intrinsic thermal conductivity (5300 W m −1 K −1 ) [219], monolayer graphene has been exploited as transparent and flexible microheaters in the integrated photonic waveguide devices [220,221].By leveraging a slow-light photonic crystal waveguide, power consumption was significantly reduced with one of the fastest temporal response speeds [222].Graphene microheaters on the suspended SiN x membrane were also applied to in situ transmission electron microscopic characterization with a low power consumption [223].A systematic study predicted that graphene microheaters outperform the ITO and ion-implanted silicon PIN microheaters in electrothermal switching of GST [224].Under the Pauli blocking condition by gating or doping graphene, i.e. if the Fermi level is lower than half the photon energy −hν/2 or higher than hν/2, photons cannot excite electrons to fill states because there are no electrons available for the interband transition or the state in the conduction band is already filled by electrons [225], better optical performance and lower operation voltage may be achieved.A recent breakthrough has experimentally demonstrated ultra-low programming energy required for phase transition of GST and Sb 2 Se 3 by integrating planar graphene microheaters on top of the silicon photonic waveguides for non-volatile and reprogrammable PICs [226].Figure 8 shows the fabrication flow of this graphene microheater waveguide device.A 100 kV EBL system was used multiple times.A 220 nm SOI wafer was spin coated with a positive tone ZEP-520 A resist, which was patterned by a first step of EBL.After fluorine-based gases dry etching, strip SOI waveguides were defined.The remaining ZEP-520 A resist was next used for SiO 2 electron beam evaporation in filling the air gaps and forming planar waveguides.Thus, CVD graphene can be transferred onto a flat substrate.A 10 nm-thick ALD Al 2 O 3 was next deposited to avoid formation of semiconductor-metal Schottky junction between the graphene and silicon.This ALD Al 2 O 3 layer also produces a large thermal boundary resistance between graphene and silicon to largely suppress heat dissipation into the silicon slab.In such a way, the generated heat is mainly confined in the graphene, PCM, and Al 2 O 3 layers to facilitate lowenergy electrothermal switching of PCM.A second step of EBL was performed to pattern the PMMA resist.5 nm Ti and 100 nm Au layers were subsequently deposited by electron beam evaporation, followed by a lift-off process in forming electrodes.Monolayer CVD graphene was transferred onto the chip by using a PMMA-mediated method [227].A third step of EBL was used in patterning a negative tone resist maN2403, which was spin coated on the wet transferred graphene sheet.After O 2 plasma etching, graphene microheaters and electrode contacts were defined.Graphene microheaters were capped by another 10 nm ALD Al 2 O 3 as a protecting layer to avoid peeling off graphene in the subsequent fabrication steps.Sheet resistance and contact resistance were measured as (551 ± 91) Ω sq −1 and (919 ± 261) Ω, respectively.A fourth step of EBL was performed to expose PMMA resist in defining the sputtering windows, followed by magnetron sputtering of GST or Sb 2 Se 3 layer and SiO 2 capping layer to prevent oxidation of PCM.A final layer of 40 nm ALD Al 2 O 3 was deposited onto the chip and was patterned by a fifth step of EBL with subsequent chlorine-based gases dry etching.Rapid thermal annealing in N 2 atmosphere was performed to fully crystallize the PCM before device testing.Entire volumes of PCMs were programmed by graphene microheaters with a programming energy density of (8.7 ± 1.4) aJ nm -3 .
In the above process, large-area and high-quality graphene transfer is crucial for high device yields.A modified Radio Corporation of America clean method was proposed to remove micrometer-sized metal residual particles and insoluble organic contaminants before graphene sheet transferring onto a flat substrate [227].After transferring, wrinkles were observed during water drying.These folds tend to break, forming cracks in the graphene with electrical properties degradation due to scattering of carriers [228].Post baking was used in reducing number of cracks and improving graphenesubstrate contact.The semi-crystalline polymer ethylene-vinyl acetate (EVA) was proposed as a supporting layer for graphene transferring [229], and EVA is more flexible and less deformative than amorphous polymer PMMA [230].Solubility of EVA is also better than PMMA in solvents for removal of graphene supporting layer with less residue.EVA-supported graphene transfer method was demonstrated on rough substrates, showing conformal and tight contact on the device surface and sidewalls.As characterized by AFM, density of wrinkles was significantly reduced after implementing a hot-water bath expansion approach [229].Above techniques of large-area graphene transfer are also crucial for fabricating electrically reconfigurable metasurface devices in phase, deflection, and focal length manipulation [84,85,231,232].Fabrication of plasmonic nanogap devices rely on precise overlay alignment, as shown in figure 9.With local markers, misalignment less than 20 nm was achieved in the highresolution mode in performing EBL.A 330 nm silicon nitride on insulator wafer was adopted.CSAR-62 was spin coated and exposed, followed by thermal evaporation of 3 nm Cr and 75 nm Au layers and lifting off to form the global markers at chip corners and local markers nearby the devices.Local markers for one device alignment should be located within a writing field to avoid stage movements in the marker detection and pattern exposing steps.CSAR-62 was found to be less prone to charging effects, which produce rounded edges.And misalignment can be attributed to charging of the resist, which deflects the beam when scanning for the alignment markers.Negative tone maN-2403 resist was used to pattern the Si 3 N 4 photonic circuitry with reduced exposing time.After development, the patterns were transferred to the Si 3 N 4 device layer by using CHF 3 /Ar/O 2 gases in performing the reactive ion etching.Resist residue was removed by N-Methyl-2-pyrrolidone. Dose array generated by GenISys Beamer software was imported to the EBL system for fine feature patterning [233].With Beamer software, exposing path can be custom-designed to minimize the stitching error.In a next step, metal-insulator-metal waveguide was defined by patterning CSAR-62.Exposing dosage was calibrated for the width of a nanogap.After thermal evaporation of a 3 nm Cr layer and a 75 nm Au layer and metal lifting off, a 50 nm-wide airgap was produced with only 10 nm misalignment between the metal layer and the waveguide layer.The final step is to deposit the 75 nm GST and 5 nm SiO 2 patches on top of a plasmonic nanogap.AFM was performed to scan the topography cross-section of the GST bridge, and this testing verified that airgap has been filled with GST.A narrow nanogap is crucial for low-voltage switching of the PCM inside the gap.Sub 1 V switching threshold was achieved with a nanogap width less than 60 nm.This type of device supports threshold switching and mixed-mode operation with efficient electrical/optical programming and probing of transmission/resistance change.
In a recent work, the same group exploited electrothermal switching in a plasmonic nanogap device, in which one of two pads was redesigned as a metal nanowire for efficient local Joule heating of PCM [69].With this device, switchable volume of GST is enlarged, thereby resolving volume limitation due to filamentation, yet maintaining a low energy consumption.
The PCM devices discussed above, including electrothermal switching devices using ion implanted waveguide microheaters [81], ITO [234], In 2 O 3 [83], graphene microheaters [226] and mixed-mode devices [75], have been exploited for various applications.Obviously, plasmonic nanogap devices show one of the lowest programming energies (60 pJ) required for phase transition of PCMs based on the threshold switching effect; however, programming volume and distinguished optical levels are limited.This approach is applicable for photonic memory devices and photonic on-off switches with ultralow energy consumptions.One straightforward method in improving switching contrast (300%) [81] and multilevel operation (6 bit) [83] was achieved by largearea switching of PCMs by leveraging microheater devices based on Joule heating, however, it inevitably rises up energy consumptions to nJ-level.This approach meets requirements of in-memory photonic computing with a high weight programming precision and a high computing accuracy.
As another important application, ultracompact plasmonic slot waveguides were exploited as high-speed phase modulators [235].The devices were coated with an electrooptic polymer layer, which was activated by a poling procedure to produce ordered dipole moments [236].Propagation constant of waveguide mode can be changed by applying electric field across the nanogap due to Pockels effect of the polymer.A high-speed plasmonic modulator in a MZI configuration was developed in a single metal layer [237].In contrast to devices fabricated by lift-off [238,239], the plasmonic device was physically etched through a 200 nm Au evaporated layer with Ar ions.The etched device was spin coated by the nonlinear binary chromophore with a composition of 75%HD-BB-OH/25%YLD124 in filling the slots, followed by a poling process [240].Reduction of sidewall roughness is crucial for low-loss plasmonic waveguides [241], passive devices [242], modulators [237], and photodetectors [243].A lower loss maybe expected by improving etching recipe or introducing crystalline metals [244].

Multilevel capacity of PCM waveguide memory devices
One of the most essential device parameters is the multilevel storage capacity of the phase-change memory, which determines synaptic weight encoding procession and computing accuracy in neuromorphic computing.To enable multilevel operation, the amorphous-to-crystalline ratio of a PCM cell can be fine-tuned by adjusting parameters of optical programming pulses.There has been great progress in improving the transmittance levels of PCM cells.As shown in figure 10(a), 34 transmittance levels were characterized in a basic Si 3 N 4 waveguide decorated with a GST patch.The pulse train shaping was performed to precisely control the time-dependent temperature profile in the GST cells [72].The transmittance levels were improved by exploiting a memory device consisting of double AIST cells.As shown in figure 10(b), the transmittance of the device can be reduced or increased via crystallization of AIST cell 1 or amorphization of AIST cell 2 [114].The contrast window upon phase transition was enhanced to 43% with 45 intermediate storage levels resolved.To further enhance multilevel operation, a phase-change metasurface using GST-based nanoantenna array was integrated on a silicon nitride waveguide [73].By optical programming of the metasurface for partial mode converting from the fundamental mode to a higher-order mode, a very large switching contrast ratio of 16 dB was realized.Importantly, 64 discrete levels were achieved, which is useful in the neuromorphic computing with a high precision, as displayed in figure 10(c).However, fabrication of this GST metasurface structure with a feature size of less than 100 nm relies on high-resolution EBL, which is not suitable for massive production.In addition to multilevel all-optical programming, PCM memory cells can be electrically programmed by making use of the waveguide microheaters.As shown in figures 10(d), a segmented structure of In 2 O 3 /GST device was proposed and demonstrated to enhance multilevel operation by enlarging temperature gradient generated by the electrothermal heater [83].More intermediate states can be easily addressed with predicted weight encoding precision of 6-7 bits.By taking advantage of light resonating, a Fabry-Pérot cavity consisting of Bragg grating mirrors was adopted to enhance the switching contrast and storage levels of a GST memory cell (figure 10(e)) [245].A Fabry-Pérot cavity enhances light absorption with a crystalline GST, however, a small insertion loss can be maintained in the cavity with an amorphous GST.A switching contrast of 10.29 dB and 38 storage levels were demonstrated at a cost of operating bandwidth due to resonant effect.Summary of performances on energy consumption, switching speed, switching cycles, and neurosynaptic operation can be found in other comprehensive reviews on PCM devices [27,29,50].

Waveguide neural networks for photonic neuromorphic computing
Compared with silicon-based PICs [24,246], the main advantage of applying PCM memory cells in neural networks is zero static power consumption in maintaining neurosynaptic weights (non-volatile features).Besides, PCM cells are more compact in reducing footprint of an entire photonic system compared with those of microheater-based tunable MZIs in PICs.As shown in figure 11, PICs in the neural networks for associative learning were fabricated on a Si 3 N 4 platform [70].The Si 3 N 4 wafer was spin coated with a negative tone maN2403 resist, which was exposed by a 50 kV EBL system to define waveguides, grating couplers, multi-mode interferometers, and MZIs.Reactive ion etching based on CHF 3 /O 2 /Ar gases was performed to form Si 3 N 4 strip waveguides.In the next step, photoresist S1813 was spin coated on the chip and exposed by a mask aligner to open windows for depositing SiO 2 cladding layer.Two arms of MZIs were covered by this SiO 2 layer, however, there is only air cladding on top of PCM depositing areas and grating couplers.Photolithography, deposition and lift-off processes were next performed to define the thermo-optic NiCr heaters and Au routing paths to the contact pads, which were used in programming the photonic circuits for tunable light power splitting and phase shifting in the training process.A 5 nm Cr layer was deposited before Au deposition to serve as an adhesion layer.A final step of EBL was performed to patten the PMMA resist as the sputtering windows of GST patches.After lifting off, GST cells were integrated on the Si 3 N 4 waveguide couplers as the associative monadic learning elements.The working principle of monadically association at the device level is implemented by element training, which was achieved by amorphization of a GST cell using two overlapped pulses sent from two separated input ports.In the initial crystalline state, only one input leads to a high transmission response.After amorphization, i.e. after training, both inputs trigger the same output signal, indicating that it associates the two inputs for the same response.Backpropagation-free learning was experimentally demonstrated in the associative monadic elements.This associative learning network architecture can be scaling up for image recognition tasks with high speed and low energy cost.Implementation of unsupervised correlation detection was enabled by a computational memory photonic engine based on a WDM network consisting of an array of microrings [247].This photonic engine utilizes the accumulative crystallization character of GST cells and parallelized data addressing in the WDM network.Real-time correlation identification in data streams was performed for social media analysis, threat and anomaly detections.Complex statistical problems may be solved in the optical domain by using this computational memory paradigm.Adapted with permission from [83], Wiley-VCH.(e) A Fabry-Pérot cavity incorporating a GST cell with 38 storage levels.Adapted with permission from [245], De Gruyter.Reproduced from [72].CC BY 4.0.Reproduced from [114].CC BY 4.0.Reproduced from [73].CC BY 4.0 [83].© 2023 Wiley-VCH GmbH.Reproduced from [245].CC BY 4.0.A photonic crossbar array was fabricated on a SOI platform for matrix-vector multiplication operation using the CORNERSTONE MPW service is shown in figure 12 [248].This MPW chip has a 220 nm-thick SOI waveguide device layer and a 1 µm-thick SiO 2 upper cladding layer.Fabrication of PCM patches, thermo-optic NiCr heaters, Au routing paths and contact pads were performed in the cleanroom of University of Oxford with the same process described in fabrication of the associative learning neural networks except that PCM sputtering windows were opened in wet etching of SiO 2 upper cladding using HF.The NiCr heater was placed above one arm of a MZI for efficient thermo-optic phase shifting and splitting ratio tunning at two output ports.In the chip testing, programming mode of this crossbar array was first implemented by pumping each PCM cell for matrix weight encoding with energetic optical pulses.After weight setting, computing mode was next implemented by reconfiguring the MZIs to perform matrix-vector multiplication.This crossbar functions as a fully connected layer in neural networks.It can be also operated as a convolutional kernel in a convolutional neural network for image recognition.Due to broadband operation, parallel computing was realized by using WDM scheme [28,249].With system scaling up, a throughput over 10 15 multiply-accumulate operations per second may be achievable.Recently, a coherent photonic crossbar array was proposed for matrix-matrix multiplication based on the homodyne detection with estimated reduction in analog-to-digital converter energy consumption and eased requirement in high-speed electronic design [250].The computing density was estimated as 340 TOPS W −1 in a 64 × 64 crossbar array operating at a clock frequency of 12 GHz.In addition to WDM, mode and polarization are other degrees of freedom for the multiplexing technology [73,[251][252][253].Polarization of light was used to selectively reconfigure the synaptic weights of PCM nanowire units in an in-memory computing system [253].Multiple multiply-accumulate operations were achieved in a compact device with a predicted compute density of 3.8 TOPS mm −2 .Development of these photonic cores is promising for AI applications ranging from video processing to autonomous driving.
Figure 13(a) shows massively parallel data transferring through a photonic tensor core to implement parallel signal processing via WDM.Multiple sets of data X i encoded on different light wavelengths (labelled as different colors) were multiplexed into one input waveguide, and next pass through a same PCM memory cell with a weight encoded as a ij (i, j = 1-4).At output ports, these multiple sets of processed signals Y j (=Σa ij •X i ) were demultiplexed and detected separately to obtain the computational results for the parallel channels 1-4.As illustrated in figure 13(b), parallel processing based on the WDM is a huge advantage of photonic architectures compared with serial information processing in a digital computer.Figure 13(c) shows an optical micrograph of a 5 by 4 photonic tensor core to implement the parallel computing [249].The entire system was fabricated based on the EBL by patterning the negative tone resist AR-N 7520.12,reactive ion etching of Si 3 N 4 waveguides with CHF 3 /O 2 plasma, and radio-frequency sputtering of GST.Bragg grating add-drop filters acting as wavelength multiplexers and demultiplexers are connected to a photonic crossbar array [249].Four sets of input vectors (X 1 , X 2 , X 3 , X 4 , X 5 ) can be encoded on light intensities with 20 discrete wavelengths.At input/output ports of a tensor core, 20/32 Bragg grating add-drop filters are used to combine/separate wavelength channels.We termed photonic tensor cores as photonic accelerators due to extremely high data rates and massively parallelism.This results in very high computational density and efficiency with multiple matrix-vector multiplications performed in a single clock cycle.
These in-memory neuromorphic systems have been exploited for AI tasks, e.g.image processing, classification, and generation [186].Optical associative monadic learning elements were interconnected to construct an associative learning network architecture [70].The 'Dogs versus Cats' dataset was utilized for examining the image classification accuracy.After training, the network learned a region of interest of a cat representation, which was further used to calculate the error (squared Euclidean distance) by comparing the cat representation and the testing images as shown in figure 14(a).It has a high classification accuracy operated with short pulses; however, it lacks the ability of extracting deep features.Feature extraction was performed by using convolutional neural networks implemented by a photonic crossbar array [28].Figure 14(b) shows a CNN for recognizing MNIST handwritten digits.A kernel was encoded onto the PCM memory elements.After image pixels convolving with kernel and applying nonlinear activation, extracted features were fed into a fully connected network for digit classification.Figure 14(c) shows the confusion matrices with a prediction accuracy of 95.3%.The calculation accuracy for MAC operations was examined with a standard deviation of 0.008.Importantly, this photonic crossbar is capable of operating at the speed of two tera-MAC operations per second.
For the above tensor cores based on the optical controlling, each synaptic weight is programmed by the optical pump pulses.The Mach-Zehnder interferometers are adopted for selective addressing of each PCM memory device in a neural network [248].These tensor cores were currently demonstrated using relatively small arrays, ranging from 3 × 3 up to a record size of 32 × 32 in [28].If it can be improved to 64 × 64, compute density (efficiency) may reach 880 TOPS mm −2 (7.0 TOPS W −1 ), superior to GPU (e.g.Nvidia Tesla P40: 0.1 TOPS mm −2 and 0.19 TOPS W −1 ) [28].To this end, the CMOS-compatible photonic-electronic integration is important for scaling up the system size.As a proofof-concept demonstration, an in-memory photonic-electronic dot-product engine was developed with high computing accuracies by interconnecting electrically reprogrammable PCM memory cells with multibit operation and over 4-bit encoding precision [71].As shown in figure 15(a), electrical pulses are sent into the waveguide microheaters to introduce phase transition of PCM elements.By adjusting parameters of electrical pulses, the amorphous-to-crystalline ratio of a PCM element can be fine-tuned to define the weight W i .At the output port of a system, dot-product operation (ΣW i •X i ) is performed by multiplexing and detecting transmitted light signals at different wavelengths.The main advantage is providing decoupled electrical programming of PCMs and photonic parallel computing, which can be performed simultaneously.Figure 15(b) shows a fabricated photonicelectronic chip based on the multiple steps of EBL, reactive ion etching of photonic waveguides, ion-implantation of microheaters, thermal evaporation of electrodes, and PCM sputtering.Four PCM memory cells were connected for constructing an in-memory dot-product engine, which was utilized in a convolutional neural network for image recognition with an inferencing accuracy of 87%. Figure 15(c  a PCM memory cell array as reconfigurable weight banks.Figure 15(d) shows the schematic of a CNN consisting of a convolutional layer and a fully connected layer for recognizing the fashion products.As an example, the input image is a sandal with an image size of 14 × 14.Four kernels are applied to extract four edges of a sandal, which are next activated by the rectified linear unit function and flattened as the input to a fully connected network with pretrained synaptic weights, and output of neurons in the fully connected network predicts the category of the fashion products with a high inferencing precision.The large switching contrast of the device is also useful in the advanced image processing.By enlarging the contrast-tonoise ratio, performance can be enhanced with a much reduced standard deviation of computing errors.Estimated compute density and efficiency are respectively 7.3 TOPS mm −2 and 10.0 TOPS W −1 for an entire photonic-electronic chip for matrix-vector multiplication.
The MPW service enables large-scale optoelectronic integration with high reproducibility of photonic devices, providing valuable opportunities for future research.Recently, C. Ríos and coworkers have demonstrated post fabrication of nonvolatile phase shifters using MPW chips supplied by Lincoln laboratory [82].This brings a promising trend of integrating high-quality PCMs on the MPW silicon photonic chips.Based on the 130 nm CMOS technology, the doped silicon layer and metal layers are electrically connected by vias, which facilitate routing of metal lines to contact pads for wire bonding and packaging with off-chip digital-to-analog/analog-todigital converters, CMOS drivers, transimpedance amplifier, random-access memory, controlling and signal processing electronics.This scenario combines the advantages of programming flexibility, high-speed optical transceiverring, and optoelectronic packaging synergies.The overall improvement in performance of PCM devices combined with high-yield wafer-scale fabrication could finally pave the way of developing the PCM-based reprogrammable PICs and deep neural networks with linear and nonlinear computation performed optoelectronically [21].

Challenges and opportunities
Photonic crossbar array combined with PCM memory exhibits a much higher compute density compared with those of electronic PCM and memristor crossbar arrays [254,255] by utilizing advantages of optical interconnects and parallel signal processing capability [27,28].However, the switching energy required for microheater-based PCM photonic devices is of nJ level, which needs to be optimized.One potential solution is enhancing light-PCM interaction, e.g. using the slot waveguide and optical resonator structures, to reduce switching energy while maintaining a large switching contrast.In addition, the cycling endurance of PCM photonic devices should be largely improved (10 6 cycles), as PCM electronic devices can reach 10 12 cycles.The failure of PCM photonic devices is mainly caused by phase segregation, loss of mass, as well as surface tension induced film deformation upon melting.With patterned subwavelength structures of PCMs, the degree of film deformation can be largely reduced [183].Leveraging phase-change heterostructure also provides a potential solution in improving device cycling endurance by suppressing phase segregation of highly confined PCM nanolayers [125,127].Besides, the density of integrated photonic PCM device is still very limited due to various reasons, e.g. the micron sized device footprint, accumulated insertion loss versus system scaling, complex circuit design, and complicated system calibration.Low-loss PCMs have been proposed to avoid absorption loss as to reducing total insertion loss of a device.A photonic-electronic hybrid system was proposed to ease complexity in the circuit design and system calibration by making use of separated electrical programming circuits and photonic probing circuits [71].Reconfigurable and multifunctional PICs based on PCMs are also a promising research direction [256].Patterning of PCM thin films can be achieved by laser direct writing [257].With this technique, more functionalities can be exploited for photon manipulations.Electrically reconfigurable PICs based on a phase shifter array [82] can also be applied in the large-scale coherent networks for light routing, integrated quantum photonics, and neuromorphic computing.In a recent review, we also discussed thoroughly how the optical properties of PCMs and the device structures can be tailored to enable more diverse applications beyond the non-volatile memory and neuro-inspired computing, including high-resolution solid-state display, intelligent infrared camouflage, spectral fingerprint recognition, optical modulator and others [258].Given the highly tunable optoelectronic properties of PCMs, it is also anticipated to integrate PCMs with other optoelectronic materials for in-sensor computing and artificial vision [259][260][261].

Conclusions
In conclusion, we have reviewed the recent progress on nanofabrication process of the silicon photonic devices and neuromorphic computing systems based on PCMs.By leveraging waveguide interconnection, these integrated phasechange waveguide devices with neurosynaptic functions construct the artificial neural networks with ultra-low energy consumption and parallel signal processing in non-volatile PCM memory units.High-performance phase-change waveguide devices were developed with optical, electrical, and mixed-mode controlling by adopting the nanofabrication techniques, including the EBL, magnetron sputtering, ion implantation, and transfer of 2D materials.Especially, fine features of subwavelength grating structures, PCM nanodisks, and plasmonic nanogaps were achieved using the state-of-the-art EBL, reactive ion etching and focused ion beam.Passive and active MPW chips supplied by the silicon photonic foundries were further integrated with high-quality PCM thin films as a backend process for developing reprogrammable PICs and matrix-vector multiplier, which are scalable for various AI applications.A low programming voltage is highly desirable to be compatible with the CMOS nanoelectronics to support flexible electrical addressing and controlling of the PCM computational memory.Future innovation in waferscale manufacturing may be to establish a BEOL process compatible with the 130 nm silicon photonic CMOS technology for rapid prototyping of large-scale neuromorphic systems with high yield, improved device performance and consistency.With standard chip packaging, computational PCM memory arrays integrated on the silicon photonic-electronic chips can be configured, calibrated, and trained efficiently with robust operation, high cycling endurance, and high reproducibility of the inferencing results in AI computing tasks.Beyond photonic memory and neuromorphic computing, PCMs offer more diverse spectrum-dependent applications using the associated changes in reflectivity, color, emission, phase shift and others upon phase transition.Given the commercial success of PCMs in electronic products, we anticipate rapid development of PCM based photonic devices towards practical use in the near future.

Figure 3 .
Figure 3. Suspended silicon waveguide platform.(a) The schematic and SEM image of a fully suspended slot waveguide.(b) The fabrication flow of a suspended waveguide platform.Panel (a) is adapted with permission from [147], Optica Publishing Group.Adapted with permission from [147] © The optical Society.

Figure 4 .
Figure 4. Suspended Ge waveguide platform.(a) The schematic of a suspended Ge waveguide with two focusing subwavelength grating couplers for fiber-chip light coupling.(b) The fabrication process of a suspended membrane Ge waveguide platform.Adapted with permission from [176], Optica Publishing Group.Adapted with permission from [176] © The optical Society.

Figure 6 .
Figure 6.PCM-nanowire integrated waveguide devices.(a) The fabrication and integration processes of PCM nanowires containing pick-up, placement, alignment and deposition steps.(b) The schematic of a microcavity device integrated with a PCM nanowire and (c) its SEM image.Adapted with permission from [201], Wiley-VCH.Reproduced from [201].CC BY 4.0.

Figure 7 .
Figure 7. Ion-implemented silicon waveguide microheater devices.The fabrication process of the back-end integration of a Sb 2 Se 3 thin film on top of an ion-implemented waveguide microheater.Adapted with permission from [82], Springer Nature.Reproduced from [82].CC BY 4.0.

Figure 8 .
Figure 8. Graphene-based waveguide microheater devices.(a) The fabrication process of a PCM photonic waveguide device using graphene microheaters.(b) The cross-sectional view of the PCM waveguide device.Adapted with permission from [226], Springer Nature.Reproduced from [226], Copyright © 2022, The Author(s), under exclusive licence to Springer Nature Limited.

Figure 11 .
Figure 11.A waveguide neural network for associative learning.(a) An optical microscopic image of an optical network for supervised learning.(b) An optical associative monadic learning element.(c) A reconfigurable Mach-Zehnder interferometer.Adapted with permission from [70], Optica Publishing Group.Reproduced from [70].CC BY 4.0.

Figure 13 .
Figure 13.A photonic tensor core based on silicon nitride waveguides for in-memory parallel computing.(a) Schematic of parallel computing implementation in a photonic crossbar array via the wavelength division multiplexing (WDM) scheme.Adapted with permission from [28], Nature Portfolio.(b) Serial data processing in an electronic computation unit, and parallel data processing with several sets of signals processed in a photonic computation unit by utilizing the WDM scheme.(c) An optical micrograph of a photonic crossbar array connected to the wavelength multiplexers and demultiplexers based on Bragg grating add-drop filters.Panel (b) and (c) are adapted with permission from [249], Nature Portfolio.Reproduced from [28],Copyright © 2021, The Author(s), under exclusive licence to Springer Nature Limited.Reproduced from [249].CC BY 4.0.
) shows an experimental setup for implementing the dot-product operation based on the incoherent combination of light signals transmitted through

Figure 14 .
Figure 14.Performing AI tasks in the developed in-memory neuromorphic systems.(a) Training of an associative network by learning the model representation of the cat and classification results by calculating error.Adapted with permission from [70], Optica Publishing Group.(b) Schematic of a CNN to classify handwritten digits.(c) Confusion matrices and accuracy of MAC operations implemented by a photonic crossbar array.Panel (b) and (c) are adapted with permission from [28], Nature Portfolio.Reproduced from [70].CC BY 4.0.Reproduced from [28],Copyright © 2021, The Author(s), under exclusive licence to Springer Nature Limited.

Figure 15 .
Figure 15.An in-memory photonic-electronic dot-product engine for convolutional image processing and classification.(a) Schematic of an in-memory photonic-electronic dot-product engine consisting of an array of electrically reprogrammable PCM memory cells.(b) An optical micrograph of a wire-bonded photonic-electronic chip, a SEM image of an electrically reprogrammable PCM device based on the SOI waveguide microheater, and an optical micrograph of an in-memory dot-product engine.(c) An experimental setup for implementing the dot-product operation.(d) A convolutional neural network (CNN) architecture for fashion product recognition.DEMUX: demultiplexer, MUX: multiplexer, PC: polarization controller, VOA: variable optical attenuator, Daq: data acquisition, ReLU: rectified linear unit.Adapted with permission from [71], Nature Portfolio.Reproduced from [71].CC BY 4.0.