Poly(ionic liquid) dielectric for high performing P- and N-type single walled carbon nanotube transistors

There is an increasing demand for low-cost and high-performance electronics which has stimulated a need for new high-performance dielectric materials. We have developed a facile synthesis of poly(2-(methacryloyloxy)ethyl trimethylammonium bis(trifluoromethylsulfonyl)azanide-ran-methyl methacrylate) (P(METATFSI-MMA)), a polymeric ionic liquid that can be used as a high-performance dielectric for semiconducting single walled carbon nanotube (SWCNTs) thin film transistors (TFTs). The P(METATFSI-MMA) polymer was synthesized at both 35 and 62 mol% of 2-(methacryloyloxy)ethyl trimethylammonium bis(trifluoromethylsulfonyl)azanide and produced p- and n-type devices that functioned under ambient conditions. These TFTs were then used to study the impact of electrochemical doping on the performance of SWCNT TFTs when switching from n-type, where an electrical double layer is formed, to p-type, where the TFSI− anions are free to interact with the SWCNTs. The TFTs operating in p-type had higher current on/off ratios and a larger transconductance than those operating in n-type, which is characteristic of electrochemically doped transistors. Furthermore, we tested the impact of operating frequency on device performance and discovered that decreasing the operating frequency of the TFTs resulted in a decreased hysteresis. The decrease in hysteresis was also observed to be more significant for the 35 mol% polymer.


Introduction
Thin film transistors (TFTs) [1,2] can be printed onto flexible/stretchable substrates and operated at low voltages, making them attractive for use as high performance (µA currents, 10 4 and higher on/off current ratios) TFTs in wearable electronics and sensing applications [3][4][5][6][7][8][9]. Low-voltage (<3 V) devices are especially in demand to help reduce the power consumption of fabricated TFTs as well as the size of battery used to power the device. However, achieving low-voltage operation requires either a very thin dielectric or a dielectric material with a high capacitance density [10,11]. Traditional polymer dielectrics such as poly(methyl methacrylate) (PMMA), poly(styrene) (PS) and poly(vinyl phenol) are limited in their applications. This is due to their low capacitance densities [12] and the challenge of high-throughput processing of pin-hole free and uniform <100 nm films [3,13]. Alternatively, the use of electrolytes provides a thickness-independent dielectric due to the formation of an electrical double layer (EDL) as a result of the mobile ions. Traditionally, organic electrochemical transistors (OECTs) are fabricated using ionic liquids [14,15] or aqueous salt electrolytes as the dielectric, which facilitates the formation of an EDL [16]. This corresponds to an accumulation of ions at the semiconductor/dielectric interface, which leads to a greater local electric field and ultimately a greater capacitance [17,18]. The high capacitance density increases charge carrier density at the semiconductor interface, resulting in larger on-currents and reduced operating voltages [19]. However, electrolyte gated devices suffer from poor stability and low switching speeds. Additionally, the devices have a liquid gate, which is not ideal for solid state applications [16,20,21]. Some of these issues are mitigated by gelling the electrolyte using a polymer additive to create a solid device that exhibits EDL formation [22]. Regardless, during operation, the mobile ions in the dielectric diffuse into the semiconductor. This is referred to as electrochemical doping and can cause slow device switching speeds. Alternatively, poly(ionic liquids) (PILs) can be synthesized to achieve the same thickness-independent EDL operation as electrolytes while avoiding electrochemical doping. PILs have one ion bound to the polymer structure with a free moving counter-ion. This allows for quasi-ionic liquid performance with the benefit of having a solid film at room temperature. When a voltage is applied the free ions (cations for p-type transistor operation, or anions for n-type) diffuse to the gate electrode interface while the corresponding polymer-bound counter-ions move to the PIL/semiconductor interface; the counter-ions are too big to diffuse into the semiconductor [23,24]. However, PILs tend to have lower ionic conductivities than electrolytes due to the increased difficulty for the ions to diffuse through the rigid polymer media [25]. Researchers have demonstrated improved conductivity by reducing the glass transition temperature (T g ) of the PIL [23,26]. If the T g drops too much and the films suffer from poor mechanical stability, they will become tacky and their processing becomes challenging [26]. The use of block copolymers combining a low T g PIL block and a high T g block enables high ionic conductivity without sacrificing the macroscopic mechanical properties of the dielectric [27]. While the block copolymer approach is a promising route, it does increase the complexity of the synthesis and the self-assembly. To further improve device performance, semiconducting single walled carbon nanotubes (SWCNTs) are used as the semiconductor. SWCNTs are among the most promising semiconducting materials for high performance and low voltage organic electronic devices [28][29][30]. This is due to their outstanding electrical and mechanical properties [31][32][33]. SWCNTs have been known to achieve carrier mobilities >100 cm 2 V −1 s −1 with high output currents and large on/off ratios [34]. These devices can also operate as both p-and n-type transistors. Despite this, the vast majority of studies report p-type electrical behaviour due to their poor air stability and electron suppression in ambient environments [35][36][37].
In this study, we demonstrate the easily synthesized poly(2-(methacryloyloxy)ethyl trimethylammonium bis(trifluoromethylsulfonyl)azanideran-methyl methacrylate) (P(METATFSI-MMA)) as a dielectric in top-gate bottom-contact SWCNTs TFTs (figure 1). By varying the weight percentages of 2-(methacryloyloxy)ethyl trimethylammonium bis(trifluoromethylsulfonyl)azanide we could tune the frequency-dependent EDL formation and corresponding capacitance density. We characterized this novel dielectric by operating the TFTs at different frequencies in both p-and n-type operation. Although SWCNTs are ambipolar, under ambient conditions oxygen doping suppresses n-type behaviour due to the O 2 /H 2 O redox couple [36]. To mitigate the issue of oxygen doping we fabricated the devices in a top gate architecture so that the P(METATFSI-MMA) dielectric could encapsulate the semiconducting layer and preserve n-type performance under ambient conditions [38]. Where as many studies have looked into using SWCNTs with ionic gels/liquids [39][40][41], this is the first study to use PILs to fabricate p-and ntype SWCNT TFTs that operate under ambient conditions. Under p-type operation the TFSI − anions are free to diffuse and interact with the SWCNTs monolayer giving them properties like that of OECTs. Under n-type operation the device operates as high performing TFTs. The change in electrical properties of the SWCNT, including transconductance, hysteresis and on/off ratios were highly dependent on the PIL structure and operating frequency.
1 H NMR spectra were obtained with a Bruker Avance II 400 MHz spectrometer.
Size exclusion chromatography (SEC) was performed on a Malvern Omnisec, equipped with Omnisec Resolve pump and autosampler (CHR7100) with two T6000M columns and Omnisec Reveal (CHR6000) differential refractive index, diode-arraybased UV/Vis spectrometer, and Viscotek SEC-MALS 20 multi-angle light scattering detectors. DMF with 0.01 M LiBr was used as the eluent at 40 • C with at a flow rate of 0.5 ml min −1 . The dn/dc values (0.059 for PMMA, 0.061 for P(DMAEMA-MMA)-62% and 0.062 for P(DMAEMA-MMA)-35% ml g −1 ) for the polymers were determined by the instrument using a PMMA standard as a reference in the same eluent.

Dielectric and semiconductor preparation
P(METATFSI-MMA) solutions were prepared under ambient conditions. P(METATFSI-MMA) was dissolved in 2-butanone at a concentration of 80 mg ml −1 and filtered using 0.45 µm filters.
The semiconducting SWCNTs were prepared using a poly(9,9 ′ -didodecylfluorene-co-N-(2 ′ -decylte tradecane)-carbazole) polymer in toluene following previously reported procedures [42]. The PCF synthesis has also been reported for dispersions of SWCNTs prepared via plasma growth and purchased from Raymor Nanointegris (diameter ∼ 1.5 nm, length 0.3-4 µm) [43]. The SWCNT dispersions were not filtered prior to use [44]. The concentration of SWCNTs in the dispersion was estimated from the S 22 peak height using UV-vis-near infrared (NIR) spectroscopy (figure S8). The dispersion concentration was adjusted so that the peak height was 1.5 a.u.

Thin film characterization
A Bruker dektak XT profilometer was used to determine the thickness of the fabricated PIL films.

Metal-insulator-metal capacitor fabrication
Metal-insulator-metal capacitors were fabricated on 1 in 2 glass substrates. The substrates were cleaned using a four-step cleaning process where the substrates are sonicated for 5 min in soapy water, distilled water, acetone, and methanol sequentially and dried under a stream of nitrogen. Following the cleaning process 5 nm of chromium (Cr) and 50 nm of gold (Au) were deposited sequentially onto the glass substrates using physical vapour deposition (PVD) and a shadow mask. Next, 200 µl of the PIL solution at 80 mg ml −1 was spin-cast dynamically onto the 1 in 2 glass substrates at 2000 rpm for 90 s under ambient conditions using a Laurell WS-650-23 spin coater. The substrates were then annealed under vacuum for 1 h at 130 • C. Finally, 50 nm of Au was deposited through a shadow mask using PVD. This yielded ten metal-insulator-metal (MIM) capacitors per substrate with surface areas from 0.35 to 2.88 mm 2 . About 20 MIM capacitors were fabricated for each polymer.

Metal-insulator-metal capacitor characterization
A Methrohm PGSTAT204 was used to perform potentiostatic impedance measurements with an amplitude of 10 mV within the frequency range of 10 −2 -10 5 Hz. Both the dielectric constant κ and the capacitance C i can be calculated using the equations below where Z ′ is the real portion of the impedance, Z ′′ is the imaginary portion of the impedance, t is the film thickness, ω is the angular frequency (2πf), A is the area of the capacitor and ε 0 is the permittivity of a vacuum: The capacitance equation can then be divided by the area of the capacitors to give the capacitance density.

TFT fabrication
TFTs were fabricated on 15 × 20 mm quartz coated glass substrates. The same cleaning procedure used for the metal-insulator-metal capacitors was used to clean the Ossila substrates. Next, the source-drain (SD) electrodes (5 nm Cr, 50 nm Au) with a width of 1000 µm and a length of 30 µm were deposited onto the substrate through a shadow mask using PVD. A 5 nm chromium layer was used to facilitate gold adhesion to the substrate. Next, the substrates were submerged in a 1% solution of octotrichloro silanes (OTSs) in toluene overnight at 70 • C to create a thin OTS layer on the substrate. The OTS layer increases the hydrophobicity of the substrate and improve SWCNT deposition [42]. Following the OTS treatment, the SWCNTs were deposited through a drop casting technique. SWCNTs dispersed in toluene were sonicated for 15 min. Next, 0.5 µl of the sc-SWCNT dispersion was deposited between the SD electrodes via drop casting. This was repeated for each individual transistor. The entire substrate was rinsed four times with 1000 µl of toluene to remove any excess unbound polymer leaving a mono layer of SWCNTs. The rinsed substrates were then dried using a steady stream of nitrogen and annealed in air at 200 • C for 1 h. After depositing the SWCNTs, the PIL layer was deposited by spin coating. About 200 µl of PIL solution at 80 mg ml −1 was spun onto the substrate dynamically at 2000 RPM for 90 s and then annealed under vacuum at 130 • C for 1 h. Finally, the gate electrode was deposited onto the PIL layer using PVD (50 nm, Au). This allows for the fabrication of 20 individual transistors per substrate. About 20-40 transistors were fabricated for each polymer.

TFT characterization
A Keithley 2614B with custom LabVIEW software was used to characterize the electrical properties of the TFTs. The TFTs were characterized using a custombuilt probe station designed by Element Instrumentation Inc. and Kreus Design Inc. (oesProbe A10000-P290). The measurements were performed under ambient conditions and the transfer curves were measured in the linear region. The output curves were all measured at 10 Hz. The transfer curves were taken at various frequencies by taking measurements while pulsing the gate on and off. By changing the on/off time with the following equation, the TFTs can be tested at a set frequency: The following equation was used to model the source-drain current (I SD ) in the linear regime: where L and W are the channel length and width, µ is the mobility, C i is the capacitance density, V T is the threshold voltage, and V SD and V GS are the source-drain and gate-source voltages. The following equations were used to calculate V T and g m [45] in the linear regime: The hysteresis was calculated as the absolute difference in threshold voltage between the forward and reverse sweeps of the transfer curves. The on/off current ratios (I ON/OFF ) were calculated using the minimum and maximum currents.

Results and discussion
Well-defined poly(dimethylaminoethyl methacrylateran-methyl methacrylate) random copolymers (P(DMAEMA-ran-MMA)), with 35 or 62 mol% of METATFSI, were synthesized by reversible additionfragmentation chain-transfer polymerization. The polymers underwent a simple quaternization reaction followed by ion exchange to provide the bis(trifluoromethylsulfonyl)azanide (TFSI − ) counter ion, to produce P(METATFSI-MMA). Full polymer characterization can be found in the supporting information. Metal insulator metal capacitors were fabricated on glass substrates and characterized using a potentiostat over a 10 −2 -10 5 Hz frequency range. Figure 2 shows the development of an EDL as a function of copolymer composition for the PILs with 0% (pure PMMA baseline), 35 mol% and 62 mol% of ionic METATFSI repeat units. In figure 2(b) the initial change in -phase angle from approximately 90 • till 45 • is considered the dipolar relaxation regime where the polymer itself begins to align with the applied electric field. Next, anything under 45 • and until the curve return above 45 • is considered the ionic relaxation regime where mobile ions begin to diffuse towards the negative or positively charged electrodes. Once the -phase angle curve has returned above 45 • it is considered in the EDL formation regime and when the curve plateaus the EDL is considered fully formed [18]. For the 62 mol% sample the EDL is almost fully formed at 1 Hz whereas for the 35 mol% sample, the EDL has not fully formed at frequencies as low as 10 −2 Hz. The frequency at which the EDL forms is dependent on several factors such as the glass transition temperature (T g ), as well as the size of the free ion [46,47]. The lower T g allows for softer films facilitating the movement of the free ions through the PIL and larger ions increase the conductivity. For this study, both polymers were functionalized with TFSI − ions. However, increasing the percentage of METATFSI from 35 mol% to 62 mol% resulted in a decrease in the T g from 99 • C to 88 • C ( figure S9). The lower glass transition temperature facilitates the migration of TFSI − anions through the polymer layer, which likely leads to an increase in the frequency at which the EDL begins to form [27,48]. This suggests that increasing the mol % of META-TFSI leads to an increase in device performance by lowering T g . However, if the T g is too low the films become tacky, which is not desirable. The ion conductivity for both the 35 and 62 mol% samples was calculated using the parallel resistance from a circular fit to the semi-circle portion of the Nyquist plots obtained through EIS (figure S10). The conductivity (σ) is calculated from the thickness (d), the bulk resistance (R b ), and the area of the capacitor (A) using the following equation: σ = d/(R b A) [23]. Using the previous equation, we obtained conductivities of 3.47 × 10 −11 and 1.78 × 10 −9 S cm −1 for the 35 and 62 mol% samples, respectively. The conductivity of the 62% sample is comparable to other random copolymer systems, which are still solid at room temperature and have a TFSI − counter ion [27,48]. Figure 2(a) demonstrates the change in capacitance density as a function of operating frequencies.
The maximum capacitance densities obtained for the 35% and 62% PILs were 1.15 and 1.78 µF cm −2, respectively. Figure 2(b) demonstrates that, just past 10 Hz, the -phase angle is in the EDL formation region for the 62 mol% PIL [18]. The dotted lines in figure 2 represent the operating frequencies used to characterize the TFTs in the next section. Finally, the 62 mol% capacitors were characterized before and after being exposed to 99% relative humidity for 10 min and showed no change in dielectric performance (figure S11). These results suggest these novel PILs show negligible moisture sensitivity, a characteristic that is rare for PILs [49].
Polymer-sorted SWCNT TFTs were fabricated using the P(METATFSI-MMA) copolymers as the gate insulator with composition for the PILs of 0% (pure PMMA baseline), 35 mol% and 62 mol% of METATFSI ionic repeat units. Baseline SWCNT TFTs were fabricated using a PMMA dielectric and only demonstrated p-type behaviour in air as seen in figure S12. Average hole mobilities of 0.27 ± 0.22 cm 2 V s −1 , threshold voltages, V T = −3.1 ± 1.2 V and 10 3 on/off current ratios were obtained for these baselines devices which is consistent with other low-k polymer dielectrics using SWCNTs [50][51][52]. When using PMMA the lower dielectric constant in combination with a dielectric thickness of approximately 300 nm results in lower capacitance values. This combination with the lower operating voltage reduces the performance of the PMMA TFTs. The PMMA dielectric did not lead to functioning n-type characteristics, which is consistent with exposure to oxygen that leads to doping of the SWCNTs and suppression of n-type device characteristics [53,54]. However, both the PILs with 35 mol% and 62 mol% of METATFSI repeat units were able to operate as both p-type and n-type transistors under ambient conditions. Figure 3 demonstrates the output curves for the SWCNT TFTs fabricated using PILs with 35 mol% and 62 mol% of ionic repeat units under both p-and n-type conditions operated at 10 Hz. The devices fabricated with 35 mol% PIL samples showed non-ideal output curve characteristics, such as non-ideal saturation in the output curves at 0 and 3.75 V ( figure 3(a)). This is most likely caused by the 35 mol% sample being tested at the threshold of the dipolar relaxation region and the beginning of the ionic relaxation region, where charges begin to migrate in the PIL bulk towards the electrodes [18]. The larger perceived leakage current for these devices can be attributed to this migration of ions. Under p-type operation the TFSI − anions will diffuse towards the SWCNT network, allowing them to interact directly with the SWCNTs. This can lead to non-ideal transistor behaviour. However, for the 62 mol% PILs at 10 Hz ( figure 3(c)), the ion conductivity is greater and the ionic relaxation phase is transitioning towards EDL formation, thus removing the noise caused by charge migration. The fast formation of the EDL increases the number of TFSI − anions at the dielectric/SWCNT interface and allows the devices to reach charge carrier saturation faster, enabling lower operating voltages for the p-type devices [55]. When analysing the ntype performance, both devices produce similar output curves. This is to be expected as no electrochemical doping takes place during operation. This is due to the TFSI − anion being drawn to the gate and the resulting cation PILs being drawn to the semiconductor interface while being too large to diffuse and closely interact with the SWCNT matrix ( figure 1(b)).
To further probe the PIL dielectric characteristics, we characterised the devices at different voltage sweep rates which can be expressed as different operating frequencies and are reported in the corresponding transfer curves of figures 4 and 5. The voltage sweep rate frequency is determined by increasing the on/off delay of each voltage step. For example, f (Hz) = 1000/(on time + off time ) ms. Therefore a 10 Hz voltage sweep rate would have an on time of 80 ms and an off time of 20 ms. For this analysis, the various frequencies match the colour of the dotted lines from figure 2. Table 1 highlights the n-type performance of devices fabricated using the 35 mol% and 62 mol% PILs and voltage sweep rates of 0.1, 10 and 100 Hz. The transfer curves for figures 4(a)-(c) were calculated using a SD voltage of −1 V For the devices made with 35 mol% PIL, as the frequency increases, we see an increase in the hysteresis. At frequencies greater than 10 Hz, the data becomes unreliable due to the large hysteresis values (figures 4(b) and (c)). The speed at which the EDL can be formed, as well as the corresponding mobility of the TFSI − anion and the respective PIL cation in devices are the leading factors for the observed hysteresis in PIL gated transistors [56,57]. Further, examples in literature demonstrate that when using ionic liquids with SWCNTs and a fully formed EDL the hysteresis is greatly reduced [58,59]. For the devices fabricated using 35 mol% PIL, this hysteresis can be attributed to the low ionic conductivity and the devices never fully reaching the EDL formation phase [60,61]. As the characterization frequency is decreased, the TFSI − anions have more time to diffuse through the PIL bulk, leading to a reduction in hysteresis, until 0.1 Hz where the hysteresis becomes negligible as seen in figure 4(a). For devices fabricated using 62 mol% PIL, a much lower hysteresis is observed at almost all operating frequencies due to the greater ionic conductivity, allowing the 62% sample to reach the EDL formation phase at a higher frequency (figure 4(d)-(f)). These results are consistent with the capacitor results which demonstrate that 62 mol% PIL is in the EDL formation phase between 0.1 and 1 Hz compared to the 35 mol% PIL based capacitors which only begin to transition towards EDL formation at 0.1 Hz and is in the ionic relaxation   phase for frequencies larger than 0.1 Hz [18]. For both PILs, reducing the frequency generally leads to an increase in transconductance which is a result of greater capacitance values [62]. The outlier occurred when using 35 mol% PIL sample at 10 Hz, which saw a decrease in transconductance. This decrease can be attributed to the low conductivity of 35 mol% sample [63]. Further, none of the samples operated above 0.1 Hz are within the EDL formation phase, increasing the variability on the measurements and highlighting the importance of selecting the proper operating frequency for PIL gated TFTs. When operating in the ionic relaxation region, the ionic displacement current caused by the diffusion of the TFSI − anions will impact device performance and variability [64]. The measured n-type g m at 0.1 Hz is 85 µS and 90 µS for devices fabricated using 35 mol% and 62 mol% PIL samples. Within literature n-type transconductances for SWCNTs have been reported to be 10-25 µS at room temperature [65,66]. The values we obtained are approximately three times larger than the previously reported n-type devices [65,66]. Furthermore, these results were obtained in air, demonstrating that the P(METATFSI-MMA) structure enables better encapsulation properties compared to PMMA and the operation of n-type SWCNT transistor devices under ambient conditions. This is uncommon for SWCNTs which are reported as ambipolar but need to be characterized under vacuum, in the absence of oxygen, to show significant electron transport and n-type behaviour [36,42]. This is consistent with reports from Li Zhou who demonstrated air stability of n-type SWCNT transistors when using ion gels based on PS 2 -block-PMMA block copolymers with 1-Ethyl-3-methylimidazolium (EMIM) + TFSI − as the dielectric [65]. The same devices were characterized under negative voltage (p-type operation), causing the corresponding TFSI − anions to diffuse into the SWCNT semiconductive layer ( figure 1(b)). The smaller TFSI − anions can migrate and interact closely with the SWCNTs, causing the device to function similar   to OECTs [16]. The devices fabricated using 35 mol% PIL as dielectric demonstrated a similar trend to the n-type devices where decreasing the operating frequency leads to a decrease in device hysteresis (table 2). The hysteresis for the devices operated at 10 Hz and 100 Hz for the 35 mol% PILs displayed large variability. The increase hysteresis with increasing frequencies is dominated by the sluggish frequency-capacitance response and the TFSI − anions doping the SWCNTs [67][68][69]. However, a large increase in hysteresis is not observed for devices fabricated using the 62 mol% PIL as dielectric as seen in both table 2 and figure 5. Therefore, we surmise the hysteresis is a result of the lower ionic conductivity of the 35 mol% PIL. Panzer et al have further demonstrated the impact of ion conductivity by reporting changes in hysteresis based on operating frequency, which they attribute to slow ion migration [70]. Within table 2 we see a similar trend  to table 1 with an increase in transconductance as the frequency is decreased. We also observe a greater overall transconductance and greater on-current for the p-type operation compared to the n-type operation, which is consistent with the operation of OECTs where the TFSI − anions enhance the p-doping and hole conductivity of the fabricated TFTs [16,40,71]. Table 2 also shows a large variability for the hysteresis, and transconductance, which is most likely caused by the interactions between the TFSI − anions and the SWCNTs, and further amplified at higher frequencies due to the devices being in either the ionic or dipolar relaxation phase. The p-type devices also demonstrate greater on/off current ratios of 10 5 for both devices fabricated with the 35 mol% and 62 mol% PILs as dielectrics at 0.1 Hz (table 2) compared to the n-type TFTs which have on/off current ratios of 10 4 and 10 3 for the same PILs, respectively. This is also to be expected as OECTs enable greater currents and larger on/off current ratios in general [72]. The slightly lower on/off current ratio at 10 Hz for the 35 mol% sample is an indication of that PIL entering the ionic relaxation regime where ionic displacement currents decrease the on/off ratio [64]. These results demonstrate that P(METATFSI-MMA) random copolymer PILs used as dielectrics enable low voltage, high performance, air-stable ambipolar transistors. By tuning the copolymer composition, we can achieve large operating frequencies, high transconductance with low hysteresis.

Conclusion
High capacitance PIL that allow for p-and n-type operation of SWCNTs under ambient conditions were successfully fabricated. Using both the 35 and 62 mol% PIL it was possible to analyse the impact of TFSI − anion doping on SWCNT performance when switching the devices from n-to p-type operation.
The p-type devices demonstrated a higher transconductance and large on/off ratios, which is standard for OECTs. Next, the frequency dependence of the fabricated TFTs was tested at 0.1, 10 and 100 Hz. The fabricated devices showed a decrease in hysteresis with decreased frequency. Further, an increase in mol% of the METATFSI chain was also shown to increase conductivity and improve device performance by increasing the frequency at which the EDL formation phase begins. The simple synthesis of P(METATFSI-MMA) allowed for the investigation of the impacts of operating frequency and ionic repeat unit mol% in high performance SWCNT TFTs.

Data availability statement
The data that support the findings of this study are available upon reasonable request from the authors.