Algorithms and software for modules of automatic neurocomputer control of smart electromechanical system such as hexapods

The article discusses issues in developing algorithms and software for specialized computing devices based on neuroprocessors, to be used in automatic control of electric- mechanical system modules (in this case study, a hexapod) in a mode that is close to real-time. The practical implementation employed an NM6406 neuroprocessor based on an MC 51.03 tool module and an MB 77.07 microcomputer, developed by the Module Research Centre.


Introduction
Controlling dynamic objects involves two modes: operation and standby, due to the rigid necessity of high-speed processing of great amounts of data. In fact, no computing control system today can ensure such processing of data at a set tempo, when such input is fed from multiple sensors; therefore, computing operations have to be parallelized into additionally connected specialized computational devices (SCDs). Such task sharing supports the unsteady condition, without slowing down the basic computing process. Two primary tasks require real-time problem-solving: the computation of control action and integration of a differential equation system. Transforming the differential system into a system of algebraic equations (vector-matrix) is convenient, as far as it enables its implementation in digital computing, namely in SCDs: their processor modules will simultaneously perform accumulative multiplication actions with multiple operands.
To develop and implement the corresponding mathematical content, algorithms and software, we propose to activate a selected set of hardware tools: neuroprocessor devices based on special-class processors (Generation 6), widely used in data processing. The choice of neuroprocessors considered such parameters as the speed of parallel processing, availability of accumulative addition, and high energy efficiency [1,2]. In our case, we chose the NeuroMatrix 640x processor family, manufactured by the Module Research and Development Centre (Moscow, Russia) [3].
The input data parameters for development of algorithms and software are as follows: -definition of digital signals from sensors; -description of algorithms for generation of management signals; -a mathematical model implemented in a SIMULINK module model of the MATLAB software package.
The source data of algorithms developed include the following: -definition of sensor signals received after conversion of analog signals from the hexapod into digital form (via an analog-digital converter).

Mathematical formalization of SCD operational tasks
The flowchart of an SCD is shown in figure 1. The device's functional purpose is to calculate optimal parameter values for a shared controller and to calculate quotients (k1, k2, k3) of PID controllers of the hexapod's movement engine, to ensure seizure-free and smooth motion of the hexapod's platform. The chart uses the following symbols: -operational matrixes received from the parameter matrixes of the hexapod and from those of the correction filters; ' P , P -parameter matrixes of correction associations (6x100); ) ( * t  -program vector function (18x1); ) (t Y -vector function of observation (signals received from the measuring system) (30x1); -vector function of the system's current state and of its programmed state at Step i of its control (100x1); R -permanent matrixes sized (3x3, 3x100, 3x100).
We can say that the basis of a neuroprocessor unit is an emulation of a formal neuron, which is mathematically a total of operations of addition and multiplication, i.e., "accumulative multiplication".
From the hexapod control algorithm, it becomes clear that the main procedure in the SCD is the multiplicationя of the matrixes by the vector: One of the vector result components is the sum of the item products of matrix lines by the corresponding items of the vector-column. This sequence of operations should be repeated as many times there are lines in a matrix. To calculate the product of matrixes by the vector, it is necessary to perform multiplication of operations n m Т   увм , where m is the number of line in the matrixes; n is the number of columns, and смв N в is the number of addition operations, defined by the formula: addition operations, or approximately 3,000 pairs of "multiplication -addition" operations.

Development of algorithm support of the SCD
As the conducted experimental research employed an NM6406 neuroprocessor based on an MC 51.03 toolkit and an MB 77.07 microcomputer, we have to say that parallelizing is made effective due to hardware support of the vector-matrix multiplication operation in the NeuroMatrix NM6406 neuroprocessor. All arithmetic computing directly related to computation of control influences is performed on a vector coprocessor. As the vector node allows handling data with variable width, it is convenient to allocate 32 bits to the integral part and 32 bits to the real part.
For development of algorithms and of program code, subprograms of the functional items (of the mathematical model of a hexapod-controlling SCD) were implemented [1]. So, the chief operation of the SCD consists in multipliucation of matrixes which can be split into a couple of elementary operations «multiplication -addition» (accumulative multiplication). For this operation, a vector coprocessor is used, i.e., a shared matrix node, to perform operations of accumulative multiplication with arithmetic and logical operations, masking, and enabling vectors and matrixes.
The accumulative multiplication is performed in the operational matrix of the neuroprocessor [4]: where i X is a data item sent to the vector coprocessor input; j Y is the subsum accumulated at the previous stage of weighted addition, or the remainder from the previous operation; ij W -the weight quotient, stored in a dedicated cell of the operating matrix of the processor; m -the number of columns in the operative matrix of the processor; n -the number of lines in the operative matrix of the processor.
Data input at X should be multiplied by the number of the matrix cells, they are further added column-wise, which means that in case of overflow there occurs a loss of sign bits. Data from the Y input are added item-wise with the multiplication product, resulting from operations with the data of the X input.
To perform weighted addition, we must first export ij W weighted quotients into the matrix.
Partitioning of matrixes into lines is defined in the sb2 operational registry. It provides preliminary partitions of 64-bit input data words that are sent to the Y input. Operational matrix partitioning into column is set in nb2 operational registry. The same registry defines partitioning of 64-bit data at the Y input and is also preliminarily entered as a word in the registry. The same registry defines the computing bit rate that will move to the AFIFO buffer registry in the end. Thus, input data (operands) and output values are packed into 64-bit words during partitioning. All operations in the matrix are performed as parallel within one stroke.
The accumulator of two or more operands is implemented via a vector unit of the processor and operations of weighted addition (Figure 1) with void multiplication, i.e., a "single" shadow and operational matrix (where each 64x32 bit is filled with single bits). The effectiveness of this operation depends on the bit rate of input data, as the computing speed is increased via matrix partitioning into rows and columns, because work is performed simultaneously on several operands. One important property of a vector processor is its ability to work with operands of various length. Activation functions are implemented with the help of the processor's vector unit and operations of weighted addition (Figure 1). Subprograms of two activation function types are implemented: the threshold function and the overflow function. In activation units computation is performed on packed data words. Activation units allow using activation functions on all items of a packed word simultaneously. The main role in controlling the activation functions is that of the f1cr and f2cr registries. The activation units are located between the masking device and the operational matrix or the vector calculator. The activation function may be performed on input X or Y data, or on both inputs.
All elemental basic operators are implemented in macros form in the neuroassembler language.

Development of software for SCD operation
For work convenience with various source data a task model was implemented, to automatically control electric and mechanical systems in the developed Visual Programming subsystem of the NP Studio software platform (figure 2).

Conclusion
The article proposes algorithms and software for a specialized computational device based on neuroprocessors, to be used in automatic control of electric-mechanical systems (in this case study, a hexapod) in a mode that is close to real-time, employing a novel computing device, an NM6406 neuroprocessor, developed by the Module Research Centre. The research proves effectiveness of the neuroprocessor in performing tasks of automatic control of electromechanical system modules, through parallel processing and consequent speed gain, use of the accumulative addition operation, and low power consumption.