Design and development of Low Gain Avalanche Detectors using Teledyne e2v process

The Low Gain Avalanche Detectors (LGAD) has become the preferred technological choice for fast track timing detectors in High Energy Physics applications. Additional uses of such sensors are currently being investigated, ranging from Light Detection and Ranging (LIDAR) to Low Let particle dosimetry in medical and space applications. This paper describes the development and test of LGAD devices, fabricated using a commercial process from Teledyne e2v silicon foundry. Motivation behind the project, and details of the TCAD simulations of the manufacturing process and of the electrical performances of the devices will be provided. Test results on gain and time resolution using laser injection will also be shown.


Introduction
Low Gain Avalanche Detectors (LGADs) represent an evolution of standard PIN silicon sensors based on  junction, shown on the left side of figure 1.In the typical incarnation they consist of a  ++ - + -- ++ structure, as shown on the right side of figure 1 In the LGAD device, an additional  + doped layer (usually boron, with a density of around 10 16 cm -3 and thickness of around 0.5-1 μm) is implanted below the  junction.This layer, usually called the gain layer (GL), when depleted creates an electric field high enough to start impact ionisation, which leads to charge multiplication.The resulting charge gain increases the signal-to-noise ratio and it allows for achieving fast timing resolution [1,2].The Junction Terminating Extension (JTE) region at the edge of the GL is introduced to increase the breakdown voltage.The p-stop region isolates the neighbouring cells in a multi-cell structure.
Owing to their timing characteristics, LGADs have been proposed as the technology choice for the timing sensors of the High-Granularity Timing Detector of the Inner Tracker (ITK) [3] of the ATLAS experiment for the HL-LHC at CERN [4].Additional potential applications are being investigated in the field of radiation dosimetry and X-ray detection [5,6].
In this paper the design, simulation and test results of LGAD fabricated using the silicon manufacturing process provided by the semiconductor foundry Teledyne e2v (Te2v, [7]) are described.
-1 -Section 2 describes the layouts and the TCAD simulations of the LGAD devices.In section 3 test results of the fabricated devices are shown and discussed.Section 4 summarizes the paper and describes the next steps of this project.

Teledyne LGAD design and simulation
This project consisted of two fabrication runs.In both runs 6-inch silicon wafers featuring 50 μm thick high resistivity epitaxial layer grown on a Czochralski low resistivity substrate were used.The first fabrication run investigated the performances achievable with the available process from Te2v, compared the simulation predictions with test results and allowed to select the best-performing process combinations for the next run, which addressed the specifications of the High Granularity Timing Detector (HGTD) of the ATLAS detector.The design of the second run included the full array of 15 × 15 LGAD of the HGTD layout specifications.Figures 2 and 3 show the layouts of Run 1 and 2 design respectively.-2 - To predict the performances of the LGAD devices, TCAD simulations were carried out using the software package Synopsys TCAD [8].A simulation of the entire fabrication process of LGAD devices was done to improve the accuracy of the prediction of the performances of the devices.Figure 4 shows the TCAD simulation flowchart that includes the manufacturing process and the electrical simulation.
LGAD only JTE 31   An example picture of the final LGAD device used in the simulation is shown in figure 5.The structures obtained from SPROCESS simulations have been compared with the fabricated devices using the Secondary Ion Mass Spectrometry (SIMS [11]) and Spread Resistance Measurement System (SRMS [12]) techniques, to verify the accuracy of the process modelling.Figure 6 shows an example of superimposed TCAD and SIMS/SRMS test results of LGAD doping profiles from wafer 2 of Run 1.In the GL region, the maximum discrepancy between the TCAD and SIMS results is < 10%.The epitaxial and substrate doping show additional discrepancies near the transition boundary, starting at a depth of around 32 μm and around 42 μm.This deep region is not affected by impact ionisation or edge breakdown phenomena so such discrepancy is not relevant for predicting the gain performances of the device.
-3 - In all simulations the spatial resolution in the refinement boxes of the device mesh was set smaller than the Debye length, and, for the transient simulations, the time step intervals were set to values of the order of the dielectric relaxation time [13].For the simulation of the impact ionisation process, the Okuto-Crowell [14] and the University of Bologna [15] models were used.These models represent complementary cases of impact ionisation processes, with the University of Bologna model stemming from the Shockley theory of 'lucky' electrons [16] whereas the Okuto-Crowell model from Wolff's theory [17].In the first case, the carriers distribution function is peaked in the direction of the field whereas in the second case is nearly isotropic.The validity of a local model for impact ionisation, i.e. the condition where the ionisation coefficients depend only on the local value of the electric field and not on the previous history of the carrier, was deduced from the TCAD simulations by investigating the extent of the changes of the electric field  over the average distance () −1 between two ionising collision events, requiring that [18]:

JINST 19 C01038
where (  ) is the ionisation coefficient at the maximum field   .In figure 7 an example of the LGAD internal field configuration biased at 95 % of breakdown is shown.The ratio of the field derivative    , which has the same magnitude as the field in the GL region, and the product (  )   yields a value that satisfies the condition (2.1) in the GL region, where the value of (  ) is high.This justifies the use of a local model for the ionisation coefficients of the LGAD devices developed in this project.
The charge collection and gain were estimated from transient simulations using the optical and ion charge injection functions available in TCAD by comparing the charge collected by an LGAD and by a PIN diode of the same layout and under the same biasing conditions.In both simulations, the injected charge was around 1 fC.In figure 8 the predicted gain versus bias normalized to the breakdown voltage   , both for optical and MIP injections and using the two different impact ionisation models, is shown for a type 3 LGAD device from wafer 2. The effect of gain suppression [19] is evident in the case of MIP charge injection.
-4 - From the simulation results a total of eight different GL doping were selected for the first run of fabrication.Table 1 reports the details of the (normalized) dose and energy of GL 11 B implant used.Table 2 reports the details of GL doping used in Run 2 fabrication that were selected following the test results from Run 1.

Test results
A complete set of IV, CV, gain and time resolution tests were performed on type 3 LGAD and PIN devices from wafers 2, 8 and 9 (WF2, WF8 and WF9) of Run 1.An example of IV plots of five LGADs chosen from opposite locations on WF2 to investigate the uniformity of characteristics is shown in figure 9 along with the IV of the PIN diode.The breakdown voltage   of the devices was determined from the IV measurements as the voltage at which the current exceeded 200 nA.The PIN diodes show a typical   higher than 500 V.The average LGAD leakage current   at full depletion is around 10 -9 A cm -2 .The gain layer depletion   and full depletion voltage    of the LGAD devices were determined from CV measurements.The average capacitance of the devices at full depletion was measured to be 2.5 pF.In table 3 the results for the three LGAD flavours tested are reported.
LGAD devices from Run 1 were tested for gain and time resolution using a laser injection system, shown in figure 10, operating at a wavelength of 1064 nm and providing optical pulses of 15 ps FHWM.The laser intensity was calibrated to inject around 0.7 fC in a PIN diode of the same 50 μm epitaxial thickness.The collected charge from the DUT was measured by integrating the output pulse from a Transimpedance Amplifier (TIA) used for the readout and dividing it by the value of the TIA gain.The LGAD gain was determined by measuring its collected charge and comparing it to the PIN collected charged under the same biasing condition.In figures 11 the results of gain and collected charge of five type 3 LGAD devices from WF2 from Run 1 are shown.In figure 12 the gain and collected charge test results are shown for five type 3 LGAD from WF 2, 8 and 9 with the applied bias voltage normalized to the breakdown voltage and compared with the TCAD results.The simulations using the Okuto-Crowell model for impact ionisation match the measured LGAD gain up to values of the bias voltage of approximately 80% of the breakdown.-6 -    The time resolution was measured using the Split Delay and Recombine technique, where the standard deviation of the delay between an LGAD output pulse and its delayed copy following a laser charge injection is measured [20].To compensate for the time walk effect, a Constant Fraction Discriminator (CFD) technique was applied to the data [21].In figure 13 the time resolution (or jitter) results and the slew rate are shown for five type 3 LGAD devices from WF2.The slew rate was calculated as the maximum value of the first derivative of the LGAD output signals.Figure 14 illustrates the jitter results for WF2, WF8 and WF9 with the bias voltage normalized to breakdown voltage using a CFD = 25%, which corresponds to the point of maximum steepness in the LGAD output signal.With the bias normalized to the breakdown voltage all the LGAD flavours tested showed very similar time resolution of around 10 ps.

Conclusions
In this paper, the design, simulation, fabrication and characterization of LGAD devices have been described.Aspects of TCAD simulation have been discussed and predicted gain results, including gain suppression, have been shown.Two runs of fabrication have been completed, with the first one used to investigate the achievable performances from the available fabrication process from the Te2v foundry and the second run targeting the specifications of the HGTD of the ATLAS ITK.
The process simulations have been compared with SIMS results from devices of Run 1 fabrication and showed the accuracy of simulations of the doping profile to be of the order of 10% or better.
The TCAD predicted gain obtained from a laser injection, when the bias voltage is normalized to the breakdown voltage, matches the results up to approximately 80% of the breakdown.Using the laser injection setup a maximum gain up to approximately 90 with a bias of 95% of the breakdown voltage was measured.The measured jitters were around 10 ps for all Run 1 LGAD flavours tested.
The next step of this project will consist of performing the time resolution measurements using a radioactive source and repeating the tests on a set of neutron and proton-irradiated LGADs to investigate their radiation resistance.A custom readout design to perform tests on the Run 2 LGAD array is currently underway.

Figure 1 .
Figure 1.Left: a cross-section of a PIN diode at full depletion, consisting of a pn junction in a high resistivity p-type ( + ) substrate.Right: an LGAD cross section at full depletion.The gain layer (GL) consists of a  + layer placed beneath the  ++ cathode well.Both structures have been obtained from TCAD simulations, with the colours showing the different doping.The white line shows the extension of the depletion region.

Figure 3 .
Figure 3. Left: the Run 2 layout of a single cell, with the central hole and rectangular slit on the cathode for laser charge injection.Right: the full layout of the 15 × 15 cell array.The cells of the array have a cathode size of 1.3 × 1.3 mm 2 .

Figure 4 .Figure 5 .
Figure 4.The process flowchart of the TCAD simulation.The SPROCESS [9] steps (yellow boxes) refer to the TCAD simulation of the manufacturing process.The output structure from SPROCESS is sent to SDEVICE [10] (green boxes) for the simulation of the electrical characteristics.

Figure 6 .
Figure 6.An example of comparison of the doping profile from TCAD and SIMS/SRMS for an LGAD from wafer 2 of Run 1.The inset shows a magnified view of the GL doping.

FieldFigure 7 .Figure 8 .
Figure 7.The internal electric field configuration in an LGAD biased at 95% of breakdown to investigate the validity of the local model for the ionisation coefficient.

Figure 9 .
Figure 9. IV plots of five LGADs from WF2 from Run 1.The PIN diodes are from the same wafer.The guard ring was kept floating.T = 21 °C.

Figure 10 .
Figure 10.The laser injection setup at Oxford Physics Microstructure Detector (OPMD) laboratory for gain and time resolution test.The DUTs are placed on a custom Transimpedance Amplifier (TIA) board designed at OPMD, the Compact OPMD LGAD Amplifier (COLA).

Figure 11 .Figure 12 .
Figure 11.Laser gain and charge collected of five type 3 LGAD devices from wafer 2.

Figure 13 .Figure 14 .
Figure 13.The jitter and slew rate of five type 3 WF2 LGAD devices from wafer 2 of Run 1.

Table 1 .
Dose and energy of the11B layer (GL) implants in the Run 1 LGAD production.The values are normalized to the dose and energy adopted for wafers19, 20 and 21.

Table 2 .
Dose and energy of the11B layer (GL) implants in the Run 2 LGAD production.The values are normalized to the dose and energy adopted for wafers 19, 20 and 21 of Run 1.