Low power consumption and fast response of low dropout regulator design

A low power consumption and fast response low voltage difference linear regulator circuit is designed for on-chip SOC circuit to achieve low power consumption, fast response, and high stability. The internal design mainly includes a low power bandgap reference circuit, a light and heavy load detection circuit, and a transient enhancement circuit. The circuit is designed with 0.35 μm BCD technology, and the layout design is completed. The VIN is from 2.5 V to 5 V, the VOUT from 2.5 V to 3.3 V, and the maximum load is 250 mA. The simulation results show that the static current is 2.6 μA at normal temperature with no load. When the load jumps, the overshoot is 44 mV and the recovery time is 52 μs, meeting the design requirements of low power consumption and fast response.


Introduction
In electronic equipment and systems, power performance is particularly important.The performance indicators of the power supply are related to the performance of the electronic equipment, and conversely, in the process of design and production of the electronic equipment, The performance of the power module is particularly important [1] .LDO (Low Dropout Regulator) is a Common DC regulated power supply in the current power supply market.It has the characteristics of a small area, a simple structure, and a cheap price.LDO controls the output current and stabilizes the output voltage by controlling the conduction degree of the regulator through the error amplifier.Compared with the switching noise caused by the switching of the switching MOSFET when the switching power supply is working, the linear voltage regulator does not introduce switching noise.This is because the linear regulator is in a fixed state when the adjustment MOSFET is in a fixed state during the adjustment process, which also makes the PSRR (Power Supply Rejection) index of the linear regulator better than the switching power supply [2] .However, because the output voltage of the linear regulator can only be lower than the input voltage, the switching power supply can be boosted by the capacitance inductance to make the output voltage higher than the input voltage, making the power efficiency of the linear voltage regulator lower than that of the switching power supply [3] .Combined with the characteristics of the two types of switching power supply, the linear voltage regulator has lower power consumption, less noise, and more cost savings.

Low power consumption fast response LDO
LDO for the low-power fast transient response can not only prolong the standby time of electronic equipment but also improve the response speed of the equipment.However, for LDO, its power consumption and response speed are opposite design indexes, and there is a certain difficulty in both.Therefore, the design of LDO for the low-power fast transient response has both application significance and challenge.

Basic LDO circuit structure
The voltage of LDO is relatively stable and hardly changes with the working environment, which is a good power supply [4] .A typical circuit of the LDO is shown in Figure 1.In general, the basic structure of LDO includes an operational amplifier (EA), power MOSFET, and feedback resistor.Error amplifiers can be one-stage or multistage amplifiers, single-stage amplifiers have a simple structure and strong stability, but they will limit the loop gain of LDO, making the output voltage of LDO inaccurate.If the multistage amplifier is used, the loop gain can be greatly improved, but it will increase the complexity of the circuit structure, and also bring some problems to the stability of the circuit.The power MOSFET can use a triode or MOSFET, taking into account the power consumption, area, and other issues of the circuit, the most commonly used is the PMOS.The feedback network consists of feedback resistors.For traditional LDO, its output capacitance CL is a large capacitor in the microfarad level, and its main pole is at the output position.
The typical circuit of the LDO [4] .
EA represents the error amplifier, IL represents the load current of the LDO, CL indicates the off-chip output capacitance, MP represents the power MOSFET, RF1 and RF2 represent the resistance, and C1 and C2 represent the parasitic capacitance.The basic working principle of LDO is: When the output voltage VOUT changes, the feedback resistors RF1 and RF2 feedback the potential change to the in-phase input end of the EA, and then adjust the gate voltage of the MP through the EA after comparing with the VREF, Let the output voltage of LDO stabilize in a short time.The relationship between VOUT and VREF is shown in Formula 1.

Low power consumption fast response LDO
Under normal circumstances, the power consumption and response speed of LDO are opposite design indicators, and it is difficult to ensure low power consumption while also having a fast transient response [5]   .Therefore, the low power consumption bandgap reference is used to design the circuit to reduce the overall power consumption, and a load detection circuit is used to detect whether the LDO is loaded to switch between heavy and heavy loads, thereby reducing the static current when there is no load and achieving the purpose of energy saving [6] .A transient enhancement circuit is also added to the circuit to increase the response speed of the circuit.2. The core idea is the same as the traditional bandgap reference structure.which involves adding a voltage that is positively correlated with temperature and a voltage that is negatively correlated with temperature in a certain proportion to obtain a voltage that is approximately independent of temperature [7] .To avoid the use of large resistance value resistance, M13-M27 is used to form a positive temperature coefficient voltage generator chain to generate a positive temperature coefficient voltage VD.The value of VD is expressed by Formula 2: The positive temperature coefficient of the whole circuit includes three PTAT series modules, and the reference voltage VREF is expressed by Formula 3: ) ln( ) ln( The circuit needs to adjust the output voltage to about 1.2 V.If the device parameters in the positive temperature coefficient differential module are directly adjusted, the temperature compensation is easy to be abnormal.Since the negative temperature coefficient voltage is less affected by temperature changes, but can change the current flowing through the bipolar transistor, the output voltage can be slightly adjusted, so that the output voltage is stable at 1.2 V, and the desired output reference voltage can be obtained.

Transient enhancement circuit design.
The swing rate enhancement circuit based on the comparator structure is shown in Figure 3. MP is the adjustment tube, MS controls the gate voltage of the adjustment tube, and the MS gate voltage is controlled by the comparator.The principle of swing rate enhancement is once the comparator detects that the change in the output voltage exceeds the set threshold voltage VREF, it will turn on MS, at which time MS conduction provides a charging current to the capacitor at the gate of the adjustment tube.
After the VOUT returns to normal, the swing rate enhancement circuit is closed.The function of the response speed of LDO during load jump.

Light and heavy load detection circuit.
When the LDO is in the light load state, it is necessary to shut down the error amplifier and other circuits, so that the circuit is in an ultra-low power consumption state to achieve the purpose of energy saving [8] .As shown in Figure 4, the light and heavy load detection circuit is used to determine whether the circuit is loaded by detecting the load current.In the figure, MP is the LDO power MOSFET, MPS is connected to the grid of the power MOSFET, and the power MOSFET current is copied at the ratio of 1/K, I1=I2, R1=R2.When the LDO is loaded, the output voltage decreases, the M3 gate voltage decreases, M3 is turned on, and the Isens current passes through M3 to Rsens.By detecting the voltage on the Rsens, you can determine whether the circuit is loaded.

Simulation results and layout design
An LDO circuit with low power consumption and fast response is designed using the BCD 350 nm process.The VIN range is 2.5 V~5 V, the VOUT range is 2.5 V~3.3 V, and the maximum load is 250 mA.Static power consumption of LDO was simulated in the range of -40~125℃ at different process angles.The simulation results are shown in Table 1.
Table 1 The basic architecture of LDO.The minimum static current is 1.58 μA and -40℃ at the tt process Angle.The maximum is 7.47 μA and 125℃ at the sf process Angle.At the full process, the static current is less than 7.5 μA, which meets the requirement of low power consumption.
When the load current of LDO changes at a certain moment, the overshoot and recovery time of the VOUT of LDO reflect the transient response of LDO [9][10][11] .At 30 ms, the output current was mutated from 0 mA to 250 mA in 1 μ s.At this time, LDO output voltage was simulated under different processes, and the simulation results are shown in Figure 5.The worst transient response of the LDO occurs at the ss process of -40℃.At this point, the overshoot was 79 mV and recovered within 101 μs.At normal temperature tt process Angle, the overshoot is 44 mV and the recovery time is 52 μs.Meet the design requirements.
In this paper, based on the 0.35 μm BCD process model, A low-power fast-response LDO circuit is designed and simulated.The layout design is completed after the circuit simulation verification, as shown in Figure 6.

Conclusion
In this paper, the circuit structure and working principle of traditional LDO are analyzed.Then, based on the 0.35 μm BCD process, an LDO circuit with low power consumption and fast response is designed and implemented.The main circuit modules include a low-power bandgap circuit, a transient enhancement circuit, and a light and heavy load detection circuit.VIN from 2.5 V to 5 V, VOUT from 2.5 V to 3.3 V, and the maximum load is 250 mA.At room temperature, the static current is 2.6 μA without load.When the load jumps, the overshoot is 44 mV and recovers in 52 μs.It can meet a relatively fast response speed while achieving low power consumption.

Figure 4 .
Figure 4. Light and heavy load detection circuit.

Figure 5 .
Figure 5. Simulation of transient response under different processes.
Low power bandgap reference design.The reference voltage source structure used in this paper is shown in Figure 3 2.2.1