A simple and efficient resonant DC link inverter with low current stress on main switch

This paper proposes a simple and efficient resonant DC link inverter topology with low current stress on main switches. The inverter has a straightforward structure and is readily controllable, avoids the auxiliary resonant current passing through the main switches of the inverter, and the current passing through the main switches remains consistently equivalent to the load current, thus reducing the current stress and the switching loss of the main switches, thereby the inverter’s efficiency is increased. The proposed inverter’s operating principle is examined and contrasted with the inverter described in the literature. Ultimately, the validity of the resonant DC link inverter is demonstrated through simulation.


Introduction
With the rapid progress in photovoltaic power generation, new energy vehicles and other new energy industries, as the core of power equipment, inverters have gained significant use in photovoltaic grid-connected and new energy power generation [1] .With the continuous development of inverters in the direction of miniaturization and modularization, it is necessary to raise the switching frequency to reduce the transformer volume, thereby reducing the inverter volume, but it will increase the loss of the switches, and bring severe electromagnetic interference (EMI).The proposal of soft-switching technology effectively solves this problem, and reduces the switching loss of inverters while ensuring the rise of system switching frequency, thus improving the system's efficiency.
Soft-switching inverters are primarily categorized into resonant DC link inverters [2] and auxiliary resonant pole inverters [3] .Compared with the auxiliary resonant pole inverter, the structure is complex and the hardware cost is high, the resonant DC link inverter is more simple and easier to control, so the resonant DC link inverter has gained favor among this field's experts and scholars.
The inception of the resonant DC link inverter dates back to 1989 [4] .Because of its simple circuit structure and control strategy, the equipment cost is low, it has attracted numerous scholars to conduct more in-depth research.Later, with the continuous development of resonant DC link inverters, scholars from various countries proposed a variety of improved topologies [5] .For example, one scholar proposed active clamp resonant DC link inverters.And with scholars from all over the world constantly proposing new topological structures and control strategies, the performance of inverters such as volume and voltage utilization is also constantly improving.However, for all the inverters mentioned above, when the main switches are switched in the zero-voltage stage, resonant current will pass through the main switches, leading to heightened current burden and increased switching loss of the main inverter switches, resulting in a decline in system's efficiency.
With the aim of resolving this issue, literature [6] proposed an improved auxiliary circuit structure.
The topology shunt the auxiliary loop's resonant current from the load' current by connecting an auxiliary switch in parallel.However, it neglected the fact that the flow of resonant current, generated by the auxiliary resonant inductor and the capacitor in parallel with the main switches, through the main switches during the resonant process, so the circuit structure in literature [6] does not completely solve the issue of large current burden of the main inverter switches.With the intention of completely reducing the main switches' current burden, this paper proposes a novel resonant DC link inverter.This inverter has two main advantages: 1) In comparison to the literature [6], the inverter circuit suggested in this paper eliminates the need for parallel capacitors in the main switches, while maintaining the same configuration as the hard-switching inverter, and the auxiliary circuit keeps the number of switches and diodes unchanged.
2) The current passing through the main switches of the inverter remains consistently equivalent to the load current, which completely decrease the main switches' current burden and reduce the cost of system.

Topology of resonant DC link inverter
The inverter suggested in this paper is demonstrated in Figure .1.And its equivalent circuit is demonstrated in Figure .2. The DC power supply voltage of the inverter is E. Diode Dinv is equivalent to all reverse parallel diodes in the main circuit, io represents the load current, UDC-link represents DC bus voltage.

Working principle of the inverter
The working sequence of the switches of the system and the theoretical waveforms of each component are demonstrated in Figure .3, and the corresponding equivalent circuit is demonstrated in Figure . 4. The inverter has a total of 10 modes in one switching cycle, and its specific operation principle is as follows: 1) Mode 0[~, t0]: the bus switch Sa1 is on, the auxiliary switch Sa2 is off before t0, the load current io passes to the load through Sa1, and the circuit is in a stable running state, the auxiliary circuit does not work.At this time: 2) Mode 1[t0, t1]: Sa1 is turned off at t0, and capacitors Ca1 and Ca2 simultaneously discharge linearly to the load.Since the voltage build-up rate of Sa1 is limited by capacitors Ca1 and Ca2, Sa1 realizes quasi-zero voltage (quasi-ZVS) off.During this period, the capacitor voltage of the auxiliary circuit is as follows: The voltage of Ca1 and Ca2 drops to 0 at t1, then this mode is over.The mode's time is: 3) Mode 2[t1, t2]: the bus voltage reaches to 0 at t1, D1 is naturally turned on, Sa3 is turned off, Sa3 realizes ZVZCS off, the load current circulates through D1 in the main inverter circuit, the main inverter circuit works in the zero voltage stage, and the main switches realizes zero voltage on and zero voltage off during this period.The auxiliary circuit is out of action.
4) Mode 3[t2, t3]: Sa2 and Sa3 are turned on at t2, and the current of La1 starts to increase in a linear manner.Under the action of La1, Sa2 and Sa3 realize quasi-zero current (quasi-ZCS) on.During this period, the current of La1 is: The current of La1 rises to load current io at t3, and D1 is turned off naturally, then this mode is over.The mode's time is: 5) Mode 4[t3, t4]: La1 and Ca1 begin to resonate at t3, and Ca1 and La1 are charged at the same time.During this period, the resonant elements' voltage and current of the auxiliary circuit are: The Ca1 voltage rises to E, and the current of La1 reaches its peak value, La1max at t4, then the mode is over.The mode's time is: The voltage of Ca2 rises to E at t6, then the mode is over.The mode's time is: t7]: Da2 is turned on at t6, the remaining energy of La1 is returned to the power supply, and the current of La1 is linearly reduced through Da1.During this period, the inductor current is: When the current of La1 decreases to io at t7, and Da1 is turned off naturally, then the mode is over.The mode's time is: 9) Mode 8[t7, t8]: the inductor current continues to decline linearly through Sa1 at t7.During this mode, the inductor current is: The inductor current drops to 0 at t8, then the mode is over.The mode's time is: Theoretical waveforms of the system.Figure 4. Equivalent circuits of modes.

Comparison of current burden of main switch
Based on the analysis provided above, throughout the entire soft-switching process, The maximum current burden of the main switches is equal to the load current: Figure .5 demonstrates the key mode of the resonant DC link inverter suggested in literature [6].Through the analysis of the whole operation process of the circuit, it can be seen that under this mode, the current passing through the main switches makes main switches' current burden reach the maximum at a certain time, the current passing through the main switch S1 is: where, iLrmax is the maximum resonant current [6], iLrmax >iomax.
It can be seen from ( 15) and ( 16) that the suggested inverter in this paper has a lower current burden on the main switches compared to the one mentioned in literature [6] within the full load range.It is concluded that the current burden issue of the main switches is not fully resolved in literature [6], however the inverter suggested in this paper completely declines the main switches' current burden.Figure 9.The waveforms of Sa3.

Conclusion
The inverter suggested in this paper completely decreases the main switches' current burden without increasing the auxiliary switching element.Through theoretical analysis and simulation verification, the outcomes can be summarized as follows: 1) The current passing through the inverter's main switches remains consistently equal to the load current, completely reducing the main switches' current burden, reducing the main switches' conduction loss, improving the overall efficiency, the reliability and stability of the system; 2) The auxiliary loop arrangement of the system is simpler, easier to manage, and results in cost savings.

Figure 1 .
Figure 1.The resonant DC link inverter of this paper.Figure 2. The equivalent circuit.

Figure 2 .
Figure 1.The resonant DC link inverter of this paper.Figure 2. The equivalent circuit.

6 )
Mode 5[t4, t5]: the current of La1 circulates through Da1 and Sa1 at t4, during which Sa1 is turned on, Sa1 realizes ZVZCS on.7)Mode 6[t5, t6]: Sa2 is turned off at t5, La1 and Ca2 begin to resonate, La1 discharges, and Ca2 charges, under the action of Ca2, Sa2 realizes quasi-ZVS off.During this mode, the resonant element's voltage and current of the auxiliary circuit are: 9[t8, ~]: the diodes Da2 and Da3 are naturally turned off at t8, the DC power supply supplies power to the load through the bus switch Sa1, and the circuit returns to a stable state, and the auxiliary circuit does not work.

Figure 5 . 4 . Simulation waveform evaluation 4 . 1
Figure 5. Key mode of this circuit.4. Simulation waveform evaluation 4.1 Waveform evaluation of switches Figure.6 demonstrates that the main switch S1 realizes zero voltage and zero current on and zero voltage and zero current off.Figure.7 demonstrates that auxiliary switch Sa1 realizes zero voltage and zero current on and quasi-zero voltage off.Figure.8 demonstrates that auxiliary switch Sa2 realizes quasi-zero current on and quasi-zero voltage off.Figure.9 demonstrates that auxiliary switch Sa3 realizes quasi-zero current on and zero voltage and zero current off.

Figure. 8
demonstrates that auxiliary switch Sa2 realizes quasi-zero current on and quasi-zero voltage off.