Study on annealing effect of Ti-doped Gd2O3 films for high k dielectrics

Rare earth oxides and nitrogen oxides have drawn more and more focus as candidates for next-generation gate dielectrics in MOSFET. In this study, a Gd2O3 film doped with 3% Ti was fabricated through co-sputtering gadolinium and titanium targets in a diluted oxygen atmosphere. A systematic study was carried out to examine the annealing influence on the microstructure, surface roughness, band gap, and electrical properties of this film. Compared with as-deposited film, the annealed sample displays a smaller surface roughness (Ra=0.45 nm) and more excellent electrical performance. In terms of band gap analysis, as the annealing temperature rises from 400 to 700°C, the band gap has fallen from 4.70 eV to 4.63 eV, indicating a smaller value compared to the as-deposited sample (4.73 eV). As a result, the 600°C-annealed thin film shows the most outstanding performance with the largest k value of 23.9. Further, 600°C-annealed and as-deposited films were selected for impedance spectrum analysis and examination of the equivalent circuit. This work can offer a new insight to design novel rare earth oxides with high k dielectric and select the corresponding annealing process.


Introduction
With the increasingly powerful functions of integrated circuits, the feature size of chips is becoming increasingly miniaturized.The gate dielectric of metal-oxide-semiconductor field effect transistors (MOSFETs) is also becoming thinner and approaching the physical limit, so there is an urgent need for new gate dielectric material candidates [1,2].In recent years, rare earth oxides (REOs) have garnered increasing interest as high dielectric constant (high k) gate dielectrics for various applications, owing to their significant k value, wide band gap value, and small leakage current density [3].Out of all the REOs, Gd 2 O 3 shows significant strengths in terms of its advantageous characteristics, including a considerable band gap, excellent chemical and thermal stability, as well as the capability to withstand high crystal temperatures exceeding 1000°C.However, the k value of pure Gd 2 O 3 is relatively smaller (k~16.8)[4].Notably, titanium dioxide (TiO 2 ) stands out with its remarkably high k value of approximately 80, which has attracted a multitude of researchers to explore its immense potential as a gate dielectric [5].Nevertheless, its band gap is found to be quite small (~3.75 eV), which is a fatal flaw that limits its application as a high k-thin film [6].
In this paper, our strategy is introducing trace Ti into Gd 2 O 3 film, aiming to increase the dielectric constant of the film as much as possible while ensuring that the band gap is kept as constant as possible.
Moreover, a comprehensive analysis was conducted to investigate the impact of annealing temperatures ranging from 400 to 700°C under an O 2 atmosphere on the morphology, band gap, and electrical behavior.Finally, the impedance spectrum and equivalent circuit were undertaken to distinguish the contributions of various electronic components in Pt/Si/Ti-doped Gd 2 O 3 /Pt MOS capacitors.

Experimental details
2.1 Ti-doped Gd 2 O 3 films deposition Ti-doped Gd 2 O 3 films were co-sputtered by pure gadolinium and titanium targets in an Ar and O 2 gas mixture.To ensure a favorable vacuum environment, the base pressure of the sputtering chamber was bumped to 2×10 -4 Pa.Moreover, pure argon and oxygen with a gas flow of 30 sccm and 10 sccm respectively were introduced into the sputtering chamber.For getting the Ti-doped Gd 2 O 3 film, the sputtering power of both the Ti target and the Gd target was taken as 20 W. In addition, the substrate table was rotated at a speed of 15 r/min to ensure uniform Ti doping throughout the film.

MOS capacitors fabrication
The C-V and I-V measurement of Ti-doped Gd 2 O 3 thin films is performed based on MOS capacitors.Ptype (100) silicon substrates (1-10 Ωꞏcm) were subjected to a typical RCA cleaning procedure.After ~20 nm Ti-doped Gd 2 O 3 films were deposited on the Si substrate, a ~300 nm Pt electrode with an area of 3.14×10 −2 cm 2 was deposited by direct current sputtering.The sputtering process involved using a Pt target with a power of 80 W in an argon atmosphere with a flow rate of 40 sccm.Moreover, the area of the Pt electrode is defined by the dimensions of the shadow mask hole.For good electrical contact, platinum electrodes are also deposited on the underside of the silicon substrate.

Annealing process
In this work, Ti-doped Gd 2 O 3 samples were annealed in pure oxygen (100 sccm) to assure favorable film quality.It is worth emphasizing that the annealing temperature is a crucial parameter in the process.The surface roughness, band gap structure, and dielectric behavior of Ti-doped Gd 2 O 3 films with various annealing temperatures were systematically investigated.This work provides a reference basis for the annealing treatment of rare earth high k gate dielectrics.

Characterization
The Ti concentration of Ti-doped Gd 2 O 3 films was estimated by ICP with the equipment model of Prodigy 7. The crystalline structure of Ti-doped Gd 2 O 3 films is detected using XRD with a PANalytical X'Pert3 Powder instrument, utilizing Cu Kα radiation and a scanning rate of 2 ° min -1 .The thickness of Pt electrodes was obtained by SEM with the equipment model of Hitachi S4800.The surface roughness of Ti-doped Gd 2 O 3 films deposited on Si substrate was performed by AFM with the equipment model SPI3800/SPA400.The band gaps of Ti-doped Gd 2 O 3 films were gauged by the ultraviolet-visible spectrometer (Shimadzu UV-2410PC).The k value of Ti-doped Gd 2 O 3 films was measured by the LCR meter (TH2838H).And the leakage current density and equivalent circuit were tested by an electrochemical workstation with the equipment model CHI760D.

Microstructure investigation
The Ti content of films was determined by ICP methods, which are 3% for the Ti target of 20 W. As displayed in Figure 1(a-d), O, Gd, and Ti atoms show the average and uniform distribution in the film.Besides, the surface roughness (Ra) of Ti-doped Gd2O3 film was investigated (Figures 1(e) and (f)).The surface roughness of 600°C-annealed film (Ra=0.45nm) is smaller than as-deposited film (Ra=0.49nm), indicating that annealing can supplement oxygen vacancies and reduce potential good density [7], thereby improving its surface quality.As shown in Figure 2, there are no peaks in XRD patterns of Ti-doped Gd2O3 film annealed from 400°C to 700°C, suggesting that all films are in amorphous states.Due to the potential detrimental impact on dielectric properties, defects are more prone to be present at oxide grain boundaries, making the amorphous state the preferred structure for high k films.Besides, the amorphous structure can ensure a small leakage current, based on the fact that grain boundaries are usually fast channels for charge carriers.Moreover, the high crystallization temperature of Ti-doped Gd2O3 thin film can be well-compatible with subsequent CMOS processes.As is known, high k dielectrics act as an excellent insulation layer in MOSFET.The value of the band gap is a crucial parameter to measure the insulation properties of thin films.In this work, the band gaps of Ti-doped Gd 2 O 3 film annealed from 400 to 700°C are determined by the Tauc method.As revealed in Figure 3, the band gap value of Ti-doped Gd 2 O 3 film acquired by direct sputtering without any annealing treatment is 4.73 eV.However, following the annealing process at temperatures ranging from 400 to 700°C, there is a reduction in the band gap values from 4.70 eV to 4.63 eV.According to a previous study [8], the band gap of the undoped TiO 2 film is approximately 3.75 eV, whereas the band gap of pristine Gd 2 O 3 is greater than 5 eV.When annealed in an oxygen atmosphere, the Ti introduced into Gd 2 O 3 will further transform into TiO 2 as the temperature rises.Because the band gap of TiO 2 itself is small, its existence will pull down the overall band gap of the film.Therefore, the integration of band gap and electrical performance testing is crucial for determining the optimal annealing temperature for Ti-doped Gd 2 O 3 high-k film.

Electrical property evaluation
As illustrated in Figure 4(a), the as-deposited thin film exhibits an unfavorable C-V characteristic and the accumulation region of C-V curves is inadequately saturated, suggesting that the initially deposited film possesses numerous imperfections and a high density of potential wells.However, after undergoing appropriate high-temperature annealing treatment, the C-V characteristics of Ti-doped Gd 2 O 3 thin film improve and the accumulation zone becomes stable.Furthermore, as the annealing temperature rises from 400°C to 700°C, the capacitance value of the films shows a gradual increase to 33.1 nF and then a rapid decrease.The k value can be extracted from the accumulation area of the C-V curves.Therefore, the k value of the film also exhibits a rule that increases and then decreases in response to the elevation of the annealing temperature.Thus, the films annealed at 600°C demonstrated the largest k value of 23.9, which is more than 1.4 folds of the K value of the pure Gd 2 O 3 film (16.8).As a control, the k value of the as-deposited thin film is only 10.5, due to lots of defects in the original deposited film.As listed in Table 1, the 600°C-annealed thin film shows a positive V fb value (0.01 V) and the least EOT value (3.26 nm), suggesting that high-temperature annealing under the O 2 atmosphere reduces the traps and defects in the interfacial layer [9].As displayed in Figure 4(b), similarly, the sample's leakage current steadily decreases to 9.6×10 -4 A/cm 2 but subsequently experiences a rapid surge.In conclusion, the optimal annealing temperature for Ti-doped Gd 2 O 3 thin films has been confirmed to be 600°C, which provides a guideline for the annealing process of high-k rare earth oxide.

Impedance spectrum analysis
The impedance spectrum can distinguish the contributions of various electronic components in MOS capacitors.In this work, as-deposited and 600°C-annealed thin films were selected for impedance spectrum analysis.As revealed in Figure 5(a), for unannealed samples, two dispersion platforms with characteristics resembling relaxation phenomena were observed, while it is worth noting that the annealed samples only have one relaxation-like dispersion platform.Correspondingly, the unannealed sample of the complex impedance spectrum in Figure 5(b) also shows two Cole-Cole circles, while the annealed thin shows one Cole-Cole circle.Therefore, to conform to the above electrical characteristics, the equivalent circuit of the unannealed sample includes at least two parallel RC circuits, while the equivalent circuit of the annealed sample includes at least one parallel RC circuit [4].Furthermore, fitting by Zview soft, the equivalent circuits are displayed in Figure 5(c).Among them, the characteristic resistance and capacitance of the gate oxide film are denoted as R g and C g , respectively, while R x and C x represent the characteristic resistance and capacitance of the metal electrode contact gap [10].During the annealing process, the gap between the metal electrode contact surfaces disappears, so the equivalent circuit of the annealed thin film only exhibits a parallel RC circuit.After annealing, the electrode gap resistance R x of the sample disappears, while the characteristic resistance R g of the oxide layer decreases from 970 kΩ cm to 85 kΩ cm.Therefore, it can be inferred that annealing heat treatment has a significant impact on reducing the contact gap resistance of metal electrodes and compensating for film defects.

Conclusion
In this work, 3% Ti-doped Gd 2 O 3 thin films were prepared for high k dielectric.The optimal annealing temperature is systematically investigated.Compared with as-deposited film, annealed thin film shows relatively smaller surface roughness (Ra=0.45nm), larger k value, and smaller leakage current density.Besides, a comprehensive analysis was conducted to determine the microstructure, band structures, and electrical performance of Ti-doped Gd 2 O 3 at annealing temperatures of 400, 500, 600, and 700°C.As a result, Ti-doped Gd 2 O 3 film shows a higher excellent thermal stability, featuring remaining amorphous after annealing at 700°C.Furthermore, as the annealing temperature progresses from 400 to 700°C, there is a decrease observed in the band gap value from 4.70 eV to 4.63 eV.Moreover, the 600°C-annealed thin film holds the largest k value of 23.9 and the lowest density of leakage current, measuring 9.6×10 - 4 A/cm 2 .Therefore, the optimal annealing temperature for Ti-doped Gd 2 O 3 thin films has been confirmed to be 600°C.Furthermore, the impedance spectrum was carried out to distinguish the contributions of various electronic components in MOS capacitors.In summary, this work can provide important inspiration for the optimal annealing temperature of rare earth high k gate dielectric layers.

Figure 1 .
Figure 1.(a-d) EDS mapping of Ti-doped Gd 2 O 3 thin films.The AFM images of the Ti-doped Gd 2 O 3 thin films are depicted in (e) for the as-deposited state and (f) after annealing at 600°C.

Figure 2 .Figure 3 .
Figure 2. XRD patterns for Gd 2 O 3 film doped with Ti at different annealing temperatures.

Figure 4 .
Figure 4. (a) C-V and (b) I-V characteristics of Ti-doped Gd 2 O 3 film with various annealing temperature.

Figure 5 .
Figure 5. (a) θ and lZl as a function of frequency, (b) Nyquist plots, and (c) the equivalent circuit.

Table 1 .
Electrical parameters derived from C-V characteristics.