New event based timing system for the Taiwan Light Source

The Taiwan Light Source (TLS) is a third generation synchrotron light source that has been in operation since 1993. However, the legacy timing system is obsolete and needs to be upgraded to an event based timing system. This upgrade is intended to replace obsolete components and improve functionality. The new timing system must coordinate the operation of the linac, the White circuit based booster synchrotron, and the storage ring for beam generation, injection, extraction, and accumulation, while also supporting top up operation of the storage ring. To achieve this, a cPCI (CompactPCI) based EPICS IOC (Input Output Controller) and expandable fanless embedded computers have been adopted for the new TLS timing system, replacing the existing VME-based ILC (Intelligent Local Controller) to provide an easy to maintain control environment. However, the resonant excitation of the booster magnets with the event system requires special attention in the design and implementation phases. This paper summarizes the design ideas and implementation process for addressing this issue.


Introduction
The National Synchrotron Radiation Research Center (NSRRC) in Taiwan built the TLS as a third generation synchrotron light source, which has been operational since 1993.The TLS consists of a 50 MeV electron Linac, a 1.5 GeV booster synchrotron, and a storage ring capable of top up injection up to 360 mA.The TLS control system is a proprietary design and consists of console level workstations and VME-based intelligent local controllers (ILCs) used to interface with subsystems.EPICS (Experimental Physics and Industrial Control System) is a set of open source software tools, libraries, and applications developed collaboratively to create distributed soft real-time control systems for scientific instruments, including particle accelerators and large scientific experiments.The EPICS framework was chosen for the control system of the Taiwan Photon Source (TPS), a 3 GeV synchrotron light source, and has been operational since 2014.Given the experience gained from the TPS control system with the EPICS mechanism, the new TLS timing system has adopted cPCI (CompactPCI) based EPICS IOCs (Input Output Controllers) and expandable fanless embedded computers to replace the existing VME-based ILCs.
The main function of the TLS timing system is to synchronize and trigger all systems required to deliver beam from the electron gun through the injection system to storage ring.In addition, the timing system synchronizes beam diagnostic devices and provides controls for injection mode and selecting the subsystem individual operating.The original timing system has a centralized architecture that provides control and distributes individual signals with coaxial cables and optical fibres is shown in Figure 1.The timing system uses two kinds of modules.One is the in-house development module which is in VME form factor.The other is commercial digital delay generator.The timing control interface is provided by serval VME based Intelligent Local Controllers (ILCs) that communicate with the TLS control system via control Ethernet [1].
Figure 1.RF distribution and infrastructure of the original timing system Following an overview of modern accelerator timing systems, the most common commercial solution for event-based timing system is based on hardware from Micro Research Finland Oy (MRF) [2].To speed up development, we directly adopted the EPICS drivers used in the TPS timing system [3][4][5][6].For the upgrade and maintenance of the TLS timing system, EPICS will be used as a framework to adopt updated technologies and reuse the expertise of the staff.The new timing system will modernize controls, improve machine performance, and reduce vulnerability to single point failures and obsolete equipment.
In determining the scope of the new timing system, careful consideration is given to the many existing interfaces between the timing system and existing equipment.After a thorough examination, it has been confirmed that the event-based timing system can meet the requirements of the current system, including the logic voltage levels of timing signals, the transmission architecture, and the timing requirements of the beamline.
Another challenge is that there is very little time available for the transition to the new system, so the impact on machine operations must be kept to a minimum.Careful planning is required to minimize the risk of downtime during installation, testing and commissioning of the new system components.To meet this challenge, the project is divided into several phases so that new functions, features and equipment can be tested in smaller groups.

Shortage of original timing system
The original timing system was built in early 1993 and operated until 2022.The injector system consists of a slow and a fast timing system.The slow timing system is needed to provide a phase reference signal for the booster magnet power supplies so they can be synchronized.It must also provide timing signals for septa and bumpers.The fast timing system generates the signal needed to drive the klystron modulator, microwave system, kickers, and gun pulsers.However, there are problems that limit performance, particularly related to injection problems.One of these problems is the transmission of control commands over the control network, which in the worst case results in delays on the order of tens of milliseconds.Separate control of the various timing system settings also causes inconvenience in operation and additional beam cycles beyond what is needed.These additional beam cycles occasionally occur in the injector and result in unnecessary radiation dose.To avoid obsolescence of the old system and improve operational efficiency, an upgrade plan was initiated in 2021 to modernize the timing system and improve its functionality.

Features of new timing system
Key features of the new timing system include increasing reliability, improving command delay and functionality, minimizing maintenance, and sharing spare parts with the timing system of TPS.The timing system configuration can be easily changed as needed.The event-based timing system can precisely control the beam cycle for the injection process.The hardware jitter of the timing system, measured with respect to the RF clock, is about 20 picoseconds for the event receiver.The event receiver recovers the event clock signal from the event stream and splits the event frame into the 8-bit event code and the 8-bit distributed data bus.The decoded events are mapped through RAM and trigger pulse generator with programmable delay and width (32-bit delay and 16-bit width).The processed events can produce hardware outputs are timestamped with a resolution of 8 ns.

Bucket addressing and filling pattern
The TLS operates at a mature stage and supports only top-up mode operation with multi bunch injection.The buckets are addressed by one of the pulse generators in the event receiver (EVR), which provides 8 ns step control.The output is returned to the event generator (EVG) via an external trigger input as a reference for beam injection and extraction.Each delay time is equivalent to 8 ns (4 buckets), satisfying TLS injection requirements.The addressing scheme for the buckets and fill pattern control are shown in Figure 2. The e-gun produces a 50 ns beam ( 25 bucket bunch train) with shape variations due to tiny klystron modulator pulser amplitude variations that result in non-flattop and energy spread.Nevertheless, the trapezoidal filling pattern is preserved by the moving bucket addressing and multi-bunch injection scheme even if the beam pulse shape changes.

Warm-up of pulse magnet power supply
Some pulse power supplies for pulse magnets require a few warm-up cycles before they reach stable working conditions for beam injection because they are charged at constant voltage and have limited charge capacity.Examples are the injection septum of the storage ring and the septa/kickers/bumpers of the booster.The new timing system can program these pulse generators to fire one or more cycles before firing the beam cycle for injection to solve these problems.The booster power supplies operate in a power saving mode and must be started 20 seconds prior to injection to ensure stable magnet excitation when the beam is triggered.This mechanism ensures proper accelerator conditions prior to beam injection.Therefore, to provide such operational capabilities, the new timing system can also offer stable operation of the energy saving mode in the booster ring under top-up mode injection.

Event based system for new TLS timing systme
The TLS timing modules, which include cPCI-EVG-300 and cPCI-EVR-300 with 6U cPCI form factor modules, also support PCIe-EVR-300 with fanless embedded EPICS IOC for booster white circuit control applications.The event generator includes external trigger events and the sequence RAM for sequence control.Since the TLS is a small system, only a few events are required to ensure operation.To simplify the system and reduce software complexity, external trigger event inputs are used instead of the sequence RAM.This approach allows quick and easy modification of the content of external trigger events within a control window of less than 20 ms after reading the increase in storage ring current after each injection.A central EVG generates events from external trigger events, which are then distributed via fiber links multiple event receivers (EVRs) in the control system interface layer.The EVRs decode the events, called hardware triggers or software interrupts, and route them to various devices such as the electron gun's high voltage deck and the high voltage modulator.The event clock is derived from the 499.654MHz master oscillator to ensure it is synchronized with the RF frequency.The distributed bus signals are generated by multiplexed counter outputs for SR revolution clock, BR revolution clock and coincidence clock.The event generator provides synchronization with the external input, and the signal is synchronized with the output of multiplexed counter 7. Sequencer and trigger event 0 are triggered by a rising edge of the external input synchronization logic output signal.The external input source is the 10 Hz injection point trigger of the booster, and the multiplex counter 7 is the coincidence clock.The configuration of the event generator for the new TLS timing system is shown in Figure 3.
The existing timing system relies on measuring the booster dipole current waveform to generate the trigger for the booster injection point and synchronize it with the coincidence clock.However, the new TLS booster white circuit control system now uses the time-based 10 Hz booster injection point trigger pulse to control the timing of the injection point.The new The primary goal of the timing system is to control the injection process, and timing events for all devices are defined and timestamped to indicate when they occur.TLS timing is relatively simple, and an external trigger from EVG is used along with various delay outputs in the EVR to achieve the required control.Timing control programs are developed using the state notation language (SNL) of the EPICS sequencer to support decay and top-up mode operation in a state machine manner [7,8].Since the booster magnets equipped with three White circuits, trigger of the injection reference is closely related to the dipole current in the injection field generated by the Direct Digital Synthesis (DDS) generators of the White circuits [9].Two EPICS IOCs are involved in the injection process, namely the timing master/DCCT IOC and the booster white circuits control/injector timing IOC.The relationship between injection control related IOCs is shown in Figure 4. Tools for configuration have been developed, and support for saving and restoring is also available.

Summary
A comprehensive analysis of various operational scenarios was performed, resulting in the installation of all event system modules with EPICS IOCs in the first quarter of 2022.The Timing Sequencer implementation was completed by mid-2022, successfully transitioning the timing system to event-based timing and meeting TLS operational requirements.Since the third quarter of 2022, the new timing system has been used for routine TLS operations with satisfactory results.Development of various tools for the timing system is underway.

Figure 2 .
Figure 2. Bucket addressing scheme and mechanism to keep filling pattern fixed in trapezoidal shape.

14thFigure 3 .
Figure 3. Configuration of event generator for TLS new timing system.