Design of an integrated circuit with blanking technique for neural signal recording based on CMOS

Neural signals play a crucial role in unraveling the mysteries of the nervous system. However, due to their minute amplitudes in the range of microamperes and microvolts, recording these signals poses significant challenges, largely stemming from their vulnerability to noise interference. Thus, the development of neural signal acquisition circuits holds paramount importance. This paper presents a successful endeavor in designing an integrated circuit using 0.18um CMOS technology, which exhibits exceptional accuracy in recording neural signals. The circuit employs a combination of amplifiers and filters, while incorporating the innovative blanking technology to effectively eliminate unwanted noise. Remarkably, this design accomplishes an impressive gain of 88.437dB. Consequently, the circuit enables the accurate capture of nerve signals, thereby positioning itself as an ideal candidate for implantable neural signal detection devices. With its ability to overcome the hurdles associated with signal sensitivity and noise interference, this integrated circuit represents a significant advancement in the field of neural signal acquisition, holding immense potential for further exploration and application in neuroscientific research and medical interventions.


Introduction
The recording of neural signals from the human brain is extensively utilized in biomedical applications for diagnosis and control.Extensive research has been conducted to achieve low power consumption and low noise.Sharma [1] developed a low-power Biopotential Amplifier (BPA) using quasi-floating grid technology, and Jiang [2] proposed a low-power, low-noise capacitively-coupled chopper instrumentation amplifier (CCIA).Oliveira [3] proposes a baseband amplifier topology based on the fact that the current image OTA can be used as the core of the amplifier to directly convert the received baseband signal amplification.Previous researches have designed neural signal acquisition circuit based on the idea of reducing noise or power consumption, but have not realized the control of neural signal acquisition process.In order to make reasonable use of the controllability of neural signal acquisition process, this paper presents a solution utilizing blanking technology.The proposed design utilizes a complementary metal oxide semiconductor (CMOS) process, and includes an optimized amplifier and filter.The blanking technology used in this circuit can reduce the influence of the

The gain of CMOS amplifier
The gain of CMOS amplifiers is up to the transconductance and the load resistance of the circuit.The transconductance is the relationship between the input voltage and output current of the amplifier, which is expressed by the formula: where gm is the transconductance, I bias is the bias current, and V ov is the overdrive voltage.
The load resistance represents the impedance presented by the amplifier to the output, which can be calculated by the following formula: where A V is the voltage gain and R load is the load resistance of the circuit.The open-loop gain of the operational amplifier determines the accuracy of the feedback system [4].In the case of the simple amplifier circuit shown in the figure 1, the closed-loop gain of this circuit can be expressed as the following formula: Figure 1.The amplifier circuit.

Fundamentals of CMOS devices
The design of this paper uses a CMOS process of 0.18μm.Usually, operational amplifiers (OTA) have differential tranceconductance input stages at both forward and reverse inputs, high-gain amplifying stage, buffer stage, compensating feedback circuit and current bias circuits on both sides.The amplifier circuit parameters should enable all transistors to operate in the saturation region.The impedance of transistors operating in the saturated region is large.According to R = U/I, when the impedance is large and the voltage increases, the current flowing through the metal oxide semiconductor (MOS) field effect transistor changes little.When the transistor enters the saturation region, the collector current integrated circuit increas with the increase of V DS , which is convenient for controlling the operation of the device.

Structure design of the neural signal detection circuit
In this section, a circuit with nerve signal recording function, small nerve signal amplification function and filtering output function is designed.

Design of operational amplifier circuit
The secondary CMOS operational amplifier (figure 2) consists of a differential input stage, common source amplifier stage, phase compensation circuit (capacitor) and bias circuit.This circuit consists of V→I and I→V cascaded [5].
The first stage includes an N-Metal-Oxide-Semiconductor (NMOS) differential amplifier with a differential input and a single-ended output.It contains three NMOS transistors.This stage converts the differential mode input voltage into differential mode current.After the current mirror load, it will be converted to differential mode voltage again.
The second stage consists of a P-Metal-Oxide-Semiconductor (PMOS) common source amplifier.Two PMOS transistors convert the input voltage into the current.The drain serves as a load that converts current to voltage at the output and provides high gain and output signal swing.
The bias circuit consists of M6 and I bias .The direct current (DC) bias current of the differential amplifier and the common-source amplifier is provided by the current mirror.The phase compensation capacitor is located between the input and output terminals of the common-source amplifier.It can improve the stability of negative feedback work.In CMOS amplifiers, transistors working in the saturation region can improve the performance of the amplifier and help maintain the accuracy and stability of the signal.By adjusting the aspect ratio, all devices work in the stable saturation region [6].At this time, the aspect ratio settings of NMOS and PMOS in the amplifier circuit are shown in the Table 1.
The open-loop DC gain of the amplifier is 88.437dB, the unit-gain bandwidth is 10.232MHz, and the phase margin is 180-131.155=48.85°.

Filter circuit design
A first-order low-pass active filter is used in this design.A first-order active filter uses an operational amplifier and passive components to filter the input signal.The cutoff frequency is determined by the resistor and capacitor values in the feedback network.Its cutoff frequency is f = 1/2πRC.When the signal frequency is lower than the cutoff frequency, the input signal can pass normally.When the input signal frequency is higher than this cutoff frequency, the signal output will be greatly attenuated [7].
Setting C = 5p, R = 1M, f = 31.8KHZ.The filter can block and denoise signals whose frequencies are higher than 31.8KHz to make the output curve smoother.The filter circuit diagram is shown in figure 3. OTA1 in the filter uses the amplifier structure designed in section 3.1.

Figure 3.
The structure of the first-order low-pass active filter.The AC simulation of the filter part circuit is shown in figure 4. When f = 0, the capacitor can be considered an open circuit.The gain within the passband is 1.2, which is calculated by the formula:

Blanking circuit
Blanking circuit construction is shown in figure 8.This circuit uses CMOS switch to control the operation or disconnection of each part of the circuit.Thus, the recording process of neural signals can be controlled [9].When the nerve signal comes through, the circuit starts working.When there is no nerve signal, the circuits stop working.Figure 9 shows the simulation results of the blanking circuit.When the S1 input is a high voltage and S2 input a low voltage, the nerve signal is amplified.Conversely, when the S1 input is low and S2 is high, the output voltage is 0. The actual simulation results match the expected results, so the blanking circuit functions properly.The blanking circuit effectively clears the circuit's current when no nerve signal is present, allowing for the recording of new signals upon re-entry.Blanking technology enables low-power operation.

The performance analysis of the circuit
In the amplification circuit, a capacitive proportional amplification circuit with negative feedback is employed.It utilizes a two-stage CMOS op-amp designed for capacitive loads.To minimize input-referred noise, the stacking of transimpedance amplifiers can be considered [10].This technique enhances the OTA open-loop gain, reducing input-referred noise [11].gm = 2 × (gm n + gm p ) (6) Noise limits for circuit components such as circuits and active filters reduce input referred noise.Therefore, chopper modulation technology and automatic zero technology can be added to the design to improve the noise performance of the circuit, and reduce power consumption.
These circuits can amplify and detect weak neural signals, enabling the study of neural networks and the diagnosis of neurological disorders [12] and these circuits can be widely applied in neuroscience research, clinical diagnosis, and the development of brain-computer interfaces and assistive devices.

Conclusion
In this paper, an integrated circuit that can be used for large neural signals is designed, and an active amplifier with specific bandwidth and gain is designed for the characteristics of small voltage value and fixed frequency of biological neural signals.At the same time, a neural recording circuit for recording neural signals is also designed to control the work of the amplifier more accurately.
The circuit designed in this paper can amplify biological neural signals by 100 times.The CMOS operational amplifier has a gain of 88.437 dB and the filter is capable of isolating signals between 8.92 Hz and 31.8 kHz.The neural signal detection circuit is designed with blanking technique, making it an efficient solution for amplifying and detecting neural signals.This circuit's high amplification factor and accurate frequency filtering provide significant advantages in the field of neuroscience, enabling the detection and analysis of weak neural signals and supporting the development of advanced medical diagnosis and treatment methods.Since the resistor part of this design uses high-value resistors, and the transistors used are NMOS and PMOS.The circuit partially affected by 1/f noise.In the future,

Figure 2 .
Figure 2. Schematic diagram of the amplifier.In CMOS amplifiers, transistors working in the saturation region can improve the performance of the amplifier and help maintain the accuracy and stability of the signal.By adjusting the aspect ratio, all devices work in the stable saturation region[6].At this time, the aspect ratio settings of NMOS and PMOS in the amplifier circuit are shown in the Table1.The open-loop DC gain of the amplifier is 88.437dB, the unit-gain bandwidth is 10.232MHz, and the phase margin is 180-131.155=48.85°.Table1.Width-length ratio of each NMOS and PMOS in amplifier circuit.

Figure 4 .
Figure 4. Tran simulation of the filter circuit.

3. 3 .Figure 5 .
Figure 5.The structure of CMOS switch.Figure 6 depicts the CMOS switch testing circuit.Input signal is pulse-shaped.Simulation results are shown in figure 7.With a low-level input, NMOS and PMOS transistors are off, disabling this circuit segment.A high input voltage activates both transistors, enabling the switching function of the transmission gate circuit.

Figure 6 .
Figure 6.Test diagram of switching circuit.

Figure 7 .
Figure 7.The simulation result of CMOS switching circuit.

Figure 8 .
Figure 8.The structure of the blanking circuit.Figure9shows the simulation results of the blanking circuit.When the S1 input is a high voltage and S2 input a low voltage, the nerve signal is amplified.Conversely, when the S1 input is low and S2 is high, the output voltage is 0. The actual simulation results match the expected results, so the blanking circuit functions properly.

Figure 9 . 5 )Figure 10 .
Figure 9.The simulation results of the blanking circuit.The overall circuit consists of the blanking technology of the front control nerve signal recording, the middle stage AC coupling-capacitor feedback amplifier circuit, and the back end output filtering circuit (figure 10).And can amplify biological neural signals by 100 times (figure 11) due to the formula:   = ( + −  −) ×   (5)

Table 1 .
Width-length ratio of each NMOS and PMOS in amplifier circuit.

Table 2 .
Table 2 displays the performance parameters of the circuit.Basic performance of integrated circuits for neural signal recording.