Flash storage technology status and development research

Data storage devices are an important component of computer systems. Solid-state Drives, which use NAND Flash technology, are widely used in various fields due to their unique advantages such as high read-write speed, low power consumption, shock resistance, and small size compared to traditional mechanical hard drives. This paper first discusses the basic structure and principles of Flash memory, including floating gate transistors for storing and reading charges. Based on the current state of NAND Flash-based solid-state hard drives, this paper discusses key technologies and characteristics such as flash memory types, wear leveling, garbage collection, etc. It explores their features, advantages and limitations, and finally reasonably deduces the future development trend of Flash devices.


Introduction
Hard disk data storage devices are an important component of computer systems.Solid-state hard drives, which use NAND Flash technology, have unique advantages such as high read-write speeds, low power consumption, shock resistance, and compact size, compared to traditional mechanical hard drives, making them widely used in various applications [1].This article first discusses the basic structure and principle of flash memory, namely floating gate transistors used for storing and reading charges.Based on the current state of NAND flash-based solid-state hard drives, the paper discusses key technologies and features, including flash type, wear balancing, garbage collection, etc.The study analyzes its characteristics, advantages, and shortcomings and finally reasonably deduces the future development trend of flash devices.
Because the reading and writing of flash memory rely on electronic signals, which is much faster than the mechanical hard drive that requires physical movement of the mechanical head, flash memory storage has better read-write performance than traditional disk storage, as well as lower power consumption, smaller size, and greater shock resistance.Thus, flash memory has been widely used in various computer devices.With the improvement of semiconductor fabrication technology and microelectronic technology, the single-chip capacity of solid-state hard drives continues to increase, and the capacity-price ratio in the market continues to increase, gradually replacing traditional mechanical hard drives to a certain extent.
This article explores the current state and development of flash technology and takes the storage products based on flash technology and the various technologies currently applied to flash storage as the research object, exploring the key characteristics and shortcomings of flash storage and making a  A floating gate metal-oxide-semiconductor field-effect transistor (FGMOSFET) consists of a control gate and a substrate, separated by an insulated gate, also referred to as the floating gate (Figure 1).The floating gate is surrounded by an insulator, preventing the electrons stored in it from flowing freely to the outside, thus allowing them to be retained for an extended period of time.
A sufficiently high voltage applied to the control gate relative to the substrate causes electrons in the substrate to flow through the insulator into the floating gate through the action of electric field forces, thus realizing the write operation.Conversely, the erase operation is performed by applying a sufficiently high voltage to the substrate relative to the control gate, causing electrons in the substrate to flow out of the floating gate into the substrate.
During the read operation, a lower voltage is applied to the control gate to perform detection, and when the FGMOSFET is conductive, the corresponding voltage value is queried to obtain the stored data content.

Types of Flash cell and storage mechanism
The basic unit of NAND flash, known as a "cell", can store one or more bits of data.Based on the number of bits stored per cell, NAND flash is categorized into four types: single-level cell (SLC), which stores one bit per cell, multi-level cell (MLC), which stores two bits per cell, triple-level cell (TLC), which stores three bits per cell, and quad-level cell (QLC), which stores four bits per cell.1, the trend in Flash development is to increase the amount of data stored in each cell, thus achieving higher data density.While advanced Flash types aim to store data at a higher density, they also impose higher requirements for accurately reading the voltage of a single cell.

Features and key technologies of flash
Unlike the general principle that a more advanced process technology results in stronger performance for other semiconductor devices, the advancements in NAND flash memory technology, such as from SLC to the current mainstream TLC/QLC and even the future PLC, primarily result in improvements in capacity, while advancements in process technology have a negative effect on performance in aspects such as retention time and write endurance.This is because flash memory is based on floating-gate transistors and electron tunneling rates increase as the oxide layer becomes thinner.During continuous write and erase operations, the insulating layer wears down [2].
In advanced types of flash memory, the precise control of electrons in the floating gate is essential, but the aging of the insulating layer can easily compromise this control.Furthermore, the accuracy of controlling electrons is lower in advanced types compared to older types like SLC, leading to errors in cold data.
In advanced fabrication processes, the smaller transistors and thinner insulating materials lead to increased electrical wear, resulting in loss of semiconductor properties after breakdown.This reduces the lifespan of the flash memory [4].

3D stacking
As indicated by the characteristics of flash wear and tear described in 2.1, the objective of enhancing flash storage capacity cannot be achieved in an endless manner like logic chips, by scaling down the transistor components to increase storage density.Under the premise of not improving the process to ensure storage reliability, the use of 3D stacking technology to further increase the storage capacity per unit physical area has become a new trend [5].Currently, the mainstream 3D stacking technologies include BiCS [6], P-BiCS [7], VNAND [8], TCAT [9], and Xtacking from YMTC [10], among others.The flash memory units in 3D flash blocks are stacked in a three-dimensional manner, and the flash memory units on the same level form a "layer" structure [2].

Figure 2.
Xtacking [11].The Xtacking architecture (Figure 2) developed by YMTC is distinct from that of other manufacturers such as Samsung and SK Hynix, who place the peripheral circuits of flash memory below the storage units.In contrast, the Xtacking architecture separates the storage array and the peripheral circuits, processing them on different wafers, and then interconnects them through vertical interconnect channels.This approach enables the peripheral circuits to overcome the process limitations imposed by the storage array and adopt more advanced processes, resulting in a reduction of the chip area [10].
The 3D Flash has not only a greater advantage in terms of data storage density compared to 2D Flash, but also in terms of data retention.3D Flash can endure a greater number of write/erase operations compared to 2D Flash.Although 2D Flash has a superior ability to retain cold data during single word write operations compared to 3D Flash, the cold data retention ability of 3D Flash is ten times that of 2D Flash after 300 write/erase operations [12].This means that 3D Flash has a broader range of applications, while the advantages of 2D Flash are limited to the storage of millennial cold data that is written once or with limited write/erase operations.

Garbage collection
When writing new data, Flash is different from traditional magnetic media.Magnetic media can directly overwrite new data regardless of whether the storage block has old data, while Flash requires the block containing the old data to be erased and the block to be written must be blank.Therefore, it can be predicted that after writing to a certain capacity, for example, reaching the capacity limit of Flash, an erase operation must occur.This erase is referred to as garbage collection.Erasing is slower than reading and writing, and the erase unit is also larger than the read and write unit.Currently, the minimum granularity of erase operations in flash memory is much larger than that of write operations.As a result, when old data is written to flash, there may be a portion of the memory that is not fully filled with data but still needs to be completely erased when an operation is performed.This can cause issues such as write cliff and write amplification [13].Write cliffs refer to the fact that as data continues to increase, there will necessarily be operations related to garbage collection such as data transfer and data erase, which consume system resources and result in performance degradation.Write amplification refers to the fact that although garbage collection can provide better performance through data transfer, flash memory write operations are limited.Garbage collection will lead to additional write operations, reducing the lifespan of flash memory.

Lifespan management and wear-leveling
The usage of Flash devices inevitably leads to the erasure of data that has been written, which in turn results in the wear and tear of the Flash.The maximum number of erase cycles of Flash units varies based on their type.Once the erase cycles reach their life limit, the reliability of the internal stored data can no longer be guaranteed, resulting in negative impacts such as performance degradation or fluctuations.For instance, the maximum number of erase cycles for a MLC NAND Flash block is only 3,000, while for a TLC NAND Flash block, it is only 1,000 [14].Generally speaking, the newer types of Flash have fewer erase cycles and higher storage density.In order to avoid frequent erasure of a specific part of the Flash, resulting in rapid degradation of that block and ensuring a longer lifespan for the Flash, wear-leveling technology has become an important technique for Flash.As its name suggests, the purpose of wear-leveling is to prevent excessive wear of specific blocks, resulting in rapid deterioration and forming bad blocks, thereby ensuring that all blocks of the solid-state disk have similar wear and tear levels and maximizing the lifespan of the Flash product.Wear-leveling algorithms are generally divided into the following four categories.As shown in Table 2, each of the four wear-leveling algorithms has its own characteristics.In dynamic wear leveling, the available flash blocks in the scope are included in the flash block pool, and the flash block with the least number of erase cycles is selected for data writing.The flash blocks with less wear can write more data content, thus triggering garbage collection in that flash block and achieving wear leveling.Its disadvantage is that when there is data that is not updated in the scope, this part of the data cannot be included in the available flash block pool, thus leading to dynamic wear leveling not being able to act on this part of the flash block.Therefore, dynamic wear leveling is difficult to achieve wear leveling between all flash blocks within the scope.The introduction of static wear leveling is to solve the shortcomings of dynamic wear leveling algorithms and achieve wear leveling of all flash blocks within the scope.Its advantage is that it can maximize the lifespan of flash blocks, and its disadvantage is that it will affect performance.Global wear leveling and local wear leveling: in the early traditional Flash, due to the larger process accuracy and thicker insulation layer, the Flash units had a stronger ability to withstand erase-write wear, and at this time the Flash storage device could apply the wear leveling algorithm to the Flash chip to ensure relative wear leveling between Flash chips.With the Flash process becoming smaller and the type of flash memory evolving from SLC to TLC, the wear leveling algorithm has been extended to the whole disk for Flash devices such as solid-state hard drives, which require more stringent wear leveling between Flash chips.However, global wear leveling will cause data migration between flash chips and result in a decline in device performance [2].
In practical flash memory device applications, various wear-leveling algorithms are not applied individually, but instead are combined.Given the increasing popularity of flash memory, how to efficiently integrate various algorithms to maximize flash lifespan while improving performance is a key area of research.

Conclusion
This paper delves into the fundamental structure: Floating-gate MOSFET and principles of storage of Flash, as well as its characteristics and some of its key technologies such as GC, wear leveling.It provides a comprehensive analysis of the storage structure principles of Flash and the storage mechanisms of various types of Flash.Furthermore, it analyzes the features of Flash mechanisms such as 3D stacking hardware technology, erase life, and garbage collection.However, due to space limitations, it has not been further described in more detail for such aspects as flash array, cache, FTL (flash transfer layer), actual manufacturing process and so on.Meanwhile, the read and write performance and power consumption of flash memory are not discussed.
At present, Flash is rapidly replacing traditional magnetic storage media represented by mechanical hard drives, and has become ubiquitous in the field of mobile devices.However, the limited erase life and data storage reliability of Flash devices remain a focus for ongoing research and optimization.

2 .
The basic structure and principle of flash 2.1.The basic structure unit and storage principle of flash Flash technology is based on a floating-gate metal oxide semiconductor field effect transistor, which was first developed at Bell Laboratories in 1967.The data is represented by modifying the amount of charge stored in the floating grate.In the 1980s, Toshiba invented flash memory, and later Intel developed the world's first commercial flash memory chip for computer storage[2].

Figure 1 .
Figure 1.Floating-gate MOSFET[3].A floating gate metal-oxide-semiconductor field-effect transistor (FGMOSFET) consists of a control gate and a substrate, separated by an insulated gate, also referred to as the floating gate (Figure1).The floating gate is surrounded by an insulator, preventing the electrons stored in it from flowing freely to the outside, thus allowing them to be retained for an extended period of time.A sufficiently high voltage applied to the control gate relative to the substrate causes electrons in the substrate to flow through the insulator into the floating gate through the action of electric field forces, thus realizing the write operation.Conversely, the erase operation is performed by applying a sufficiently high voltage to the substrate relative to the control gate, causing electrons in the substrate to flow out of the floating gate into the substrate.During the read operation, a lower voltage is applied to the control gate to perform detection, and when the FGMOSFET is conductive, the corresponding voltage value is queried to obtain the stored data content.

Table 1 .
Types of Flash cell and its storage mechanism.