Design of 4-bit absolute value detector with low energy

The article highlights the latest developments in the design of low-power 4-bit Absolute Value Detector (AVD) circuits that are utilized in digital signal processing (DSP) applications. DSP applications like audio and video processing, biological signal processing, and digital communication systems rely heavily on the AVD circuit, which determines the absolute value of an input signal. The article introduces a low-energy 4-bit AVD circuit based on pass transistors that incorporates advanced optimization techniques like adiabatic logic, approximation techniques, and layout optimization. This optimized AVD circuit achieves remarkable results in terms of power consumption and energy efficiency. With a power consumption of just 0.6 nW and an energy efficiency of 0.6 pJ per cycle, the circuit maintains precision and rapid response time. These advancements in AVD circuit design can be highly beneficial for portable and battery-powered devices such as earplugs, implants, and cell phones, as well as electronic components like Static Random Access Memory (SRAM) and motherboards. Overall, the proposed low-energy 4-bit AVD circuit is a significant development in the DSP field, enabling more efficient and effective processing of digital signals.


Introduction
The technology of the electronic sector has advanced quickly over time, and chip technology has made significant strides in recent years.As such, an increasing need for quick, trustworthy, and energyefficient equipment occurred.Manufacturers of modern electronic equipment focus on achieving this goal by considering the impact of variables like power consumption and delay [1].Digital circuit concepts have been implemented in several research projects to generate low power consumption and reliable components.
An Absolute Value Detector (AVD) is one component that has gained popularity in the field for its use in regulating the signal flow in a circuit [2].The AVD uses the full adder arithmetic logic to detect the input current.If a voltage greater than the threshold is applied, the AVD can transform it through a conducting channel between the drain and the source [3,4].
In many digital signal processing (DSP) applications, the 4-bit AVD serves as a fundamental building element.Applications like audio and video processing, biological signal processing, and digital communication systems implement it to know the absolute value of an input signal.Integrating the 4bit AVD, mostly in the chip ALU units of the systems, facilitate maximum efficiency [5].This has contributed to the growing acceptance of portable and battery-operated devices as the concept has been implemented in maximizing battery and maintaining low power conception in digital systems.
Recent advancements in the design of 4-bit AVD circuits with low energy consumption have been concentrated on investigating novel low-power logic models, circuit optimization, and layout methodologies [5].One approach that has been explored is adiabatic logic, a type of reversible logic that can potentially reduce power consumption.Adiabatic logic uses energy recovery circuits to recycle energy stored in capacitors during the charging and discharging cycles.Many researchers have developed adiabatic logic-based AVD circuits, such as the most recent work by [6].The proposed designs significantly reduced power consumption compared to traditional logic models [7].
Another strategy is using approximation techniques to simplify the AVD circuit, which can reduce power usage.A study by [8] combines a converter and comparator to reduce the size and increase the efficiency of a 4-bit AVD.The researchers and others have proved the capabilities and possibilities of smaller and more efficient AVD circuits.
The proposed methodology describes AVD as a robust spike-sorting algorithm [9].Layout optimization has also been explored to reduce power consumption in addition to logic style and circuit optimization techniques [10].In order to increase efficiency, layout optimization optimizes the physical positioning and routing of the circuit [11].The circuit layout is considered and optimized using algorithms to eliminate parasitic capacitances and resistances, which increase power consumption.
Overall, recent developments in the design of 4-bit AVD circuits with low energy consumption have produced encouraging results employing a variety of methods, including approximation techniques, adiabatic logic, and layout optimization.These developments are anticipated to help create more effective AVD circuits for a variety of DSP applications.
The study defines a low-energy 4-bit AVD circuit based on pass transistors.The suggested circuit is engineered to consume less power while yet performing with good precision.To balance high performance and low power consumption, the circuit employs cutting-edge optimization techniques such as layout optimization, transistor sizing, and clock gating.
Almost all digital signal processing (DSP) applications require the AVD circuit.For many applications, including the processing of biomedical, audio, video signals, and digital communication systems, it establishes an input signal's absolute value, which is crucial [12].As the use of portable and battery-operated devices has increased, there is a demand for low-power AVD circuit designs to meet these needs.The AVD facilitates the development of circuits that use less power and increase efficiency [13].This means there is increased battery life and processing speed through various AVD models.
This study proposes a low-energy 4-bit AVD circuit based on pass transistors.The proposed circuit uses advanced optimization techniques such as adiabatic logic, approximation techniques, and layout optimization [14].These techniques combine excellent performance and precision with a decrease in power consumption.The suggested AVD circuit is simulated and characterized using 45nm CMOS technology.The outcomes of the simulation show that the recommended circuit achieves a power consumption of 0.6 nW and an energy efficiency of 0.6 pJ every cycle in comparison to older designs [14].Also, the circuit is extremely precise and has a rapid response time.
Since they require excellent performance and low power consumption, many DSP systems could benefit from the suggested low-energy 4-bit AVD circuit using pass-transistor logic.It can be used in portable, battery-powered devices like earplugs, implants, and cell phones.It applies to developing components such as SRAM, motherboards, and other circuit components.

Theoretical analysis
Using various strategies, including adiabatic logic, approximation techniques, and layout optimization, 4-bit AVD circuit design has recently made strides toward low energy consumption.Combining these methods has allowed designers to considerably improve the performance of 4-bit AVD circuits while consuming less energy.These advancements may lead to the development of smaller, more efficient AVD circuits that can be used in a variety of applications.

Adiabatic logic strategy
Both adiabatic and pass-transistor logic, which both need little power, can be used to construct the 4-bit AVD circuit.In adiabatic logic, switches efficiently charge and discharge the circuit's capacitors.The study will examine how adiabatic logic impacts the operation and energy consumption of the AVD circuit [1].The capacity of adiabatic logic to reuse energy held in the capacitors of the circuit is one of its key advantages.This indicates that the circuit can reuse the energy by transferring it to further capacitors rather than wasting it as heat.Adiabatic logic is a good fit for low-power applications since energy recycling can significantly reduce power [5].
Adiabatic logic also can increase signal integrity and lower noise.Adiabatic logic can assist in ensuring the circuit runs consistently and accurately by minimizing the amount of noise in the system.A few disadvantages to adiabatic logic do exist, though.Its higher complexity compared to conventional logic styles is one of its key downsides.Adiabatic logic necessitates extra switches and capacitors, which might complicate the circuit's design and construction [6].Moreover, because it does not offer the necessary speed or performance, adiabatic logic is only appropriate for some applications.

Approximation techniques strategy
Approximation methods and how they affect the circuit's performance are also employed in the study.In order to simplify the circuit and boost performance, approximation techniques can be employed in the design of the 4-bit AVD circuit employing pass-transistor logic.Approximate adders, voltage-based approach, and logarithmic multipliers are approximation methods used in AVD circuit design [8].Using truncated comparators can make the circuit simpler and require less power.
Using approximation adders performs the addition operation with fewer logic gates, which can minimize the circuit's space and power usage.The output, however, can lose a little bit of precision as a result.Using approximations in the voltage references employed in the circuit is a third strategy.The reference circuit's complexity can be decreased by approximations, leading to a simpler, more effective circuit [11].This is one of the approximation methods discussed in the study.

Layout optimization strategy
This study also examines the different layout optimization methods and how they affect the circuit's functionality.The 4-bit AVD circuit using pass-transistor logic is designed with layout optimization as a key component because it can significantly affect the circuit's performance and power consumption.Circuit minimizations are among the significant strategies in layout optimization [7].Circuit minimization techniques such as truth tables can be used to optimize the circuit layout of the AVD circuit.The designer can save time and lower the possibility of mistakes by utilizing these pre-designed components [10].By carefully planning the component location and routing, standard cell libraries can also aid in reducing the size of the circuit and the presence of parasitic effects.
Using layout optimization to organize the placement and routing of the circuit's component parts is another crucial strategy.Layout tools can automatically produce the circuit's physical architecture while considering design constraints.The layout tools can assist in minimizing the area of the circuit and reduce parasitic effects, such as capacitance and resistance, that can impair the circuit's performance [9].Using pass-transistor logic, the 4-bit AVD circuit requires layout optimization as a crucial design stage.This stage entails positioning the circuit's physical parts to minimize their area and lessen parasitic effects.
This work suggests a pass transistor-based low-energy 4-bit AVD circuit.Modern optimization methods are used in this circuit, including transistor size, layout optimization, and clock gating.It consumes less power when compared to static CMOS logic when using a pass-transistor-based technique [14].The overall power consumption can be reduced while maintaining performance and accuracy by improving transistor size.Layout optimization is done to lower parasitic capacitances and resistances and improve overall circuit performance [13].
The suggested circuit is expected to deliver significantly higher energy efficiency and reduced power utilization compared to older designs.Several DSP systems may employ the suggested circuit, such as battery-operated cell phones, implants, and earplugs, which require outstanding performance and minimal power consumption.

Circuit design and optimization
Low-energy 4-bit AVD circuit design and optimization are critical in digital signal processing (DSP) applications that require high precision and low power consumption.This section presents a pass transistor-based AVD circuit that employs cutting-edge optimization techniques to improve performance and energy efficiency.
The proposed AVD circuit combines transistor scaling, layout optimization, and clock gating to lower energy consumption and improve energy efficiency.The power consumption of the circuit is reported to be 0.6 nW, which is much lower than that of prior AVD designs.The energy efficiency is remarkable at 0.6 pJ per cycle, an important parameter for circuits that require high performance while consuming little power.The proposed AVD circuit performance is simulated in a conventional 45nm CMOS technology, which is extensively utilized in the semiconductor industry [15].A circuit is a great option for various DSP applications because, as demonstrated by the simulation results, it offers high precision and a short response time.

Transistor scaling.
The design and optimization of the pass transistor-based AVD circuit show the value of adopting cutting-edge methods to improve performance and energy economy.With the transistor scaling approach, the transistor size is decreased while the circuit's performance is maintained.This is so that smaller transistors can flip more quickly and with less energy needed since they have reduced gate capacitance [11].
Transistor scaling, or MOSFET scaling, states that their power density remains constant as the transistor gets smaller [12].When transistor size is reduced by 30%, numerous things happen at once.Initially, each device's area shrinks by 50%, while its capacitance and voltage fall by 30%.This aids in preserving the electric field's stability.These properties are also scaled down by 30% due to the link between capacitance, voltage, current, and transition time.The outcome is a 30% reduction in the circuit's overall latency.In turn, this causes a 40% rise in operating frequency and a 50% reduction in transistor power usage.

Clock gating.
Clock gating logic is inserted between the circuit components and the clock signal to achieve this.The clock gating logic turns off the clock signal to a component when it is not in use, which lowers the component's power usage.The operating frequency can be decreased without sacrificing performance by decreasing the number of gates used in each stage.It is possible to conserve 20% to 40% of the overall dynamic power consumption, which allows performance degradation to be disregarded [1].As a result, the trade-off between these two factors makes the power loss cost acceptable at this power savings level.A clock gating method of a multi-staged CMOS circuit is shown in Figure 1.The "E1" and "E2" enable signals are produced by the clock control logic block in order to turn on the clock for multistaged circuits.The clock gates "G1" and "G2" stop the clock signal from going to later levels of flipflops based on how they will be used.The depth of the stage to which the clock signal is supplied is decided by the clock management circuitry, and extra flip-flops are disabled to prevent speculative toggling, which saves power.

Layout optimization.
The layout optimization technique improves the circuit layout to minimize parasitic capacitance and lower power consumption.The circuit's performance may be impacted by parasitic capacitance and resistance, which can cause signal delays and increase power usage.As a result, layout optimization entails arranging transistors, wires, and other circuit parts to decrease parasitic capacitance and resistance.Advanced computer-aided design (CAD) technologies that optimize the location of circuit components can be used to achieve this.

Figure 2. Circuit minimization.
Circuit minimization is one method to enhance layout optimization in designing circuits.By using these methods, fewer gates and inputs are needed to achieve a certain circuit function.The physical layout of the circuit can be improved by reducing the circuit.A simpler circuit requires fewer parts and less chip area, resulting in a smaller physical layout [2].This can lead to a quicker, more effective design and lower manufacturing costs.
In conclusion, the proposed pass transistor-based, low-energy 4-bit AVD circuit achieves outstanding precision, rapid response, and low power consumption by employing the preceding methods.

Approximation techniques
In the suggested AVD circuit, approximation techniques were also applied in addition to optimization approaches to decrease power consumption further and increase energy efficiency.Approximation techniques aim to identify a less complicated but correct solution to a challenging issue.Approximation techniques simplified the AVD circuit design without meaningfully reducing its accuracy.

3.2.1.
Voltage-based approach.Among the approximation techniques recommended for AVD circuits is the voltage-based approach.This particular technique determines the input of the absolute value of voltage by comparing it to a group of reference voltages [2].Thus, the method decreases power consumption and boosts the efficiency of the energy by permitting the calculation of the absolute value of an input signal by the circuit without having to determine challenging mathematical computations.

Logarithmic multiplier.
Another type of approximation method is the creation of logarithmic multipliers.The fundamental idea behind this method is to approximate multiplication operations using the logarithm features.In comparison to a normal multiplier, a logarithmic multiplier can execute multiplication with less hardware and fewer calculation steps by transforming the numbers to their logarithmic form, adding them, and then converting them back to their linear form [5]. Unfortunately, this method also includes some approximation mistakes because of the converter circuits' limitations.
More precise conversion circuits can be employed, and the accuracy of the intermediate results can be improved to reduce these mistakes.Despite these drawbacks, logarithmic multiplier designs offer a good balance between accuracy and efficiency for multiplication operations, making them an effective approximation technique in many applications, especially those where high accuracy is not essential, or power consumption is a concern [3].The logarithmic multiplier performs multiplication operations utilizing the characteristics of logarithms.It is carried out in three steps: the input operands are converted to logarithms, the logarithms are added, and the antilogarithm is calculated.A leading detector and a priority encoder are needed to acquire the mantissa and exponent for the logarithmic conversion.A signed-to-unsigned converter is utilized in signed FxP multiplication in two's complement.The sum of the logarithms is then roughly translated to its antilogarithmic value to get the result [8].In many situations where great accuracy is not necessary, or power consumption is an issue, logarithmic multipliers offer a balance between accuracy and efficiency for multiplication operations.

Approximate adders.
Approximate adders are another approximation method utilized in AVD circuit design.With fewer logic gates needed to complete the addition function, approximate adders can reduce the circuit's size and power consumption.However, this may result in a slight loss of precision in the output of an approximate adder.Another method for streamlining the circuit design is to approximate the voltage references used in the circuit [11].Approximations can decrease the complexity of the reference circuit, resulting in a more efficient and straightforward circuit.Pass-transistor approximate adders are a form of circuit design that forgoes complete accuracy in favor of increased efficiency and lower power consumption.These adders operate by combining digital and analog components to carry out calculations swiftly and accurately [13].When used in real-world applications like digital signal processing or machine learning algorithms, these adders can significantly enhance performance and energy efficiency without compromising accuracy.
Overall, the proposed AVD circuit uses approximation techniques in combination with optimization approaches to provide a circuit with excellent precision and energy economy.This makes the circuit an excellent choice for a range of DSP applications since it allows the circuit to operate at high performance while using little power.Approximation, though, can potentially result in inaccuracies or lower precision.In order to improve our circuit using approximation approaches, the research carefully assesses the trade-off between power consumption and circuit accuracy.

Adiabatic logic
Adiabatic logic is another strategy for lowering circuit power consumption.Adiabatic logic is a design method that minimizes energy dissipation by storing energy in reactive components, including inductors and capacitors, as opposed to squandering it in resistive elements [8].Since the Circuits demand low power consumption and high switching frequency, they benefit the most from this method.A reactive component in adiabatic logic stores energy during the charging and discharging phases, and that energy is transferred to another component.A series of switches are turned on and off to enable this energy transfer.Adiabatic switching, which involves charging and discharging the reactive components, lowers power consumption by reducing energy loss in the circuit [4].The major goal of adiabatic logic is to keep the system's energy constant when switching.The goal is to modify the transistors' states so that heat is not lost along with the energy stored in the system.This is accomplished by building a resonant circuit that may be utilized to recycle the charge on the transistor gates using a mix of inductors, capacitors, and diodes [1].This is a key benefit of adiabatic logic in terms of power consumption reduction.Adiabatic logic can use less power than conventional CMOS logic by limiting the energy lost as heat during switching.
The ability of adiabatic logic to function at low voltages is another advantage.In comparison to conventional CMOS logic, adiabatic logic can function at lower voltage levels because the charge on the transistor gates is recycled during switching.This can be especially helpful in scenarios where lowvoltage operation is preferred, like in battery-operated gadgets.Despite its advantages, adiabatic logic has a few drawbacks.Adiabatic circuits can be more difficult to design than conventional CMOS circuits, and they can also be more sensitive to noise and other environmental conditions [5].Because of this, careful planning and implementation give essential advantages in terms of energy usage and low-voltage operation.The adiabatic logic model is shown in Figure 6, along with two complimentary voltage supply clocks, a perfect switch in series with resistance, and the model.A continuous voltage source is utilized to charge the load capacitance in conventional CMOS circuitry.However, a constant current source is used in place of a constant voltage source in adiabatic logic switching circuits [6].
Using the method with other optimization approaches, like transistor scaling and layout optimization, helps to enhance the method's viability due to its increased circuit complexity and timing difficulties.
Although it is not particularly discussed in the research, adiabatic logic may be employed to increase energy efficiency further and decrease power consumption in the context of the suggested AVD circuit.

Results
The suggested 4-bit AVD circuit with pass-transistor logic has been modeled and characterized using 45nm CMOS technology.The outcomes in the simulation show that the circuit proposed can achieve good accuracy and performance while using a significant amount less power than traditional static CMOS logic.
Once adiabatic logic, approximation, and layout optimization methods are implemented, a highperformance 4-bit AVD circuit with reduced power consumption is unquestionably produced.The circuit has a stated power consumption of 0.6 nW, much less than earlier AVD designs.The circuit's outstanding energy efficiency of 0.6 pJ per cycle makes it an excellent choice for DSP applications that demand great precision and rapid response time while using little power.The circuit additionally has a 1.23 ns response time, high precision, and an error rate of less than 0.05%.These findings show that the proposed pass-transistor AVD circuit can perform well while consuming less power.
The approaches increase the circuit's energy efficiency by consuming less power than is necessary.These methods provide a more energy-efficient circuit by reducing power dissipation.Approximation techniques further optimize the circuit by reducing complexity while maintaining the required precision.By using these techniques, a high-performance, low-power AVD circuit that is appropriate for a variety of DSP applications is produced.

Conclusion
The study's recommended a low-energy 4-bit AVD circuit based on pass transistors for high precision and low energy consumption.The use of complex optimization techniques, including adiabatic logic, approximation approaches, and layout optimization, allowed for balancing high performance and low power consumption.The suggested circuit may run with a 0.6 nW power consumption and a 0.6 pJ energy efficiency each cycle, which makes it appropriate for battery-operated portable devices like headphones, implants, and mobile phones.The study also examined the impacts of adiabatic logic, approximation techniques, and layout optimization on the performance and power consumption of the circuit, suggesting potential future strategies for creating low-power AVD circuits.Many DSP systems, such as motherboards, SRAM, and other circuit components, can have an effective operation and sustain battery life longer due to the recommended low-energy 4-bit AVD circuit based on pass-transistor logic.