Optimization of Package Heat Dissipation Design Based on High-power WB-BGA Industrial Chip with a Wide Temperature Range

With the progress of science and technology, chip integration and packaging density continue to improve, and the power density increases rapidly, leading to the increasingly prominent problem of chip heat dissipation. The service environment of industrial chips with a wide temperature range is even worse, so it is necessary to ensure reliable operation in the environment of −40°C~85°C. The thermal design and thermal management of packaging have become an important problem in the industry. Based on the wide temperature range of high-power WB-BGA industrial chips, aiming at the difficulty of chip heat dissipation in the high-temperature environment of 85°C, this paper studies and optimizes the packaging heat dissipation, and proposes a high heat dissipation packaging design scheme based on the wide temperature-range high-power WB-BGA industrial chip, which reduces the chip junction temperature by 17.9°C and has a certain reference value for the packaging design of wide temperature range industrial chip.


Introduction
In recent years, with the rapid development of 5G, big data, artificial intelligence, and other new technologies, the chip integration and packaging density have been continuously improved, and the power density of the chip has increased rapidly, leading to the increasingly prominent problem of chip heat dissipation.The service environment of industrial chips with a wide temperature range is even worse, so it is necessary to ensure reliable operation in the environment of -40℃~85℃, and external cooling measures such as fans cannot be added due to operating conditions.In the high-temperature environment of 85℃, the chip continuously generates heat when working.If there is no effective heat flow path to take away the heat, the chip temperature will continue to rise, further leading to the thermal failure of the chip.According to statistics, about 55% of the failures of electronic products are caused by overheating and heat-related problems [1] .Therefore, the thermal design and thermal management of packaging has become an important problem in the industry.To improve the heat dissipation capacity of the package, the researchers optimized the package heat dissipation design by selecting high heat dissipation materials [2~3] , optimizing the package size [4~6] and structure [7~10] , or optimizing the high heat dissipation of the substrate [11] .To quickly and cost-effectively pre-evaluate the heat dissipation capability of packaging, simulation as an effective method is applied to the design of packaging heat dissipation.
Based on a high-power WB-BGA industrial chip with a wide temperature range, aiming at the difficulty of chip heat dissipation in the high-temperature environment of 85℃, this paper studies and optimizes the package heat dissipation, and proposes a high heat dissipation package design scheme based on high-power WB-BGA industrial chip with wide temperature range, to ensure the reliable operation of the chip in the high-temperature environment.The research of this paper has a certain reference value for the packaging design of industrial chips with a wide temperature range.

Packaging structure and heat dissipation path
The WB-BGA industrial chip packaging structure studied in this paper is shown in Figure 1.The package size is 16 mm×16 mm, with a thickness of 1.052 mm.510 balls are evenly arrayed under the package, and the ball pitch is 0.65 mm.Die size is 5.4 mm×5.4 mm×0.12 mm.The substrate is a 4layer copper-clad structure with a thickness of 0.36 mm, which is shown in Figure 2. The die is fixed in the designated area of the substrate through the patch adhesive to realize the mechanical fixation of the die.The heat generated inside the package is usually dissipated through two paths: Part of the heat is transferred to the substrate, then transferred to the PCB through the solder ball, and finally transferred out; Part of the heat is transferred to the top surface of the plastic packaging material and then transferred to the external environment.Figure 3 and Figure 4 respectively show the heat transfer structure and thermal resistance transmission link of the WB-BGA package in this paper.We set T j as the maximum die temperature; T b is the temperature of PCB; T c is the maximum temperature at the top of the packaging plastic; R jb and R jc are the packaging thermal resistance from the die to the PCB board and the top of the plastic packaging material, respectively.We set the heating power of the die to P. According to the package transfer thermal resistance link, we can get: We set T a as the ambient air temperature; R ja is the thermal resistance from the die to the ambient air.The calculation formula of chip thermal resistance R ja is as follows.

T j P
It can be seen from the above formula that when the ambient air temperature T a and chip power consumption P are constant, the smaller the die to ambient air thermal resistance R ja is, the smaller the chip junction temperature T j becomes.In this paper, the thermal resistance of chip packaging is taken as the research objective.Through package level thermal simulation and single factor variable method, the influence of chip packaging structure and packaging material parameters on the heat dissipation capacity of chip packaging is explored, which provides a theoretical basis for the design of high heat dissipation WB-BGA packaging.

Simulation model
According to the JESD51-2 standard, the simulation model is established as shown in Figure 5.The chip is placed in the JEDEC standard closed test box, and the chip is cooled by natural cooling, that is, the wind speed outside is 0. The JEDEC standard closed test box is composed of six walls, with a size of 30.48 cm×30.48cm×30.48cm.In the test box, the PCB is horizontally fixed in the middle position.And the package is fixed on the PCB and connected through solder balls.The WB-BGA packaging geometric model is shown in Figure 6.
To reduce the number of grids and improve the quality of grids, the packaging model is reasonably simplified as follows under the premise of ensuring certain calculation accuracy: (1) We ignore the heat conduction effect of the substrate via buried holes; (2) We ignore the heat conduction effect of gold wire; (3) Regardless of the circuit on the substrate and the PCB, the thermal conductivity of each layer of the substrate and the PCB is calculated equivalently according to the copper-clad ratio of each layer of the substrate and the PCB; (4) According to the calculation of equivalent thermal resistance, the solder ball is simplified as a cuboid with a size of 0.35 mm ×0.35 mm and a height of 0.2 mm.
The reasonably simplified package model is composed of five parts: die, adhesive, compound, substrate, and solder balls.Detailed parameters of the model are shown in Table 1.

Meshing and boundary conditions
In this model, the size difference of each component is large.To ensure the calculation accuracy and reduce the number of grids, the grid type is set to Mesher-HD, the grid size is limited, and the local grid is encrypted.The temperature gradient near the heat source is large, and the mesh is locally refined to ensure calculation accuracy.At the air side near the solid-gas interface, the mesh is also densified to ensure the accuracy of the boundary layer problem.
We add a two-dimensional rectangular heat source on the top of the die, and set the heat source power to 2.3 W. We set the initial ambient temperature to 85℃, and set the wind speed to 0, that is, the chip is cooled naturally.Meanwhile, we set the heat transfer coefficient of six walls of the JEDEC closed test cabinet as 5 W/(m 2 •K).Thermal radiation is considered in the model, and the thermal radiation of the compound of the packaging product has a great influence on the junction temperature of the chip, which cannot be ignored.However, the effect of thermal radiation between different materials inside is small, which can be ignored in the simulation.Therefore, only the thermal radiation of organic materials is considered, and the gray coefficient of the BT substrate and compound is set to 0.9.The material parameters in the model are shown in Table 2.

Simulation scheme
To explore the influence of chip packaging structure and packaging material parameters on the heat dissipation capacity of chip packaging, seven groups of simulation schemes are set up in this study, as shown in Table 3. Schemes 1, 2, and 3 use different plastic packaging materials to explore the influence of plastic packaging materials on packaging heat dissipation.Schemes 3, 4, and 5 use different adhesives to explore the effect of patch adhesive materials on package heat dissipation.Scheme 6 is to add a metal radiator on the top surface of the package based on Scheme 5 to explore the influence of the metal radiator on the package heat dissipation.Scheme 7 is based on Scheme 6.The solder mask on the substrate is windowed directly under the die to explore the effect of the solder mask opening on heat dissipation.

Thermal performance analysis of packaging
Heat dissipation simulation is carried out for Scheme 1, and the temperature nephogram is shown in Figure 7 and Figure 8.It can be seen that in the high-temperature environment of 85℃, the chip junction temperature T j reaches 138.8℃, which exceeds the upper-temperature limit of 125℃ for silicon-based chips, leading to thermal failure and failure to work normally.Therefore, it is of great significance to optimize the package heat dissipation of Scheme 1 to solve the problem of high chip junction temperature in a high-temperature environment.
To solve the problem of packaging heat dissipation optimization, firstly, the packaging heat dissipation path is analyzed.It can be seen from the section temperature nephogram in Figure 8 that the top surface temperature of the compound is relatively high, and the heat is transferred to the ambient air through the thermal radiation of the compound and the convection heat exchange with the ambient air, which is the main path of heat dissipation.The other part of the heat is transferred downward to the PCB.Because the contact area between the PCB and the outside air is large, the convection heat transfer effect is strong, and it is also an important path for heat dissipation.Therefore, the methods to improve the heat dissipation capacity of packaging are as follows: First, we reduce the thermal resistance of upward heat transfer and increase the heat transfer of the upward path; Second, we reduce the thermal resistance of the upward heat transfer and increase the heat transfer to the PCB path, to reduce the junction temperature of the chip and ensure the safe and reliable operation of the chip in the high-temperature environment.

The influence of compound on heat dissipation performance
To explore the influence of compounds on the heat dissipation performance of packaging, three different compounds, G1250U, CV8770B, and G1250HT, were selected in Schemes 1, 2, and 3 respectively, and other factors remained unchanged.The thermal simulation temperature nephogram was obtained as shown in Figure 9.According to the comparison in Figure 10, it can be seen that with the increase of the thermal conductivity of the compound, the junction temperature T j of the chip decreases significantly, from 138.8℃ to 133.8℃, reduced by 5℃.The package thermal resistance R ja also decreased significantly, from 23.4℃/w to 21.2℃/W, which decreased by 2.2℃/W.This is because the increase in the thermal conductivity of the compound is conducive to the upward transfer of heat and improves the heat dissipation capacity of the packaging.

The influence of adhesive on heat dissipation performance
To explore the influence of adhesive on the heat dissipation performance of packaging, three different adhesives: HR9004, 2100A, and CDAF530, were selected in Schemes 3, 4, and 5 respectively, and other factors remained unchanged.The thermal simulation temperature nephogram was obtained as shown in Figure 11.According to the comparison in Figure 12, it can be seen that with the increase of the thermal conductivity of the adhesive, the junction temperature T j of the chip decreases to a certain extent, from 133.8℃ to 130.8℃, a decrease of 3℃.The package thermal resistance R ja also decreased from 21.2℃/w to 19.9℃/W, a decrease of 1.3℃/W.This is because the increase in the thermal conductivity of the adhesive is conducive to the downward transfer of heat to the substrate and further to the PCB, which is conducive to the improvement of the heat dissipation capacity of the package.

The influence of metal radiator on heat dissipation performance
To further improve the heat dissipation capacity, Scheme 6 adds a metal radiator on the top surface of the package based on Scheme 5.It can be seen from the temperature nephogram in Figure 13 that the transverse temperature gradient on the top surface of the package becomes smaller after adding the metal radiator, which indicates that the transverse thermal conductivity of the top surface of the package has been enhanced.The enhancement of the lateral thermal conductivity of the top surface of the package is conducive to the convective heat transfer between the top surface and the ambient air, because the high-temperature area of the top surface becomes larger, making more heat flow to the ambient air.According to the comparison in Figure 14, it can be seen that the junction temperature T j of the chip is significantly reduced by 6.7℃ from 130.8℃ to 124.1℃ after adding the metal radiator.The package thermal resistance R ja also decreased significantly, from 19.9℃/w to 17.0℃/W, which decreased by 2.9℃/W.It can be seen that the addition of a metal radiator has significantly improved the heat dissipation performance of the package.

The influence of solder mask opening on heat dissipation performance
To further improve the heat dissipation capacity of the package, Scheme 7 is based on Scheme 6, and the solder mask on the substrate is windowed directly under the die.Because the thermal conductivity of the solder mask is very low, it blocks the downward transfer of heat to a certain extent, which is not conducive to packaging and heat dissipation.Under the die, we open the window with a solder mask so that the metal circuit of the substrate at this position directly leaks out and contacts the adhesive.Without the solder mask barrier, the downward heat transfer capacity can be greatly improved.
According to the temperature nephogram in Figure 15, the ability of heat transfer downward is significantly improved.According to the comparison in Figure 16, after the solder mask is opened on the substrate, the junction temperature T j of the chip is significantly reduced, and the difference between the junction temperature T j of the chip and the temperature T b of the PCB is decreasing, from 11.8℃ to 8.5℃.This shows that the ability of the package to conduct heat downward has been significantly improved.The package thermal resistance R ja also decreased significantly, from 17℃/w to 15.6℃/W, decreased by 1.4℃/W.It can be seen that the solder mask opening has significantly improved the heat dissipation performance of the package.

Conclusion
Based on the high-power WB-BGA industrial chip with a wide temperature range, aiming at the problem that the chip temperature is too high to work normally in the high-temperature environment of 85℃, this paper studies the package heat dissipation path, chip junction temperature, and the influencing factors of package heat dissipation by the single factor variable method.After heat dissipation optimization, the junction temperature of the chip is greatly reduced, ensuring the reliable operation of the chip.The research of this paper has a certain reference value for the package design of industrial chips with a wide temperature range.The main conclusions are as follows: (1) The reason why the chip of the original scheme cannot run in the high-temperature environment of 85℃ is that the junction temperature of the chip has reached 138.8℃, which exceeds the upper limit of 125℃ of the silicon-based chip, leading to the thermal failure of the chip; (2) The upward heat transfer capability of the chip can be improved by selecting a compound with higher thermal conductivity and adding a metal radiator on the top surface of the package.The downward heat transfer capability of the chip can be improved by selecting an adhesive with higher thermal conductivity and carrying out a solder mask opening under the die; (3) In the high-temperature environment of 85℃, the junction temperature of the optimized chip is 120.9℃, which is 17.9℃ lower than that before optimization, and the thermal resistance is 7.8℃/W lower, which ensures the reliable operation of the chip.

Figure 3 .
Figure 3. WB-BGA package heat transfer structure Figure 4. WB-BGA package transfer thermal resistance link

Figure 9 .
Figure 9. Temperature nephogram of different compound schemes

(a) Scheme 5 (b) Scheme 6 Figure 13 .Figure 14 .
Figure 13.Temperature nephogram of the scheme with or without metal radiator

Table 1 .
Parameters of the geometry model

Table 2 .
Material parameters in the model

Table 3 .
Heat dissipation simulation scheme No.