A Reference Voltage Circuit Applied in High Precision Delta-Sigma ADC

A novel reference voltage circuit design which is applied in high-precision Delta-Sigma ADC is implemented. The proposed reference circuit exploits a high-gain class-AB OTA as the error amplifier, which improves the transient response characteristics, ensures loop stability, and does not increase additional power consumption. The design and simulation of the proposed reference voltage circuit are fabricated by SMIC.18 CMOS technology. The simulation results manifest that the temperature coefficient of the bandgap reference is 6.825 ppm/°C in the temperature range from -40°C to 125°C. The transient response of the proposed reference circuit takes about 13 ns to reach the precision demanded by the reference voltage. The Σ-Δ modulator with the designed reference voltage circuit applied has an effective number of bits (ENOB) of 18.1 bits, a signal-to-noise-ratio (SNR) of 111.2 dB, and a signal-to-noise-plus-distortion (SNDR) of 110.9 dB at 1MHz sampling frequency and 625 Hz input signal.


Introduction
In the era of intelligent medical and care and smart wearables, modern electronic signal processing systems such as biological detection sensors, wireless communication, and other fields are developing rapidly.Especially for sensors, the ongoing miniaturization and accuracy pose new hurdles to sampling frequency and signal quality.The analog signals collected by the sensor are amplified by the signal amplifier and then digitized by the analog-to-digital converter (ADC) for computer processing.So it is becoming increasingly important and challenging to design the ADC that meets the system requirements [1][2].For high-precision Delta-Sigma ADC, non-ideal factors such as limited gain bandwidth, misalignment of the comparator, and mismatch of capacitors in the operational amplifier will deteriorate ADC performance.What's more, the accuracy of the reference voltage that determines its quantization standard will also directly affect ADC conversion accuracy.Due to the limited driving capacity, the reference voltage circuit will inevitably introduce errors, and this kind of error is difficult to eliminate by correction technology [3].
The reference voltage circuit is mainly composed of the bandgap reference (BGR) circuit and the output buffer circuit.The front BGR generates the reference voltage with a low-temperature coefficient (TC), and then the later buffer circuit drives the DAC switching capacitor array load of the Delta-Sigma ADC.The bandgap reference circuit needs to have a strong effect of suppressing temperature drift and provide a relatively stable reference voltage within a certain temperature range to minimize the impact on ADC performance.The reference voltage requires a high power-supply-rejection (PSR) ability, which can better suppress power supply noise in a certain frequency band.The output buffer of the later stage needs to be fast and responsive, able to establish the reference voltage within the error range of less than one least significant bit (LSB) during the load fast switching action [4][5].
In the buffer design of the reference voltage, an output stage with rapid charge-discharge capability is required since the load rapidly extracts and releases the charge.Theoretically, the ideal output stage can provide an infinite transient current, so that the load can be charged and discharged in a very short (approaching zero) time, which requires the output stage's output impedance to be close to infinitesimal (approaching zero).Usually, the output buffer can use a low-dropout (LDO) regulator circuit structure, mainly because this structure is simple, with a low cost and relatively high power-supply-rejection-ratio (PSRR), which can effectively suppress the power noise, and this structure is used in many high precision applications [6].The linear voltage regulator as a buffer has a different design point from LDO.Although the two circuit structures are similar, the loads of the two circuits are completely different.The main characteristic of the load of LDO is that the load changes greatly, but the speed of load changes is not very fast.Therefore, for the design of LDO, it is necessary to consider its voltage-regulating function.For buffer design, the load mostly changes in a small amplitude but a fast frequency, such as the fast-switching action of the DAC capacitor array in ADC during quantization.Therefore, for the buffer design, it is necessary to consider the fast transient response-ability.Generally, a large quiescent current is needed to ensure that the load node can be charged instantaneously when the load draws charge, so that the output voltage can be quickly restored to a stable state before the next switching action [7].
In this paper, a reference voltage circuit with a high-gain operational transconductance amplifier (OTA) is presented, which is applied in high-precision Delta-Sigma ADC.The reference circuit, which is similar to an LDO in structure, drives the switched capacitor in the high-precision ADC circuit and provides a stable reference voltage for the comparator module in the ADC. Circuit design and simulation results are described in Sections 2 and 3, separately.The conclusions are provided in Section 4.

Circuit design and implementation
Figure 1 is the schematic of the proposed reference voltage circuit, which consists of a bandgap reference (BGR), a high-gain class-AB OTA, a large-size power transistor Mp, a feedback network, and frequency compensation.Figure 2. A conventional OTA.
Many attempts have been made to balance the voltage accuracy, transient response, and power consumption of reference circuits.A common approach is to add a voltage buffer as an isolation in the circuit, which is after the error amplifier and before the power transistor.Voltage buffers tackle the problem by separating the non-dominant pole in the gate of the power transistor, which makes them become two high-frequency poles.In this way, the stability of the loop is enhanced [7][8].But this method can't improve the loop gain.In addition, many researchers have optimized the error amplifier and then proposed a multistage amplifier to improve the loop gain.However, this adds an extra structure and leads to an increase in power consumption [9].The proposed reference voltage circuit exploits a high-gain class-AB OTA as the error amplifier, without buffer or more amplifier stages, but improves transient response and voltage accuracy, effectively.

High-gain class-AB OTA
Figure 2 shows the circuit design diagram of the conventional OTA.M and N represent the respective width and length ratios of transistors.The transconductance of the OTA is where VOD is the overdrive voltage.And the output resistance is where Ȝ is the channel length modulation coefficient.Then the DC gain of the OTA is The conventional OTA does not have a high enough DC gain.From Equation (3), decreasing the overdrive voltage seems to obtain a higher gain.However, excessive reduction of the overdrive voltage probably leads to the transistor not operating in the saturation region and not working properly [10].Figure 4. Small signal equivalent model Hence, since the DC gain of traditional OTA is not high enough, a high-performance OTA is proposed.Figure 3 details the circuit's design.The new OTA can improve DC gain by precisely controlling current, that is, adding two transistors M13 and M14 as voltage-controlled current sources to control the output current.The quiescent current of the output stage is reduced on the premise of ensuring that the output current is large enough during the large signal operation.The drain current flowing through transistor M1 during the quiescent operation is largely diverted into M13, which serves as the current source, considerably reducing the output stage's current.When the input differential voltage changes, M9-M12 detects the change and controls the two current sources M13 and M14 to make corresponding changes.If the current of M1 is increased by gm1 × (Vp -Vn)/2, and the current of M13 is decreased by gm13 × (Vp -Vn)/2 × P/Q.The reduced current in M13 is equal to the increased current in M4.Therefore, the current variations of M1 and M13 add up to the total current variation of M4.The total transconductance of the high-performance OTA is where gm, in = gm1, 2 + gm9, 10, which is equal to gm1, 2 in Equation (1).Therefore, the output resistance is increased as Equation ( 5). 2 It is clear from the foregoing that the new OTA has both enhanced transconductance and output resistance.As a result, the OTA's DC gain has greatly increased from Equation (3).
In addition, the high-performance OTA has single-pole characteristics.Since M11 and M12 are diode-connected, an additional pole will be generated, but because M11 and M12 have very little equivalent resistance to small signals, the generated pole will be at a very high frequency, which will not have a great impact on the stability of the system.Figure 6.Schematic of the simulated temperature coefficient curve of the BGR

Stability Analysis
As mentioned above, the high-performance OTA is a single-pole system, hence Figure 4 displays the small-signal equivalent model of the reference voltage circuit.
Therefore, the open-loop transfer function of the reference circuit is m new mp eq out g g R R H s s p s p (6) From this, the expressions of dominant and non-dominant poles can be derived as: Miller compensation capacitor Cm shifts the dominant pole to the low frequency and the nondominant pole to the high frequency, thus realizing pole separation.Therefore, the circuit has enough phase margin to maintain system stability.

Bandgap Reference Circuit
The start-up circuit, bandgap core circuit, and current-generating circuit make up the bandgap reference circuit, as shown in Figure 5.The start-up circuit is made up of M0 through M4.When a circuit reaches a degenerate condition, it can be restored by opening a second current path, which will cause the circuit to return to its normal operating state.At this time, the circuit will automatically shut off without using any extra consumption.To create a voltage with zero temperature coefficient, the core circuit sums the positive and negative TC voltages in a specific ratio.The emitter area ratio of transistors Q1 and Q2 is 8:1.The transmission gates TG1-3 and Ra-c form a trimming circuit to ensure the accuracy of the bandgap reference voltage.Through a current mirror structure and a transistor Q3, the current-producing circuit produces a bias current (IB) and achieves temperature correction.And the following circuits' reference current is supplied by the bias current IB.

Simulation results
The designed reference voltage circuit is applied to Ȉ-ǻ ADC, which adopts a three-stage single-bit CIFF structure.Based on SMIC.18CMOS process, the overall reference circuit designed in this paper is simulated and verified by the Spectra tool of Cadence.From Figure 6 (a), in the temperature range from -40ႏ to 125ႏ, the variation of output voltage VREF is 1.38 mV.According to the calculation, the TC of the BGR is 6.825 ppm/ႏ; from Figure 6 (b), the TC under ss process corner is 9.325 ppm/ႏ, and that under ff process corner is 10.53 ppm/ႏ.Under different process corners, the output voltage of the BGR has little change, which can meet the normal use of the reference voltage circuit.The loop stability of the proposed reference voltage circuit under different process corners with 1ȝA-current load is shown in Figure 7. Obviously, the simulated results show that, at each process corner, the DC gain is maintained at about 94 dB, and the phase margin is 81°, greater than 60°, meeting the system stability requirements.Figure 8 is the transient response waveform of the reference voltage Vrefp.It takes about 13 ns to reach the precision demanded by the reference voltage, which meets the requirement of the reference voltage establishment speed.At this time, the current consumed by the reference voltage circuit is about 20 ȝA. Figure 9 shows the simulated output spectrum of the Ȉ-ǻ ADC with the designed reference voltage circuit applied.The total number of points collected for spectrum analysis is 16384.The ADC operates a 3.3-V supply voltage, with a sampling frequency of 1 MHz, an input frequency of 625 Hz, a signal bandwidth of 2 kHz, and an OSR of 256.The result shows that the ENOB of ADC is 18.1 bits, SNR is 111.2 dB and SNDR is 110.9 dB.

Conclusion
A reference voltage circuit applied in high-precision Delta-Sigma ADC is proposed.The high-gain class-AB OTA is used as the error amplifier of the reference circuit.The OTA improves the DC gain by accurately controlling the current, without adding complex structure, which improves the transient response of the reference circuit.In addition, the single-pole characteristic of the OTA is beneficial to the overall stable performance of the reference circuit.The BGR voltage is stable at 1.2 V, and the TC is 6.825 ppm/ႏ in the temperature range from -40ႏ to 125ႏ.The reference voltage is 1.8 V, and the establishment speed requirement is satisfied in roughly 13 ns, which is the time it takes to obtain the required precision.The simulation results indicate that the designed reference voltage circuit can meet the performance requirements of the high-precision ADC.

Figure 3 .
Figure 3. Schematic diagram of the high-gain OTA.Figure 4. Small signal equivalent model

Figure 5 .
Figure 5. Schematic of the bandgap reference.Figure6.Schematic of the simulated temperature coefficient curve of the BGR

Figure 6 (
Figure 6 (a) is the simulation result of the temperature coefficient curve of the bandgap reference under the standard process corner, and Figure 6 (b) is the simulation result of different process corners.From Figure6(a), in the temperature range from -40ႏ to 125ႏ, the variation of output voltage VREF is 1.38 mV.According to the calculation, the TC of the BGR is 6.825 ppm/ႏ; from Figure6 (b), the TC under ss process corner is 9.325 ppm/ႏ, and that under ff process corner is 10.53 ppm/ႏ.Under different process corners, the output voltage of the BGR has little change, which can meet the normal use of the reference voltage circuit.The loop stability of the proposed reference voltage circuit under different process corners with 1ȝA-current load is shown in Figure7.Obviously, the simulated results show that, at each process corner, the DC gain is maintained at about 94 dB, and the phase margin is 81°, greater than 60°, meeting the system stability requirements.Figure8is the transient response waveform of the reference voltage Vrefp.It takes about 13 ns to reach the precision demanded by the reference voltage, which meets the requirement of the reference voltage establishment speed.At this time, the current consumed by the reference voltage circuit is about 20 ȝA.Figure9shows the simulated output spectrum of the Ȉ-ǻ ADC with the designed reference voltage circuit applied.The total number of points collected for spectrum analysis is 16384.The ADC operates a 3.3-V supply voltage, with a sampling frequency of 1 MHz, an input frequency of 625 Hz, a signal bandwidth of 2 kHz, and an OSR of 256.The result shows that the ENOB of ADC is 18.1 bits, SNR is 111.2 dB and SNDR is 110.9 dB.