Design of Charge Pump Circuit for Stepper Motor Drive Chip

A charge pump circuit structure that can be applied to high-voltage drive circuits such as motor driver chips is proposed. The pump mode of the traditional circuit is changed based on the traditional charge pump, the output frequency of the oscillator is increased, and the capacitance area of the pump is reduced. The design and simulation of the proposed charge pump circuit are carried out based on HHG 0.35 um BCD technology. The simulation results show that when the simulation temperature is 27 °C and the clock cycle is set to 1 us, the voltageVin+5V can be stably output after 923 us, and the on-load current can reach 0.2 mA. The results meet the design requirements and provide a new way to solve this kind of problem.


Introduction
Stepper motors are widely used in various industrial automation equipment, such as industrial robots, 3d printers, and computer hard disks.Since the 1960s, the driving circuit began to develop gradually in foreign countries, from the simple single voltage drive to high and low voltage drive, then to the chopper circuit, subdivision circuit, etc., which is increasing to meet people's requirements for the structure of the driving power circuit.Our integrated circuit industry started late, and the existing motor driver chips are not enough to meet the growing market demand, so we need to innovate constantly to fill the gap in the field of driver chips.
The Stepper motor driver chip generally includes a control circuit, an H-bridge drive circuit, and a power management module [1] .Its particularity relies on that it can control the angular position of the rotor, without the need for sensors to control it, and is an open-loop control system.By controlling the electrification time sequence of the coil, the magnets generate an interacting force to rotate.The h-bridge drive circuit is a typical DC motor control circuit, through the control of the switch to drive the DC motor and other functions [2][3] .Switching devices generally choose high-power MOS tubes.To ensure its normal operation, its gate needs to be connected to a voltage value higher than that of the system power supply to drive the switching off and opening process of the power tube.Generally, the highvoltage charge pump is used to generate a voltage value higher than the system power supply to achieve the boost function.
To meet the demand of the market, the IC power supply size is shrinking, the charge pump circuit is frequently used in various integrated systems, and the huge pump capacitance area makes the chip size greatly increase, so how to reduce the pump capacitance area is an urgent issue to be solved [4][5] .

Circuit design and implementation
In the conventional double voltage charge pump circuit shown in Figure 1 Similarly, if it is a cascade charge pump, the output voltage can eventually stabilize to: The traditional charge pump circuit generally requires a high oscillator output frequency and a large pump capacitance to achieve better results.A large area of pump capacitance will make the chip area too large, increasing the cost, and a small area of pump capacitance will lead to limited charge storage capacity.The limiting factors of frequency are noise and power consumption [6][7] .
This paper presents a feasible scheme to reduce the capacitance area of the pump without reducing the efficiency of the charge pump, which improves the performance of the pump.

Charge pump structure
The first-stage booster circuit is shown in Figure 2 C .At T/2-T, the switch state is changed, and the upper plate 1 C 2 C is charged to Vreg+Vin instantly.At T- 3T/2, the switch state is changed again, and the power supply Vreg charges the lower plate of the capacitor 2 C when the output reach Vin+2Vreg .As shown in Figure 4, a symmetrical structure is superimposed on this circuit, straddling the Vin Vout ends of the power supply.The clock control logic is reversed.
Similarly, the newly added part of the circuit can output Vin+2Vreg voltage in the 3T/2-2T period.
The two parts of the circuit cycle conduction work aim to ensure that there is a stable voltage output in each clock cycle, greatly improving the efficiency of the charge pump.

Parameter analysis
In a charge pump circuit, to provide a sufficient amount of charge, the capacitor area is large, so most of the area is occupied by it.Therefore, when we solve this problem, the capacitance area can first be simply approximated as total Therefore, the total capacitance area under load is: Through this formula, it is clear that the total pump capacitance area can be reduced by reducing the on-load current and increasing the oscillator frequency.At the same time, the total pump capacitance also decreases as the output voltage decreases and the supply voltage increases.total I is the total current to be consumed.where Id I represents the current consumed in an ideal circuit and can be expressed as the expression of the amount of charge transferred from the power supply to the capacitor and then to the output Q  where  is the coefficient for calculating the relationship between the parasitic capacitance of the charge pump bottom plate and the pump capacitance C.
Therefore, the current consumption under a steady state can be written as: In this formula, it can be found that the current consumption is not dependent on the oscillator frequency or the total charge pump capacitance but is linearly dependent on the on-load current and the rise time tr, that is, the time required to reach the stable output value Vout .
The rise time can be approximated by the relation: where out in The total charge consumption is: Substituting all expressions into Formula (11), we get the expression for the total charge consumed by the power source: To obtain the minimum capacitance area, the derivative of Formula (4) concerning N should be set to zero during calculation.Meanwhile, to ensure sufficient carrying capacity, the derivative of current I in Formula (8) should also be set to zero.
Finally, the expression of pump capacitance can be written as: ( 1) Different from the traditional charge pump circuit, this charge pump is powered by two voltage sources, and the main pump structure is stacked [10] .The logical control makes it work to ensure a stable voltage output in each cycle.At the same time, to reduce the capacitance area, the output current is set to the minimum under the condition that the load is satisfied.We reduce the clock frequency, adjust the supply voltage value and pump electric structure, and get the most reasonable parameter design so that the capacitance area is minimum.

Circuit design and simulation
Figure 5 shows the overall structure of the circuit.

Conclusion
The working principle of the H-bridge driving circuit in the stepper motor chip is introduced, and the requirements of grid voltage as driving voltage are analyzed.By introducing the working principle and circuit characteristics of the double voltage charge pump, a feasible scheme to optimize the charge pump circuit is put forward, which solves the problem that the pump capacitance area is too large in the charge pump circuit.Through Cadence tool simulation, the feasibility of the scheme is verified and the design requirements are met.

I
represents the loss current of the parasitic effect, and is the energy loss of charge and discharge of a total parasitic capacitor clk1 and clk2 are two nonoverlapping clock signals that control the switching state.The charge pump circuit takes the capacitor as the energy storage element and uses the capacitor charge accumulation effect to realize the charge realize the output voltage multiplier.The charge stored in the pump capacitance is transferred to capacitive load out C and out I , so the output voltage is eventually stabilized at: