Design of High-Efficiency Dual Band Power Amplifier Based on GaN HEMT

In this paper, a novel dual-frequency impedance converter is proposed, and a rigorous derivation process is given. Based on this, a 0.61/2.6 GHz dual-frequency and high-efficiency power amplifier is designed. The joint simulation results show that the designed power amplifier achieves a maximum power added efficiency (PAE) of 68.3% at 0.61 GHz and achieves a saturated output of 41.53 dBm; At 2.6 GHz, the saturated output power is 40.8b dBm, and the maximum PAE is 56.3%. The designed dual-frequency power amplifier has good working performance.


Introduction
As the most expensive and energy-consuming device in base station equipment [1], the efficiency improvement of power amplifiers directly affects the performance of the entire transmitter and the energy consumption index of the entire base station and is also widely used in non-communication fields such as medical-surgical diagnosis, plasma lighting, and industrial heating and welding [2][3][4].In today's increasingly crowded spectrum resources, amplifiers need to consider a wider range of frequency bands to meet different applications, therefore, the study of dual-band high-efficiency amplifiers is of great significance and value [5][6][7][8][9].
As a typical representative of the third-generation semiconductor material, GaN has a wide range of applications in RF amplifiers with the advantages of high output power, high operating bandwidth, and low cost [10][11][12].It is based on the above background that a 0.61/2.6GHz dual-band high-efficiency amplifier is designed in this paper.The joint simulation results show that the maximum PAE of the amplifier at 0.61GHz is 68.3% and the saturation output power is 41.53 dBm; at 2.6 GHz, the saturation output power is 40.8dBm and the maximum PAE is 56.3%, which achieves a good dual-band operation.

Research on π-Type Dual Frequency Impedance Converter
In this section, a dual-band impedance converter based on the π-type composite structure is designed, and its circuit structure is shown in Figure 1.The impedance converter can achieve the purpose of matching two mutually independent complex impedances at any operating frequency with a 50 Ω load at the load side of the amplifier.
Figure 1 Dual-frequency impedance converter structure based on the π-type composite structure

Part I Analysis and Design
Transmission Line A matches two independent complex impedances of the transistor drain end face to the same complex impedance Z under dual-frequency operation conditions, The impedance value obtained by the transistor through load traction at two operating frequencies are Z @f = R + j * X and Z @f = R + j * X where f =m*f , the expressions of Z @f and Z @f are: @ =  ( Order Z @f =Z @f , the specific expression of Z and θ are: ,  ∈ . (4)

Part Ⅱ Analysis and Design
The second part is a bilateral microstrip line matching structure, whose function is to eliminate the imaginary part of the complex impedance and convert it into a real impedance, order Y @f = G + jB , Y @f = G + jB , if Line B is a terminal open circuit and Line C is a terminal short circuit, there are: −    +  = 0 ( 5 )  ( ) −  ( ) +  = 0.
Hypothesis θ and θ are known quantities, then the expression of Z and Z are: If both Line B and Line C have open terminals, the calculation process is like the above and will not be repeated here.The solution of the four parameters of the above relationship is not unique.The complexity of circuit design should be comprehensively considered to reasonably optimize these four parameters and appropriately select the open and short circuit states of two transmission lines.At this point, a real impedance  is obtained.

Part Ⅲ Analysis and Design
The π-type dual-frequency impedance conversion structure can be equivalent to a characteristic impedance of Z at two operating frequencies quarter wavelength impedance converter, the structure [ABCD] matrix can be calculated as: ( The [ABCD] matrix of a quarter wavelength impedance converter can be written as: When a π-type structure is equivalent to a quarter wavelength impedance converter, its [ABCD] matrix should be equal, and the characteristic impedance of the series microstrip line can be solved as: The susceptance of two parallel branch microstrip lines is: The constraint conditions for the microstrip line of the trunk road are: Combined with the quarter wavelength impedance calculation equation, and based on the  given in Part II, the value of load impedance (50 Ω) can be used to calculate the characteristic impedance of  , to successively calculate the values of other parameters.

Design and Simulation
This article designs a 0.61/2.6GHz high-efficiency dual-frequency power amplifier.The GaN high electron mobility transistor CGH40010F is selected as the power amplifier transistor.Rogers 4350 B plate is used, with a relative dielectric constant Er=3.66 and a dielectric substrate thickness H=0.762 mm.Through the Load-Pull of the ADS simulation software, the optimal source impedance and optimal load impedance values of the transistor at 0.61 GHz operating frequency are (27.53+11.52* j) Ω and (23.18+16.27* j) Ω, respectively.At 2.6 GHz operating frequency, the optimal source impedance and optimal load impedance values are (5.5-j* 3.56) Ω and (15.49+j * 8.27) Ω, respectively.

Design of dual frequency input and output matching circuit
At two operating frequencies, the input and output matching circuits share the same matching network and adopt a conjugate matching method.When the frequency changes, the two independent impedances are matched to the same load (50 Ω).Determine the parameters of the microstrip line through the previous derivation, and obtain the input and output matching circuit and its S parameter simulation results as shown in Figure 2. The return loss S 11 of the input and output matching circuits near the two frequency points of 0.61 GHz and 2.6 GHz is both less than -20 dB, and the reflection of the incident signal is very small.The insertion loss S 21 is close to the ideal value of 0 dB, indicating that the loss from the input to the output circuit is minimal, and the matching circuit is well-designed, confirming the rationality of the designed dual-frequency impedance converter.

Design of dual frequency bias circuit
For the dual frequency power amplifier designed in this article, due to the high operating frequencies and large spacing, the method of using inductance or a quarter wavelength line structure to design bias circuits is no longer applicable.Combining the principle of the π-type structure derived above, a dual frequency bias network is designed, with the structure shown in Figure 3  From the simulation results in Figure 3 (b), the forward transmission coefficient S 21 is close to the ideal value of 0 dB near the frequency points of 0.61 GHz and 2.6 GHz, which means that the RF path signal can pass through the bias circuit access point with almost no loss.The bias circuit design meets the requirements of the designed power amplifier.

Joint simulation and result analysis of dual frequency power amplifier layout
The designed dual-frequency matching circuit, dual-frequency bias circuit, and transistor model are integrated to form the overall circuit schematic diagram of the dual-band power amplifier.At the same time, capacitors are added to the RF main circuit to prevent interference from DC signals, as shown in Figure 4.As we can see from Figure 5, the final generated layout bends some microstrip lines to avoid overlapping between them.Rounded microstrip lines are used at the corners of all the microstrip lines that need to be bent to avoid the outward electromagnetic radiation generated by the right-angle spikes affecting the amplifier performance.To better observe the amplifier performance in each frequency band, two frequency bands are simulated separately.Figure 6 shows the output power and PAE index of the amplifier near 0.61 GHz, where the red, black, and blue curves are the parameters operating at 0.57 GHz, 0.61 GHz, and 0.65 GHz frequencies respectively.At an input power of 29 dBm, the output power at all three frequencies reaches 41 dBm, and the corresponding PAEs are all above 60%.
(a) 0.61 GHz amplifier output power parameters (b) 0.61 GHz amplifier PAE parameters Figure 6 Simulation of 0.61 GHz dual-band amplifier performance parameters Figure 7 shows the output power and PAE indicators of the amplifier near the 2.6 GHz frequency point.Under the signal drive at 2.56 GHz, 2.6 GHz, and 2.64 GHz frequencies, when the input power is 29 dBm, the output power of all three frequency points remains near 41dBm, and the corresponding PAE is also above 50%, where the output power of the amplifier under 2.6 GHz frequency operation is 40.75 dBm and a PAE of 56.3%.
(a) 2.6 GHz amplifier output power parameters (b) 2.6 GHz amplifier PAE parameters Figure 7. Simulation of 2.6 GHz dual-band amplifier performance parameters From the above joint simulation results, the dual-band amplifier can meet the design requirements by considering both efficiency and power in the two operating bands, and it also confirms the rationality of the designed π-based dual-band impedance matching network

Summary
In this paper, a dual-band impedance matching network based on a π-type structure is first designed and a rigorous theoretical analysis is given.Subsequently, the design specifications of the amplifier are given and the CGH40010F is selected as the transistor used in this design according to the design requirements.The designed dual-band impedance matching network is used in the simulation process to verify the rationality of the designed dual-band impedance converter.A dual-band amplifier is designed and processed based on the designed dual-band matching network and its layout is jointly simulated.The results show that the amplifier can combine both power and efficiency indicators in both operating bands and has good performance.

Figure 2
Figure 2 Dual frequency input and output matching circuit and S parameters (a). (a)Schematic diagram of dual frequency bias circuit (b)Simulation results of dual frequency bias circuit Figure 3. Dual frequency bias circuit schematic diagram and S-parameter curve

Figure 4
Figure 4 Dual-band power amplifier circuit parameters topology diagram To make the simulation results of the dual frequency power amplifier more accurate, based on optimizing and tuning the schematic diagram, electromagnetic simulation is performed on it to generate a layout, and combined with the circuit layout of the schematic diagram, joint simulation is performed on the layout.Finally, a layout that meets the design indicators and a processing physical diagram is obtained, as it is shown in Figure 5.

Figure 5
Figure 5 Dual-band power amplifier design layout and physical