A C-band folded planar low-pass filter utilizing U-shaped probe for high power TR module

In this paper, a C-band folded low-pass filter is realized in the planar circuit by utilizing a U-shaped probe. The proposed filter consists of four microstrip patches and a U-shaped probe. The configuration, equivalent circuit and design method of the proposed filter are demonstrated. A prototype of the low-pass filter operating in C-band has been designed, fabricated and measured. The maximum insertion loss of the fabricated filter is about 0.8 dB from 5 GHz to 6 GHz, while the maximum return loss is -11 dB. The out of band rejection is over 30 dB at 12 GHz. The measured results show reasonable correlation with the ideal circuit and the simulated results. The proposed low-pass filter can be used for the high power transmit/receive (TR) module in active electronically scanned array (AESA).


Introduction
Low-pass filters are usually employed in radio frequency (RF) systems for spurious suppression, such as harmonics introduced by non-linear devices, or interference signal at high frequency.Many researches were focused on miniaturization, harmonic suppression, or shaped rejection [1][2][3] of the low-pass filter.This planar low-pass filter is generally realized in PCB or alumina substrate, with the power handling capability of lower than 10 Watt, which is limited by the breakdown voltage of the capacitor, and the maximum operating current of the inductor.To address the power handling issue, the low-pass filter is often realized in waveguide [4][5] or coaxial line [6][7].These methods can achieve low insertion loss and high power capability, but large size and complexity in assembly limit their applications in the planar circuits or the integration in micro-systems.For the high power transmit/receive (TR) module application, the RF transmitting power for each channel is often over 10 Watt.The traditional planar filter is incapable of dealing with such high power RF signal, while nonplanar ones such as the waveguide or coaxial filter are difficult to be integrated into the planar circuit in the TR module.
In this paper, a compact high power planar low-pass filter utilizing a U-shaped probe is proposed to enhance the power handling capability.The design method is given, and a prototype filter that is operating at C-band is designed, fabricated and measured.Also, the power handling capability of the proposed filter is estimated through the EM simulator HFSS.

Circuit design
As shown in Figure 1, the proposed low pass filter consists of four patches that fabricated on a PCB and a U-shaped probe.The probe is a solid copper cylinder manufactured in U shape.The patches serve as shunted capacitors and the U-shaped probe mounted on the patches serves as series inductors.Figure 2 shows the equivalent circuit of the proposed low-pass filter.C 1 denotes the equivalent capacitance of patch 1 and patch 4. C 2 denotes the equivalent capacitance of patch 2 and patch 3. L 1 and L 2 denote the equivalent inductances of the three sections of the U-shaped probe.Dimensions of the patches and the U-shaped probe are illustrated in Figure 3. W 1 and W 2 denote the width and length of the patch 1 and patch 4, respectively.W 3 and W 4 denote the width and length of the patch 2 and patch 3, respectively.Len 1 denotes the length of the section 1 and section 3 of the U-shaped probe, while Len 2 denotes the length of the section 2. D 1 denotes the diameter of the probe.The equivalent capacitance of the patches and the equivalent inductance of the probe can be calculated by extraction from EM simulation results of local circuits, utilizing Equations ( 1) and ( 2) [8][9], respectively, where Y 11 and Y 12 can be derived in the simulation. (1) (2) By changing the width or length of the patches, the equivalent capacitances C 1 and 2 can be adjusted to meet the design requirements.Figure 4 shows the extracted capacitance of the patch 2 with different W 3 and W 4 .It can be seen that the capacitance increases with the patch size increase.Also, the capacitance is to be frequency dependent as the patch size increases.So, in the actual design, the more unrelated the capacitance is to frequency, the higher the design accuracy will be.It should be mentioned that the extracted capacitance remains nearly invariable whether the extraction model contains the probe or not.The equivalent inductance can also be adjusted by changing the length or the diameter of the probe.There will be inductance introduced by the patches, but it is small comparing to the inductance of the probe, so we only use Len 1 and Len 2 part to calculate the inductances.Figure 5 and Figure 6 show the extracted inductance of the patch 2 with different Len 1 and D 1 , respectively.It can be seen that the capacitance increases while the length of the probe increases or the diameter decreases.The design procedure for the proposed low-pass filter can be summarized as: Firstly, the initial capacitance and inductance of the circuit model are calculated for a given specification.

 
Secondly, get the initial parameters of the patches and the probe by the extraction process.At last, after tuning or optimization of the EM model, the proposed low-pass filter is derived.For example, to design a low-pass filter that is operating from 5 GHz to 6 GHz, get the parameters of the equivalent circuit C 1 , C 2 , L 1 , and L 2 by circuit synthesis, which are calculated as C 1 =1.27nH,C 2 =1.1nH,L 1 =0.8pF,L 2 =1.7pF.Then, W 1 to W 4 can then be derived by extraction process to meet the design requirements of C 1 and C 2 .Len 1 and Len 2 can be derived by the same way to meet the design requirements of L 1 and L 2 with a fixed D 1 .EM model of the filter can thus be constructed by the above initial parameters.After optimization by EM simulator, the final dimensions can be derived as: W 1 =1.45mm,W 2 =1.76mm,W 3 =2.27mm,W 4 =2.27mm,Len 1 =7.52mm,Len 2 =6.94mm,D 1 =0.9mm.

Estimation of power handling capability
The power handling capability of the filter can thus be estimated since the final parameters of the lowpass filter were derived.In the EM simulator, the source magnitude can be set to 30 Watt, the maximum electrical field intensity and the maximum surface current can then be calculated as shown in Figure 7 and Figure 8, respectively.The maximum voltage can be calculated by Equation (3), where E denotes the electrical filed intensity and d denotes the thickness of the PCB. (3) . Simulated E field of the proposed filter at 30 Watt power.

MEIE-2023
Journal of Physics: Conference Series 2591 (2023) 012045 Thus, the maximum voltage in the PCB is derived to be 145.2V. Since the breakdown voltage of the PCB is over 500V, the PCB is capable of dealing with the high voltage issue when 30 Watt power is imported.
Utilizing the simulated surface current shown in Figure 8, the maximum current can be calculated by Equation ( 4), where J denotes the surface current and D denotes the diameter of the U-shaped probe. (4) Figure 8. Simulated surface current of the proposed filter at 30 Watt power.
Thus, the maximum current in the probe is derived to be 3.6 A, which is only half of the rated current of the probe.Either the maximum voltage or the current of the filter that is generated with 30 Watt imported power is far from the constraint of the PCB or the probe.

Fabrication
For validation, a prototype filter was fabricated according to the dimensions that mentioned in Section 2.1.Figure 9 shows the photo of the fabricated low-pass filter prototype that is operating at C-band.The filter was manufactured on a double-sided substrate with a dielectric constant of 3, a loss tangent of 0.001 and a thickness of 0.254 mm.Firstly, the PCB board is manufactured with four patches and input/output ports.Meanwhile, the U-shaped probe is fabricated in copper and then is plated by gold.Then, the U-shaped probe is mounted on the PCB surface.Since the prototype is mounted manually, it can be seen that the solder occupies more area than designed.

Measurement
To measure the fabricated prototype filter, the coaxial cable with SMA connectors were mounted on the input/output pads.A vector network analyzer was used to measure the prototype filter.As shown in Figure 10, the maximum insertion loss of the fabricated filter is about 0.8 dB from 5 GHz to 6 GHz, while the maximum return loss is -11 dB.The out of band rejection is over 30 dB at 12 GHz.
It can be seen that the measured S 11 is not as good as the simulated one, mainly due to the manual mounting process.More occupation of the solder leads to variation of the equivalent inductance.One solution is to utilizing a standard process of solder paste printing and reflow.The coaxial cable with the SMA connectors is not included in the calibration.So, extra loss and impedance matching issue are introduced.From the measured insertion loss of 0.8 dB, the power consumption can be calculated to be about 5 Watt.If the loss of SMA connectors and the coaxial cables are removed, the actual power consumption on the fabricated filter might be under 4 Watt.The temperature increase can then be simulated by a simplified model.The model contains the proposed filter and a metal cavity, to which the filter is attached.The simulated temperature increase is around 130 K.The simulated result indicates that the power handling capability can be over 30 Watt, since the materials of PCB and probe can handle the temperature increase issue.

Conclusions and discussions
A low-pass filter utilizing U-shaped probe has been proposed in this paper.The design method is given, followed by a design example.A prototype filter is fabricated and measured.The measured results have justified this type of planar filter has high power handling capability, which can be used for the high power TR module in active electronically scanned array (AESA).Compare to the common ways of realizing high power filters such as waveguide or coaxial line, the proposed filter has the advantages of compact size, low cost, low weight and easy for integration by its planarity.

Figure 1 .
Figure 1.Configuration of the proposed low pass filter.

Figure 2 .
Figure 2. Equivalent circuit of the proposed low-pass filter.

Figure 3 .
Figure 3. Dimensions of the proposed low-pass filter.

Figure 4 .
Figure 4. Extracted capacitance of the patch on PCB.

Figure 5 .
Figure 5. Extracted inductance of the probe in different length.

Figure 6 .
Figure 6.Extracted inductance of the probe in different diameters.

Figure 9 .
Figure 9. Photograph of the fabricated low-pass filter.

Figure 10 .
Figure 10.S-parameters of the proposed low-pass filter.