Research on dynamic current sharing method of parallel connected IGBT modules for NPC three level converters

The parallel connection of IGBTs has been being applied in high power neutral point clamped (NPC) three level converters. This paper investigates the impact of gate parameters (gate resistor and capacitance) on dynamic current imbalance of parallel connected IGBT for NPC three level converter. A gate parameters calculation method is proposed in the paper, and the delay time and collector current difference can be analysed quantitatively. Experimental results have shown the effectiveness of the method.


Introduction
Multilevel converters have been attracting particular attention for high power applications such as marine electric propulsion. Insulated gate bipolar transistor (IGBT)-based the neutral point clamped (NPC) three level converters are widely studied topology. Although the output current ratings of these high power IGBT modules are steadily increasing, the parallel operations of IGBT modules are commonly adopted to reach higher output currents as are required by high power converter applications.
However, parallel operation of IGBT modules require a careful selection of IGBT modules and the special design of gate driver. Besides, although the parallel operation of IGBT modules expands the capacity of the high power NPC converters, it is difficult to maintain the complete consistency of the output current of parallel branches, which brings the problem of static and dynamic current imbalance due to the difference of internal parameters of each module and the asymmetry of circuit topology and driving circuit layout. Figure 1 shows the definitions of static and dynamic current imbalance. The former means that the IGBT modules bears different current when in steady-state operation, and the latter means that the IGBT module bear unequal currents at the moment of switching action. Both of these two situations cause current imbalance and heat distribution imbalance of the device, and even damage the IGBT modules in serious cases. The degree of current imbalance can be defined as (1) Current balancing influence factors of parallel connected IGBT modules relate to static and dynamic cases. The former includes collector-emitter saturation voltage (V cesat ), collector current, junction temperature and euivalent resistance of commutation circuit, the latter includes gate threshold voltage(V GEth ), gate capacitance, gate resistor, junction temperature, stray inductance, gate driver, diode reverse recovery characteristics, load characteristics.
In the field of high power converter, many efforts have been made to achieve equal current sharing in the parallel connected IGBT modules. [1] proposed to control the gate conduction time and gate emitter voltage by checking the load current or emitter current to achieve current balance. The dynamic current imbalance in IGBT parallel connection is analyzed in [2]. gate resistance compensation method is proposed in [3] to realize IGBT parallel current equalization. The realization of IGBT parallel current balance by gate resistance compensation method is demonstrated in [4][5], and the selection of resistance parameters is analyzed. Generally, the dynamic current sharing methods are more important to implement. Among the methods, optimization of gate resistor and gate capacitance are most feasible for high power NPC three level converters because,  Change of Commercial IGBT module parameters is impossible  The overall dimension of IGBT module is large, and each IGBT module generally adopts an independent drive board  The commutation loops in busbar are different and complex, and the commutation loops of parallel connected IGBT modules are difficult to be symmetrical, which makes the stray inductances of commutation loops to be different This paper studies the current sharing of parallel IGBT module of high power NPC three-phase converter, focusing on determination of gate resistor and gate capacitance to improve the dynamic current balance of parallel module. Figure 2 shows a circuit configuration of one phase of the IGBT-based NPC three level converters. Each phase contains four IGBT units and two diode units. Each IGBT unit includes two parallel connected IGBTs. In high power converters, the IGBT modules, diode modules, absorption capacitors and temperature sensors are generally installed on the barbus, which is necessary to form a power unit. The commutation loops of NPC three-level converter are complex, and the commutation of parallel IGBT module are difficult to be symmetrical. As a result, the stray inductance of the parallel connected IGBT modules are different.

Gate parameters analysis for current sharing
As shown in Figure 2, the turn-on and turn-off of IGBT can be approximately regarded as the charge and discharge process of a voltage source to a resistance-capacitance circuit. Rg and Cg are the gate resistance and gate capacitance set by the IGBT drive, respectively, and Cgi is the gate equivalent input capacitance of the IGBT module.
The amplitude of turn-on and turn-off current pulse and the rise rate of gate voltage can be limited by adjusting the gate resistance and capacitance, that is, the smaller gate resistance and capacitance are, the shorter the gate tur-on and turn-off time are, and the the switching loss is reduced. Therefore, changing the gate parameters can affect the dynamic current sharing of IGBTmodules. For the IGBT-based NPC three level converters shown in Figure 3, the detailed gate drive circuit for two parallel connected IGBT modules could be shown in Figure 4, in which the inherent stray capacitors (C gei , C gci and C cei ) are considered as well. R g1 , R g2 , C g1 , C g2 are the gate resistance and gate capacitance set by the first and the second IGBT drive, respectively, L σ1 , L σ2 (L σ1 ≠ L σ2 ) are the stray inductance of the two parallel connected IGBT modules.
The delay time difference then can be obtained In Figure 4, if Lσ1 > Lσ2, the difference between the collector current of the two parallel connected IGBT modules is described as   if Lσ1 > Lσ2, the difference between the collector current of the two parallel connected IGBT modules is described as where (10) In order to obtain the minimum △i c , the Lagrange multiplier method can be used to analyze the minimum of the function (11) and leads to (12) Careful selection of IGBT pairs is generally enough to ensure C ge1 =C ge2 , C gc1 =C gc2 and g f1 =g f2 , and they could be obtained in manufacture materials. L σ1 and L σ2 ,could be obtained using test or finite element calculation method. R g1 and R g2 can not be too large in order to limit switching loss. The selection of R g and C g interact and R g is suggested to be obtained first

Experimental verification
Experimental study presented in this paper is based on Infineon IGBT modules FZ3600R17HP4 and DIODE module DZ3600S17K3.
The test circuit configuration for the characterization of IGBT under hard switching condition is illustrated in Figure 6. A set of two pairs of IGBT modules is connected in parallel in the experimental setup (Figure 7). The middle parallel pair of IGBT modules are devices under test (T 1 location) while other pairs of IGBT modules remain under passive mode. The load inductor Lload is set to 400uH. The stray inductance L σ1 and L σ2 in the test circuit are tested to be can be 74uH and 49Uh, respectively. The original IGBT driving board parameters are R g1 = 3 Ω, R g2 = 2 Ω, C g1 = 4.7uF, C g2 = 3.9uF. According to (12) and IGBT module parameters, and keep the gate resistance unchanged, it is calculated that C g1 = 5.6uF, C g2 = 7.1uF.
Different gate parameters are used to test the imbalance of Ic of the two parallel connected IGBT located on T1, the result is shown in Figure 8 and Table 1. It can be seen that the current imbalance is reduced from 21.76% to 11.21%, which is beneficial to the safe operation of IGBT modules.  method is proposed in the paper, and the delay time and Ic difference can be analyzed quantitatively. Experimental results have shown that the current imbalance is reduced from 21.76% to 11.21%.