Crosstalk Analysis and Suppression of Single Chip SiC MOSFET Half-Bridge Circuit

For the hard-switch applications of the half-bridge circuit based on SiC MOSFET, the crosstalk generation mechanism of the half-bridge circuit in the switching on and off process is analysed. The influence of the driving resistance and stray inductance of driving circuit on the crosstalk is simulated and analysed. In the single-chip half-bridge circuit, the Miller clamp method with BJT + diode is used. By increasing the driving resistance and reducing the clamp circuit inductance, the crosstalk suppression effect can greatly improve. It is an effective way to optimize the clamping circuit and reduce the clamp circuit inductance without affecting the switch speed.


Introduction
The half-bridge circuit is one of the basic circuit topologies widely used in synchronous rectification, full-bridge circuits, inverters and other power applications. The application of wide-bandgap power electronic devices represented by SiC MOSFET has further improved the performance of the half-bridge circuit [1,2]. Compared with the traditional Si IGBT as the core device, the half-bridge circuit based on the SiC MOSFET has lower switching loss and conduction loss at the same rated current. Thanks to the body diode structure of SiC MOSFET, the external anti-parallel diode is no longer needed, which means that the half-bridge circuit based on SiC MOSFET has higher efficiency and higher power density [3][4][5]. However, there is always the problem of crosstalk between upper and lower switches in hard-switch half-bridge circuits. SiC MOSFET devices with faster switching speeds will produce larger dv/dt during switching process, which makes the problem more serious [6,7]. Due to processing problems of the gate of SiC MOSFET, the threshold voltage and negative safety voltage are small. The positive and negative voltage spikes caused by crosstalk can easily lead to unexpected turning on of the device and even lead to gate breakdown and damage to the device [8][9][10]. Therefore, it is necessary to analyse the mechanism of crosstalk and suppress it to improve the reliability of the circuit. This paper introduces the crosstalk generation mechanism and influencing factors of the half-bridge circuit based on SiC MOSFET and proposes the method of Miller clamp crosstalk suppression. The crosstalk suppression of the single-chip SiC MOSFET parallel half-bridge circuit is analysed

Crosstalk Generation Mechanism of Half-Bridge Circuit
A typical half-bridge circuit and its driving are shown in Figure 1. The upper and lower switches (M1, M2) share the bus voltage Vbus in series. Therefore, when the drain-source voltage of one SiC MOSFET (which marked Vds) changes, the other device's Vds will also change. For the convenience of discussion, this paper assumes that M1 is the switch actively switching on and off and M2 does not perform active switching behaviours. In general applications, in order to avoid through failures, there is a dead time between the upper and lower switching signals of the half-bridge circuit. When the upper switch turns on and off, the lower switch is always in the off-state. Therefore, in the following discussion, the lower switch can always be set to the off-state. Because the half-bridge circuit is usually used in the symmetrical working state of the upper and lower switches, the device parameters and driving parameters of the upper and lower switches are set the same.

Crosstalk during Turn-on
The turn-on process of M1 can divide into two stages. In the first stage, the channel current of M1 rises and the current rise rate is marked as did1/dt. The changing current generates a forward voltage drop VL on the line stray inductance Lloop. In the second stage, Vds1 begins to fall and Vgs1 enters the Miller platform. During the drop of Vds1, the voltage across the Miller capacitor Cgd drops and a discharge current generate on Cgd. The magnitude of the discharge current are determined by the driving resistance, the driving positive voltage Vcc and the Miller platform voltage Vgsm. Assuming that Vgsm does not change during this process, the rate of changing of Vds1 can be expressed by formula (1): The junction capacitance Cgd1 represents the Cgd value when the drain-source voltage is Vds1. The Vds2 of M2 is divided into two stages accordingly. In the first stage, the M2 body diode (or antiparallel diode) is turned on, Vds2= 0V; in the second stage, the minority carrier recombination of the diode ends. The junction capacitance of M2 begins to charge and Vds2 rises. Vds2=Vbus-VL-Vds1, where Vbus is the DC voltage between the positive and negative buses in the half-bridge circuit.
At the beginning of the second stage, Vds2 is very low and the junction capacitance Cgd2 of M2 is relatively large. The variation of Vds2 is mainly composed of Vdg2 and Vgs2. But this period is very short and Vgs2 is far from reaching the peak value. So the time period with lower Vds2 is not introduced and analysed and only the situation when Vds2 is higher is considered. When Vds2 is high, Cgd2 is very small relative to Cgs2 and the change of Vds2 mainly lies in Vdg2. The changing rate of VL is negligible. Therefore, the changing rate of the drain-gate voltage of M2 can be expressed as: As the Vdg2 of M2 increases, a charging current is generated on Cgs2. Part of the current flows to Cgs2 and charges it causing the gate-source voltage of M2 to rise, while another part of the current flows to the loop where Rg is located. The charging current of Cgd2 is marked as im. The charging current of Cgs2 is marked as igs. The current flowing through Rg is marked as ig, which is assumed to be unchanged. According to the circuit principle, the current relations (3)-(5) can be obtained as follows:  Figure 2 shows the waveform diagram of crosstalk during the switching of the half-bridge circuit. It can be seen from the figure that at time t0, Vds2 starts to rise and Vds1 falls accordingly. At this moment, the value of Cgd2/Cgd1 is the largest. From (3), we can see that im is also the maximum at this moment. After that, the value of Cgd2/Cgd1 decreases rapidly and at the same time im continues to fall. From t0 to t2, the junction capacitance Cgs2 charges as igs and Vgs2 rises. Meanwhile, ig rises and igs falls. At t2, igs drops to zero and Vgs2 reaches the positive maximum value (Vgpm). If Vgpm is less than the threshold voltage Vth, M2 will not turn on, then the positive effect of crosstalk on the Vgs of M2 can ignore; if Vgpm exceeds Vth, the phase where Vgs2 exceeds Vth is marked as t1 to t3. Then in the time from t1 to t3 (t2 to t4 in Figure 2), M2 is turned on and the current id2 is superimposed on the current id1 of M1 to produce a higher turn-on current spike. After t2, im is not enough to support the Vgs2 and Cgs2 starts to discharge. Vgs2 drops until both Vgs2 and im drop to zero at t4. The crosstalk activation process ends.

Crosstalk during Turn-off
As shown in Figure 2, the crosstalk of the turn-off process starts at t5. Vds1 rises and Vds2 falls. The Miller capacitor Cgd2 of M2 flows through the discharge current and the direction is opposite to the positive direction defined by im in Figure 1. As Vds1 rises, Cgd1 falls and Cgd2 rises, so Cgd2/Cgd1 increases and im also rises. At t6, Vds1 reaches its maximum value (without considering the influence of Lloop) and im reaches its peak value. Almost at the same time, Vgs2 reaches a negative peak, which is marked as Vgnm. Then the change of Vds2 ends and Cgs starts to discharge. Vgs2 falls and im rapidly drops from the peak value to a part of the Cgs discharge current and continues to fall. At t8, Vgs2 and im drops to zero and then the turn-off crosstalk process ends.  (5). However, the Vgnm of the turn-off crosstalk must consider the entire turn-off process. Therefore, the relationship between Cgd and Vds is very complicated.

Single-chip Half-bridge Miller Clamp Circuit
The main influences on crosstalk are as follows: driving resistance Rg, junction capacitance Cgs and Cgd, driving loop stray inductance Lg, load current Iload, and driving voltage Vcc. The junction capacitance by the selected MOSFET. The load current and driving voltage are usually not changeable for specific applications. Therefore, the only thing that can be optimized are the driving resistance and the stray inductance of the driving loop.
We chose the Miller clamp method based on BJT + Diode to analyse the performance of crosstalk suppression in hard-switch half-bridge circuits. The half-bridge circuit based on SiC MOSFET Miller clamp is shown in Figure 3. The selected SiC MOSFET is Rohm's SCT3022KL. The selected BJT is Infineon's BCW68G and diode is ST Microelectronics' BAR42. The bus voltage is 800V. In order to better suppress the positive fluctuation of Vgs, a stabilizing capacitor connected to an external 1.8V auxiliary power supply add to the driving circuit so that Vgs is at -1.8V when the switch is off.

The Influence of Driving Resistance on Crosstalk in Actual Circuit
The driving resistance Rg is composed of the gate resistance Rgout and the internal driving resistance of the device. Different driving resistance means different switching speed. The amplitude of Vgs crosstalk fluctuation is also different. After the Miller clamp circuit is connected in parallel between the gate and source of the switch, the driving current basically does not flow through the clamp circuit. The switching speed still determines by the loop composed of the driving resistance Rg and the driving loop stray inductance Lg.
The crosstalk process under different driving resistances is tested (the load current is 68A). The test circuit includes the simple driving half-bridge circuit without Miller clamp in Figure 1 and the clamp driving half-bridge circuit with BJT+Diode clamp in Figure 3. Since the real Vgs inside the device cannot be detected directly, the drain-source current is detected to reflect the crosstalk and suppression. In order to improve the measurement accuracy, the current is measured through a high-precision shunt resistance (shunt). The test results are shown in Figure 4 and Figure 5.   Comparing Figure 4 and Figure 5, it can be seen that with the increase of the driving resistance, the overshoot of the turn-on current of the two test circuits is decreasing. The decrease in the overshoot of the turn-on current means that Vgpm decreases. This result is consistent with the simulation result in Figure 3. Comparing the current and voltage waveforms between the drain and source of the switch without a clamp circuit under the same driving resistance, it can be found that the changing rate of the voltage of the two is not much different, which shows that the switching speed of the two is the same; The overshoot of the turn-on current is quite different because of the Miller clamp. Figure 6 shows the turn-on loss of the SiC MOSFET with or without Miller clamp. It also can be seen from the two figures that the current overshoot amplitude of the switch with Miller clamp driving is lower and the overshoot time is shorter. So its turn-on loss is smaller, and as the driving resistance increases, the difference between the two will increase.

The Effect of Clamp Loop Stray Inductance Crosstalk in Actual Circuit
The Vgs forward crosstalk fluctuation of the half-bridge circuit with Miller clamp driving is difficult to be completely suppressed. Therefore, the clamping loop needs to optimize as much as possible to reduce stray inductance without affecting the switching speed. In order to understand the influence of the stray inductance Lgclamp on the crosstalk effect, simulation and actual measurement of the BJT clamp driving half-bridge circuit under different Lgclamp are carried out. The actual measurement circuit built according to the principal circuit is shown in Figure 7. The DUT is a switch that is always in the off-state. Each bridge arm has three SiC MOSFETs connected in parallel. The dashed box A\B\C corresponds to the clamping circuits. The stray inductance values extracted by the Q3 software between each clamp circuit and the corresponding switch are about 6 nH, 10 nH and 14 nH respectively. The bus voltage is 800 V, the driving resistance is10 Ω and the load current is 30 A.  It can be seen that with the increase of Lgclamp, the peak value of the unexpected turning on current in the crosstalk switch and the unexpected turning on time both increases. Figure 9 shows the actual measured Vgs voltage waveform and drain-source current waveform on the crosstalk switch with different clamp loop inductances. It can be seen from the results that as Lgclamp increases, the forward fluctuation amplitude of Vgs of the crosstalk switch, the peak value of the unexpected turning on current and the unexpected turning on time all increase, which are consistent with the simulation results. In addition, as the increase of Lgclamp, the oscillation peak value after Vgs drops and crosses zero also increases. This test result verifies the previous simulation analysis result.

Conclusions
This paper focuses on hard-switch applications of the half-bridge circuit based on SiC MOSFET and analyses the crosstalk generation mechanism during switching on and off process. The influence of driving resistance and driving loop stray inductance on the effect of crosstalk is analysed and simulated. In the single-chip half-bridge circuit, the Miller clamp method with BJT + Diode is adopted and the suppression effect of crosstalk improve by increasing the driving resistance and reducing the inductance of the clamp loop. This shows that optimizing the clamp loop and reducing the inductance of the clamp loop are methods that are more effective without affecting the switching speed.