Design and Implementation of Carrier Detection System Based on FPGA

In order to better monitor and manage the signal transmission in the communication system and base station, and carrier detection is more effective. This paper designs a carrier(Carrier frequency) detection system based on FPGA, including system design requirements, FPGA selection, system framework design, carrier detection method design and so on. The performance indexes of the system are tested, such as carrier frequency range, carrier search time, carrier detection number and CPU consumption rate. The system has the advantages of high flexibility and good portability, and has a good application prospect in communication system, base station and other equipment.

In order to better monitor and manage the signal transmission in the communication system and base station, the fast and effective detection of carrier becomes a key point. Therefore, a carrier detection system based on FPGA is designed in this paper, which can be used for carrier detection and control of communication system, base and other equipment. The performance indexes of the system are measured, such as carrier frequency range, carrier search time, carrier detection number and system consumption rate.

Carrier
First, let's understand what is carrier wave? Although the concept of carrier is similar to carrier frequency, carrier is not a physical concept but a logical concept. A carrier is a frequency point that carries the service, that is, single carrier is a frequency point, double carrier is two frequency points, and so on, and multi carrier is multiple frequency points [11,12,13]. Because of the limited energy, the baseband signal can't be transmitted over long distance or over the air. Therefore, it is necessary to modulate to the carrier for transmission. It's like it's hard to transport the container to a distant place by manpower, but we can put the container on the car and carry it to a distant place. Let's use this example to explain the relationship between carrier and signal, so that we can better understand carrier.
(2) Car is carrier. It's a series of continuous sine waves.
(3) Modulation is the form of loading the signal to be sent into the carrier wave and sending it to the destination. The schematic diagram of carrier wave and signal is shown in Figure 1  Multicarrier can overcome frequency selective fading, because its signal bandwidth is smaller than the correlation bandwidth. Although it will have flat fading, this attenuation will not cause signal distortion, but will only lead to signal energy reduction. In the case of single carrier, the method based on cyclic prefix needs a long length, so single carrier generally does not use cyclic prefix method, but uses time-domain equalization at the receiver, but the complexity of time-domain equalizer limits the information rate can not be too high. In order to transmit higher information rate, orthogonal frequency division multiplexing (OFDM) technology is gradually used instead of single carrier.

System Design Requirements
In order to better realize the signal transmission of communication system, base station and other equipment, this paper designs a carrier detection system based on FPGA. The carrier detection system shall at least meet the following requirements.
(1) Tracking the input signal of the communication system, detecting the carrier effectively and calculating the frequency point of the carrier; (2) Detection carrier frequency range is greater than or equal to 75MHz; (3) The search time within 75MHz is less than or equal to 3S; (4) The CPU resource consumption rate of the system should be less than 50%.

System Design
According to the functional requirements of the system, the FPGA detection system is designed, and the FPGA system structure is shown in Figure 2.  Figure 2, FPGA detection system mainly includes 12 functional units, namely arm communication interface unit, forward DDC unit, I / O signal strobe switch unit, forward temperature compensation unit, ALC control unit, power detection unit, carrier tracking unit, pilot detection unit, channel separation unit, DUC digital up conversion unit, carrier gain compensation, DAC unit. According to the system requirements, the carrier search bandwidth is at least 75MHz, and the realtime frequency hopping bandwidth is 25MHz. It needs to be considered that the sampling rate supported by FPGA chip is higher than 150MSps, and the frequency hopping processing involves a lot of high-pass processing resources, which requires FPGA chip to have more resources and higher working frequency. Therefore, the main CPU of FPGA decided to use virtex 6 series chips. Virtex-6 FPGA includes many built-in system level modules. Virtex-6 FPGA provides the best solution to meet the needs of high-performance logic designers, high-performance DSP designers and highperformance embedded system designers. It brings unprecedented functions of logic, DSP, connection and soft microprocessor [14,15]. The top-level pin structure of the carrier search unit in the FPGA chip is shown in Figure 3.  Table 1. OUT carrier 16 offset As can be seen from the pin list of carrier search unit, the FPGA system can detect up to 16 channels of carriers. Each carrier pin has a register to set the corresponding data. The definition of carrier frequency point information register is shown in Table 2.

Algorithm Design
Carrier search unit is the focus of FPGA carrier detection system. In order to meet the system requirements that the carrier search time is less than 3 seconds when the carrier search width is at least 75MHz, the carrier search adopts the three-channel carrier search method, and the carrier search implementation block diagram is shown in Figure 4. , the area to be detected and two channels on both sides are successively moved to zero frequency. In order to reduce the utilization of resources, the signal after frequency shift is extracted, and then in 1 For the detection within the length of frame or 2-frame data, the lowest signal threshold shall be set here to judge the data of the intermediate channel and accumulate the data larger than the threshold. If it is larger than a time slot, the signal is considered to exist, and its power shall be calculated. After calculating the signal power of the three channels, the ratio between the intermediate channel and the left and right channels shall be compared, if it is larger than the set ratio, Carrier is considered to be present. At present, the real-time bandwidth of the three channel carrier search is 30MHz, so the block diagram in Figure 4 can adopt the one-way multiplexing processing mode. When the signal bandwidth is greater than 33.3MHz, it is difficult to achieve one-way multiplexing. When the real-time bandwidth is 75MHz, the mixing and extraction can require two or three-way processing in the frequency shift, and the power calculation can adopt the combined way. The flow of carrier search is shown in Figure 5. (1) the number of points whose intermediate channel number is greater than the set energy threshold is related to the sampling rate and the number of detected frames. For example, when the sampling rate is 2MSps, 1024 points can be set, and the energy threshold is -48dBFS; (2) When the ratio of the intermediate channel to the adjacent channel is greater than 32, the carrier is considered to exist, which is related to the passband of the compensation filter. The state machine jump chart of carrier search is shown in Figure 6.  Table 3. In the implementation, each channel of carrier search interface has a corresponding register, and the definition meaning of corresponding deposit is shown in Table 4. the description is shown in Table 2  <14:0> the description is shown in Table 2

Performance Simulation
In order to test whether the carrier detection performance of the FPGA detection system meets the system design requirements. The performance indexes of the carrier frequency range, carrier search time, carrier detection number and CPU consumption rate of the system are designed. Firstly, the detection frequency range and carrier detection time of the carrier are detected. In this experiment, the carrier frequency range is 1800mhz-1900mhz, and the carrier detection frequency range and carrier detection time are shown in Figure 7.  Figure 7. Relationship between frequency range and carrier detection time It can be seen from the experimental results that the carrier detection system based on FPGA can meet the design requirements. When the frequency range is less than 80MHz, the search time is less than 3 seconds. When the frequency range is greater than 80MHz, the search time increases dramatically. Next, the experiment is designed to test the performance of carrier number detection and CPU consumption. When the number of 1-16 carriers is set in the frequency range of 75MHz, the CPU resource consumption of the system is tested. The relationship between the number of carrier detection and the CPU resource consumption of the system is shown in Figure 8. Relationship between carrier detection number and system CPU resource consumption It can be seen from the test results that the carrier detection system can detect up to 16 channels of carriers. When the number of carrier channels is 8, the CPU utilization rate of the system is relatively low, but with the number of carriers increasing, the CPU utilization rate increases and the growth speed is faster.

Conclusion
According to the characteristics of communication system, base and other equipment transmitting signal by carrier wave. In order to better monitor and manage the signal transmission in the communication system and base station, and effectively detect the carrier. This paper designs a carrier detection system based on FPGA. This paper starts from the system design requirements, and describes the requirements from FPGA selection, system block diagram design, carrier detection method design, etc. The performance indexes of the system are tested, such as carrier frequency range, carrier search time, carrier detection number and system consumption rate,. It can be seen from the test results that the maximum detection frequency range of the carrier detection system can meet at least 80MHz, and the maximum number of carrier detection can reach 16 channels. And the system has the advantages of high flexibility and good portability. This design has high application value in communication system, base station and other equipment.

Acknowledgments
The Research was supported by Hunan Natural Science Foundation Project(2019JJ50477); The Research was supported by Hunan Internet of things Society Project(Research on the subject