Circuit Design Method to Improve Cryogenic Buffer Amplifiers Dynamic Parameters on CJFETs

We consider a circuit design method to increase a slew rate increase and transient process setting time decrease in buffer amplifiers (BAs), intended for operation in analog interfaces of physical values sensors and automatic devices at low temperatures. Differentiating transient correction circuits are introduced into the classical circuits of the BAs on complementary field-effect transistors (CJFETs) to improve these dynamic parameters. We investigated two buffer amplifier’s topologies: single-ended and balanced ones. The article shows the practical use of the proposed BA in the output and input stages of the high-speed operational amplifiers.


Introduction
Create a cryogenic electronics as analog IP-module that processes signals from the sensors at lowtemperatures, is one of the urgent problems of specialized hardware implementation of the automatic control systems for medicine and space instrument. This class of the electronic component base is implemented based on junction gate field-effect (JFET) and complementary metal-oxidesemiconductor (CMOS) transistors [1][2][3].
A significant problem in the operation of classical buffer amplifiers (BAs) of modern analog interfaces and microcircuits based on complementary field effect transistors (CJFETs) [4,5] is that they have low speed in the mode of a large pulse signal. It is related with small parasitic capacitors C1=1-2 pF [4,5] in output JFETs gates circuits and their non-linear operational modes [6]. This disadvantage is associated with the presence of small parasitic capacitors C1=1-2 pF [4,5] in the output gate circuit JFETs and non-linear modes of their operation [6].
The purpose and novelty of this article is to develop and research new circuitry solutions for CJFET buffer amplifiers. Today they are used as independent functional units in the tasks of a physical experiment [7][8][9][10] and in the structure of low-temperature and radiation-hardened sensor interfaces [11,12].

Single-ended CJFET buffer amplifiers
The suggested circuit of low temperature BA (figure 1a) [4] is peculiar because here small through static current Ith, going through output JFETs is stabilized due to rational selection of resistance R1, when a gate-source voltage M1 transistor achieves maximum values at small (microampere) source currents M1 transistor. It allows setting minimum values of Ith in wide temperature range and excluding a dead-band in BA's amplitude characteristics. The output stage (figure 1a) is characterized by linear characteristic in wide temperature and loading resistance range Rload=2-100 kΩ [4] at low static current consumption. We conducted a computer simulation of the circuit of figure 1a on n-channel (M1 and M3) and p-channel (M2 and M4) transistors of the model library CJFET_5 of JSC "Integral" (Minsk, Belarus), which have a ratio of the gate width to its length is 50 μm/6 μm for the p-JFET and 260 μm/6 μm for the n-JFET. The following notation are introduced in the figure 1a circuit: + Vcc / -Vee is positive / negative bus power supply; C2 is differentiating correction capacitor; Cload is load capacity; iload is load current; VGS.i is the gate-source voltage of the i-th M1-M4 transistors.  The buffer amplifier (figure 1a) circuit can be the basis of a number of modifications of differential stages operating in class AB mode (figure 2, [13]), which are perspective when developing operational amplifiers (Op-Amps) with high values of slew rate [6].

Differential stages based on single-ended buffer amplifier
In the figure 2 circuit the following designations are introduced: -Vee is negative voltage on power supply bus; Out.i1, Out.i2 is DC current outputs; C1, C1* is parasitic capacitance; C2, C2* is differentiating correction capacitors; M1-M8 is n-channels and p-channel CJFETs of JSC "Integral" (Minsk, Belarus); I0 is the static current; VGS.i is the gate-source voltage of the i-th transistors M1-M8.
The transfer characteristic of DS (figure 2) is shown in figure 3. It shows that the DC operates in the class AB mode, which significantly improves the SR and tset of the Op-Amp [13].

Balanced BA with Differentiating Correction Circuit
It is possible to apply the above architecture BA to develop balanced buffer amplifiers [14] (figure 4).
(a) (b) Figure 4. CJFet Buffer Amplifier (a) and its Transient at High Input Impulse Signal Vin=V0, Comparable to Power Voltage Vcc (b).
The resistor R1 sets a static mode for transistors M1-M4. The capacitor C3 forces recharge of parasitic capacitors C1 and C2.
When there is a large positive polarity pulse input signal and no capacitor C3, the transistor M1 of circuit on figure 4a is cut off practically immediately and capacitor C1 is charged by comparatively low current I0. It results in slow increase of voltage at BA output with relatively large time constant  The parasitic capacitor C1 is charged with additional current through the correction capacitor C3 if the capacitor C3 is turned on, the capacitance of which is selected significantly more than the capacitance C1. In this case the transient processes become significantly faster in the circuit ( figure 4b).
The static current through the resistor 1 R is determined by equations based on the second Kirchhoff's current law: is the gate-source voltage of the field effect transistors M1 and M2, respectively. The static current of field effect transistors M3 and M4 with identical M2 and M3 (M1 and M4) is determined by the equations, similarly (4)   The introduction of a differentiating capacitor C3 significantly reduces the time it takes to establish a transient process, this follows from the analysis of the graphs in figure 5 and figure 6.

Computer Simulation for Transient Processes in Balanced Buffer Amplifiers at Cryogenic Temperatures
There is an amplitude characteristic of the suggested BA at low temperatures for different resistances on figure 7.

High-Speed Bridge Output Stages based on Balanced Buffer Amplifier
The topology of the balanced BA figure 4 discussed above can be applied in bridge output stages (figure 8), in which the load is switched on between two identical BAs (figure 4a) [14].  Voltage at Different N=1-3 [14].

Conclusion
The article presents a new circuit technique for increasing the speed of cryogenic buffer amplifiers on complementary field-effect transistors with a p-n junction (CJFet technological processes, JSC "Integral", Minsk, Belarus). The proposed circuits are operable at low temperatures (up to -197°C) and have radiation resistance when irradiated with 60 Co gamma rays and fast electrons with an energy of 6 MeV at a fluence of up to 1 • 10 16 el./cm 2 [15] due to the use of CJFet transistors. The article shows that the proposed circuitry solutions can improve by 5-10 times the slew rate of the output voltage and the transient setting time with a large input pulse signal.