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Paper

Temperature effect on hetero structure junctionless tunnel FET

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© 2015 Chinese Institute of Electronics
, , Citation Shiromani Balmukund Rahi et al 2015 J. Semicond. 36 034002 DOI 10.1088/1674-4926/36/3/034002

1674-4926/36/3/034002

Abstract

For the first time, we investigate the temperature effect on AlGaAs/Si based hetero-structure junctionless double gate tunnel field effect transistor. Since junctionless tunnel FET is an alternative substitute device for ultra scaled deep-submicron CMOS technology, having very good device characteristics such as an improved subthreshold slope (< 60 mV/decade at 300 K) and very small static leakage currents. The improved subthreshold slope and static leakage current confirms that it will be helpful for the development of future low power switching circuits. The 2-D computer based simulation results show that OFF-state leakage current is almost temperature independent for the proposed device structure.

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10.1088/1674-4926/36/3/034002