Logical operations with localized structures

We show how to use excitable regimes mediated by localized structures (LSs) to perform AND, OR and NOT logical operations providing full logical functionality. Our scheme is general and can be implemented in any physical system displaying LSs. In particular, LSs in nonlinear photonic devices can be used for all-optical computing applications where several reconfigurable logic gates can be implemented in the transverse plane of a single device, allowing for parallel computing.


Introduction
Electronic computers are prevalent all around us and have been immensely successful in shaping our technological world. Most practical computers are serial, being based on von Neumann's design. In 1959, Feynman proposed that computations could be performed at the molecular (or supramolecular) level and in a highly parallel way [1], which led to a number of alternative proposals [2]. Worth mentioning are DNA computing [3] or bacterial [4] and biomolecular [4,5] computers. Another approach exploits the computational properties of waves in chemical excitable media (e.g. the Belousov-Zhabotinsky reaction) to solve mazes [6], perform image computation [7] or design logic gates [8]. In optics, logic gates have also been implemented using propagating solitons [9,10] and other nonlinear processes [11,12].
Localized structures (LSs) in dissipative media, also known as dissipative solitons, are commonplace in many spatially extended systems, such as chemical reactions, gas discharges or fluids [13]. They also form in optical cavities due to the interplay between diffraction, nonlinearity, driving and dissipation. These structures have to be distinguished from conservative solitons found, for example, in propagation in fibers, for which there is a continuous family of solutions depending on their energy. Instead, dissipative LSs are unique once the parameters of the system have been fixed. LS have been suggested as a potentially useful strategy for information storage [14]. This is especially attractive in nonlinear photonics after LSs have been observed in semiconductor lasers [15,16], but the general concept of using LSs to carry information is not restricted to optics.
Within this approach, an LS describes one bit of information. This idea can be taken a step further to discuss the potential of LSs for performing computations beyond mere information storage. For instance, all-optical XOR logic between the incoming bits and those stored in a cavity as LSs has been proposed in [17]. Here we propose to use excitability mediated by LSs to implement three basic logic gates, namely the AND, OR and NOT gates, providing complete logic functionality, as by the combination of them one can realize any other logical operation, including the NOR and NAND universal gates. In our scheme, bits are represented by a dynamical state (an excitable excursion) rather than by a stationary solution. This provides a natural reset mechanism for the gates. The way computations are performed relies on the emergent properties of the LSs, independently of the microscopic details of the underlying physical system.
Excitability is a concept arising originally from biology (e.g. in neuroscience), and found in a large variety of nonlinear systems [18]. A system is said to be excitable if perturbations below a certain threshold decay exponentially while perturbations above induce a large response before going back to a resting state. Roughly speaking, excitability needs two ingredients: a barrier in phase space that defines the excitable threshold, and a re-entry mechanism that sets the system back to the original state after a refractory time. In excitability mediated by LSs, the excitable threshold is automatically set by the stable manifold of the unstable (middle-branch) LSs, which is the barrier one has to overcome to create an LS. The re-entry mechanism is, in some cases, intrinsic to the dynamics of LSs [19,20], which is the case considered here. Alternatively for a stationary LS, a re-entry mechanism leading to excitability can be implemented by adding defect and drift in a finite system. In this case, when a superthreshold perturbation creates an LS on the defect, the drift pulls it out and drives it to the limits of the system, where the LS disappears and the system goes back to the original state. A periodic state based on this mechanism was observed in [21,22], and evidence of a divergence of the period was reported. As studied in [20], this divergence will lead to an excitable regime. The different mechanisms discussed above makes excitability mediated by LSs highly accessible to a wide variety of systems in optics and beyond.

The nonlinear optical cavity model
For illustrative purposes, we consider a nonlinear optical cavity as sketched in figure 1. The system consists of a Kerr cavity driven by a broad holding beam. On top of this, three narrow addressing beams b 1 , b 2 and b 3 are injected. These localized beams will facilitate excitability by allowing us to tune the threshold for the size of a perturbation necessary to trigger an excitable excursion. The positions in the transverse plane of these narrow beams also define the input and output ports of the logic gate. Alternatively, the transverse plane of the device could be engineered to fix the positions of the ports. Here the bright spots created inside the cavity by b 1 and b 2 will act as input ports, while the spot at the position of b 3 will be the output port. The incoming bits (δ 1 , δ 2 ) will be superimposed to b 1 , b 2 .
In the mean-field approximation, the slowly varying amplitude of the electric field E(x, y, t) can be described by the Lugiato-Lefever model [20,23]: where ∇ 2 = ∂ 2 /∂ x 2 + ∂ 2 /∂ y 2 . Space and time have been rescaled with the diffraction length and cavity decay, respectively, such that the coefficient in front of the Laplacian and the losses are 1. θ is the detuning between the cavity frequency and the frequency of the input field E I . The sign of the cubic term corresponds the so-called self-focusing case. For the AND and OR gates the input field E I (x, y, t) consists of a background E 0 and three Gaussian addressing beams  (1). Solid (dotted) lines indicate stable (unstable) solutions. The SNIC bifurcation signals the frontier between excitable behavior, used for implementing AND and OR logic gates, and oscillatory behavior, used in the NOT gate.
. H i is the amplitude of the addressing beams, while δ i (t) (i = 1, 2) accounts for the input perturbations or bits (δ 3 is always zero as the output port receives no input). E 0 and H i are taken real for simplicity. For the NOT gate, only one addressing beam is used. Throughout this work we fix E 0 = 1.0752, r 0 = 1 and θ = 1.45, while H i and r i are chosen differently for each gate. Values are given in the corresponding figure captions. Possibly, the overall input field E can be implemented using an optical mask on top of a single broad beam.
Simulations are performed considering periodic boundary condition on a 512 × 512 mesh with x = y = 0.1875 using a pseudospectral method as described in [24]. The system size L = 96 is large enough so that boundary conditions do not affect the dynamics of the LSs. Figures show only the central part of the whole system. The time step used is t = 10 −3 , much smaller than any relevant time scale of the system.
Before analyzing how a logic gate works, let us recall the behavior of the system under a single localized addressing beam. Figure 2 shows the bifurcation diagram of equation (1) as a function of the maximum of E I . The stable resting state, used as input and output ports, is represented with a solid line. This solution collides in a saddle-node on the invariant circle (SNIC) bifurcation with the unstable middle-branch LS. The middle-branch LS becomes a stable LS at the saddle-node (SN) bifurcation point. For these parameter values, however, its region of stability is very narrow (barely visible in the plot), and the stationary (upper branch) becomes unstable at a very close Hopf bifurcation (H). The limit cycle arising from this bifurcation (not shown) is also almost immediately destroyed in a saddle-loop bifurcation leading to the excitable regime [19,20]. In this regime, if the port is subject to a small perturbation, the system relaxes exponentially to the resting state, while if the perturbation is larger than the excitability threshold, defined by the LS unstable middle-branch, it triggers an excitable. The excitable excursion consists of a peak that grows to a large value until the losses stop it, and it decays back to the initial state. A remnant wave is emitted out of the center dissipating the remaining energy. For practical purposes, all of the region between the SN and SNIC bifurcations corresponds to a region of excitability. A full description of the parameter space where excitability appears is provided in [20].
On the right side, excitability ends at the SNIC bifurcation, leading to an oscillatory regime. For the implementation of the AND and OR gates, relying on the excitable behavior, the system is set close to, but below, the SNIC bifurcation. For the NOT gate, which requires an oscillatory LS, parameters are set just above the SNIC bifurcation.

Logic gates
Let us now focus on the logic operations. In our proposal a bit '1' corresponds, internally, to the presence of an excitable excursion. Then, a superthreshold perturbation at an input port (i.e. causing an excitable excursion) will be considered as a bit '1', while subthreshold (or absence of) perturbations will be considered as '0'. At the output port, the occurrence of an excitable excursion should be taken as a '1', and '0' otherwise.
The physical mechanism underlying the computation is interaction between ports. In particular, in our case, remnant waves that propagate energy are emitted towards the end of the excitable excursions (see figures 4 and 5). Depending on the distance d between ports, which determines the strength of the interaction, and H 3 , which sets the sensitivity of the output port, an excitable excursion of a single input port may not elicit an excitable excursion of the output. As a result, the truth table of the AND and OR basic gates can be reproduced by suitably tuning these parameters. Different arrangements are possible since the only relevant parameter of the geometry is the distance between ports. The interaction mediated by the remnant wave has a short range, since the system is dissipative and any perturbation decays at least exponentially with the distance and time (see figure 3). This avoids interference between nearby gates provided that their distance is larger than the distance between the input and the output ports within a gate. To avoid the backward excitation of an input port by the output of the same gate, the excitable threshold of the input ports is set slightly higher than that for the output ports. Also, the distance between the input ports is large enough to prevent their mutual excitation.
For an OR gate, d and H 3 are such that an excitable excursion of a single input is already enough to excite the output, as shown in figure 4. The bit '1' is introduced by setting δ 1 = 0.03 during 1 time unit. After receiving the bit, the left input port exhibits an excitable excursion which, by the above mechanism, triggers an excitable excursion of the output port. Because of symmetry, the output would look exactly the same for the case (0,1). A double activated (1,1) input would give a very similar response, completing the truth table of the OR gate.
Similarly, AND logic can be implemented by increasing d or decreasing H 3 , such that the pulse of a single input is not enough to elicit a response from the output, but the combined action of two simultaneous excitations is (see figure 5). To illustrate the flexibility in the geometry, here we have used a triangular arrangement. This configuration has two advantages. Firstly, it is possible to perform several computations sequentially in the transverse plane of the same device, instead of using a sequence of cavities, by using the output of a logic gate as one of the inputs of a contiguous one. Secondly, another output port can be placed symmetrically to the first one, forming a rhombus, allowing, for example, the simultaneous implementation of an AND and an OR gate. Using more complex motifs in the transverse plane, more complex logical operations can be implemented in a single device. Similarly, a transmission (delay) line [16] with arbitrary geometry can be built connecting several excitable units.
To implement a NOT gate, a different approach is needed. The NOT operation has a single input and should produce an output when no input is received. For this task we propose using a single LS in an oscillatory regime (see figure 6). The oscillations would be, on the one hand,  a natural clock to set the frequency of the processor and, on the other, generate a pulse at every clock step corresponding to a bit '1' if no input is received. Then, a bit '1' at the input (with a reversed phase), introduced by setting δ 1 = −0.03 during 5 time units, can set the system temporally below the oscillatory threshold, skipping one oscillation. This effectively produces a '0' at the output when a '1' is received at the input, implementing a NOT gate (see figure 6).
A key question is whether this proposal fulfills essential requirements for a logic device of any complexity to work, such as cascadability, fan-out or logic-level restoration [25]. On the one hand, while we have chosen pulses with a square-wave time profile as input bits, these gates can work with inputs of arbitrary shape, provided its integrated energy is high enough. In particular, the energy of an excitable excursion is enough to excite several subsequent inputs, 8 ensuring both cascadability (the output of one stage can drive the input of the next stage in a series of operations) and fan-out (the output of one stage is sufficient to drive the inputs of at least two subsequent stages). Our simulations show that an excitable pulse attenuated by a factor up to 10 −7 is enough to excite the input port of a logic gate in another cavity. On the other hand, logic-level restoration is provided by the intrinsic nonlinear dynamics of the system, since, provided the input perturbation is above the threshold, the excitable excursion takes place independently of its details. Thus, any signal is automatically restored independently of its level of degradation at the input. Besides, this scheme is quite robust to spontaneous emission, since spatially uncorrelated fluctuations have a very small effect on LSs which are relatively broad objects [26].
Considering the low-energy requirements for optical transmission, an optical transistor would already be useful even if its performance is only similar to that of the electronic counterparts, due to the advantage of avoiding the conversion of information from the optical to the electronic domain.
A possible issue of our proposal is isochronicity, as different logical operations may have different response times. These differences, however, may not necessarily prevent practical operation since they might fall within acceptable tolerances. Otherwise a buffer memory could be implemented to synchronize different outputs. This could be done using the same LSs in the bistable regime. Finally, we should note that although we have used coherent localized beams, it has been shown that LSs can also be switched on and off incoherently [17,21,27].

Conclusions
In summary, we have analyzed the possibility of creating logic gates using the dynamics of LSs. In particular, we have shown how to construct both an AND and an OR gate by appropriately coupling three excitable ports, and a NOT gate using a single LS in an oscillatory regime. It is important to stress that this proof of concept is independent of the specific model considered here and that logic operations could be realized in any system displaying LSs, even beyond optics. More generally, this full logical functionality is a way of showing that a very large class of pattern-forming systems are Turing universal [30]. From a practical point of view, vertical cavity surface emitting lasers (VCSELs) are particularly interesting, as in addition to its integrability with semiconductor technology, oscillatory LSs have already been experimentally observed [22,28], and evidence for excitable behavior has been theoretically observed in lasers with frequency selective feedback [29]. Evidence for a SNIC bifurcation for stationary LSs leading to excitability in the presence of a defect and drift has been reported in [21,22]. Moreover, the temporal response in VCSELs can be as high as 10 GHz, possibly allowing computations in the GHz range. Oscillating, and possibly excitable, polariton LSs have also been reported recently in semiconductor microcavities [31].
This computational method also has potential advantages with respect to conventional electronics. Firstly, it is intrinsically parallel (several logic gates can be simultaneously operated in a single device), allowing for instance dense optical interconnects to shine bits directly on a battery of input ports on the same broad area device. Secondly, it is reconfigurable by changing only the 'mask' defining the position and intensity of the localized beams. Since this can be done all-optically, logic circuits can be reprogrammed in real time, at rates of the order of the clock frequency. Otherwise, the same role of the localized beams can be played by defects of the material, which can be engineered to created hard-wired gates.