Frequency synchronization of single flux quantum oscillators

We demonstrate the frequency synchronization of multiple single-flux quantum (SFQ) oscillators with different oscillation frequencies. To synchronize these SFQ oscillators, a common constant bias current is supplied to the SFQ oscillators without any bias resistors. When an SFQ oscillator oscillates at a frequency of f, the average voltage across the Josephson junction comprising the SFQ oscillator is fΦ0 , where Φ0 is the flux quantum in the superconductor. The bias currents supplied to the SFQ oscillators are redistributed to eliminate the average voltage difference output from the SFQ oscillators. As a result, the oscillation frequencies of all the SFQ oscillators are synchronized. Simulation results indicate that SFQ oscillators with an oscillation frequency difference of more than 50 GHz can be synchronized. We experimentally demonstrate the frequency synchronization of two SFQ oscillators composed of circular Josephson transmission lines. Frequency synchronization is expected to contribute toward the development of a low-power stable clock source stabilizing SFQ circuit operation.


Introduction
Owing to their low-power and high-speed operation, superconducting single-flux quantum (SFQ) circuits [1,2] show potential for use in next-generation integrated circuit technology in the post-Moore era. As conventional SFQ logic gates possess the latching function, synchronized outputs from the logic gates are obtained using clock inputs. Thus, the generation of a high-frequency SFQ clock pulse train is essential for the high-speed operation of SFQ circuits. * Author to whom any correspondence should be addressed.
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To generate high-frequency SFQ pulse trains, SFQ oscillators have been studied as on-chip clock generators (CGs) [1,[3][4][5][6]. On-chip SFQ CGs have been widely utilized in onchip high-speed tests involving the SFQ logic circuits [7,8] and for bit-shifts in the SFQ arithmetic logic units (ALUs) [9]. In certain applications, the stability of the oscillation frequency of the SFQ oscillators is important. For instance, in SFQ-based analog-to-digital converters [10,11] and timeto-digital converters [12,13], the accuracy of conversion is influenced by the frequency stability of the SFQ clock pulse trains. Furthermore, in random number generation using SFQ circuits, the quality of the generated random number train depends on the frequency stability of the input SFQ pulse train [14][15][16]. There are many reports on the applications of multiple on-chip CGs to large-scale SFQ circuit systems such as asynchronous handshaking systems [17,18], the SFQ microprocessors [19,20], and the ERSFQ ALU [21]. In a large-scale SFQ circuit system employing a multichip module [22,23], it is reasonable to implement a clock generation circuit on each chip. However, in such systems, the oscillation frequency of all the SFQ CGs must be identical in order to synchronize the entire system.
In this study, we investigate the frequency synchronization of multiple SFQ oscillators for the generation of stable SFQ clock pulse trains. Herein, a detailed circuit analysis and the experimental demonstration of the frequency synchronization of SFQ oscillators are presented.

Analysis of frequency synchronization
In this section, we describe the principle of the frequency synchronization of SFQ oscillators and the results of the circuit analysis based on analog circuit simulations. Figure 1 shows the equivalent circuit of the SFQ oscillator under analysis. The analyzed SFQ oscillator comprises a circular Josephson transmission line. To simplify the analysis, we employ a simple and symmetric circuit structure. A constant bias current, I b , is injected into the SFQ oscillator without the use of on-chip bias resistors; by contrast, in the conventional SFQ circuit, the bias currents are supplied via on-chip bias resistors. The SFQ oscillator initiates the oscillation by supplying the appropriate input current I in . When the SFQ oscillator is oscillating at a frequency of f, an average voltage of fΦ 0 is generated across the Josephson junctions, where Φ 0 is the flux quantum in a superconductor. Figure 2 shows the principle for the frequency synchronization of the SFQ oscillators. In this circuit, two SFQ oscillators (CG1 and CG2) are current-biased by the common constant bias current of 2I b . Both CG1 and CG2 have the same circuit structure and parameters as shown in figure 1, except for the inductance comprising the circular Josephson transmission line. The values of the inductance L of CG1 and CG2 are 4.2 and 3.1 pH, respectively. Assuming the use of the AIST 2.5 kA cm −2 Nb standard process (AIST-STP2) [27,28], the oscillating frequencies of CG1 and CG2 are 65.8 and 76.6 GHz, respectively, when the designed bias current I b (=600 µA) is supplied.
Immediately after oscillation commences, the supplied constant current is divided equally and the current I b is supplied to CG1 and CG2, as shown in figure 2(a). However, considering the difference between the generated average voltages of CG1 and CG2, the bias currents supplied to CG1 and CG2 are redistributed in order to eliminate this voltage difference [29,30]. Therefore, the oscillation frequencies of both CG1 and CG2 are synchronized under the steady state, as shown in figure 2(b). The new concept in this study is the application of the current redistribution in the SFQ circuit to realizing the low-power and stable SFQ oscillators. It should be noted that the static power consumption of SFQ oscillators can be completely eliminated by using frequency synchronization because bias resistors are not used. Therefore, we could build low-power and stable SFQ oscillators using the frequency synchronization.
We simulated the circuit shown in figures 1 and 2 by using the Josephson integrated circuit simulator (JSIM) [31].  L c = 100 pH was assumed in the simulation. In the circuit simulation, the input current I in of 634 µA, which induces the injection of Φ 0 in the SFQ oscillators, is simultaneously supplied to both CG1 and CG2. The oscillations of both CG1 and CG2 commence at 100 ps. Figure 3 shows the results of the transient analysis of the voltages across one of the Josephson junctions in CG1 and CG2. Figure 4 shows the transition of the oscillation frequencies of the SFQ oscillators and the bias currents supplied to CG1 and CG2.
Immediately after the oscillation commences (i.e. at 100 ps in the simulation), CG1 and CG2 oscillate at frequencies of 65.8 and 76.3 GHz, respectively, which are almost identical to the individual oscillation frequencies of CG1 and CG2 when they are biased at I b = 600 µA. After oscillation commences, the bias currents supplied to CG1 and CG2 (i.e. I b1  and I b2 , respectively) are redistributed to eliminate the generated average voltage difference between CG1 and CG2, as shown in figure 4(b). Approximately 2.3 ns after the commencement of oscillation, I b1 and I b2 are saturated, and the oscillation frequencies of both CG1 and CG2 are synchronized to 71.0 GHz. The time required for frequency synchronization is determined by the L/R time constant of the bias circuits of the SFQ oscillators. In the analyzed SFQ oscillators, the resistance of the bias circuit is approximately equal to the total resistance of eight shunt resistors of Josephson junctions connected in parallel. The inductance of the bias circuit is determined by L b and L c . The time required for frequency synchronization could be reduced by reducing L b and L c . However, the stability of the oscillating frequency after frequency synchronization deteriorates when the inductance of the bias circuit is reduced. Appropriate choice of L b and L c is important to obtain both fast frequency synchronization and the stable synchronized frequency.
Furthermore, we evaluate how the synchronization frequency (f sync ) is determined by the individual oscillating frequencies of CG1 and CG2. In this analysis, the oscillation frequency of CG1 (f 1 ) is fixed to 65.8 GHz by setting L in CG1 to 4.2 pH. Moreover, f 2 is adjusted by varying the value of L in CG2. Figure 5 shows the simulated dependence of the synchronization frequency on the oscillation frequency of CG2 (f 2 ). In this manner, we confirm that the frequency synchronization occurs when f 2 ranges from 4.9 to 127.0 GHz. As shown in figure 5, when f 2 is close to f 1 , f sync is close to (f 1 + f 2 )/2. This result indicates that the dependence of the oscillation frequencies of the SFQ oscillators on the supplied bias current can be regarded as linear near the center of the operating bias region. However, when the difference between f 1 and f 2 is large, f sync approaches f 1 . This result indicates that the operating point of CG1 is automatically shifted toward the center of the operating margin. This phenomenon could possibly stabilize the operation of SFQ circuits that are driven by non-optimal bias currents. The frequency synchronization can be applied to any on-chip SFQ clock source, such as single Josephson junction-based SFQ oscillators [32,33] and long Josephson junction oscillators [34,35].

Experimental
We designed test circuits using the AIST 10 kA cm −2 Nb high-speed standard process (AIST-HSTP) [36,37] to demonstrate the frequency synchronization of two SFQ oscillators. We used a three-dimensional inductance extraction tool Induc-tEX [38] was used for precise inductance design. Figure 6 shows the photomicrograph of the test circuit. For this test circuit, the equivalent circuit and the circuit parameters, except for the critical current density, are identical to those discussed in the previous section. Individual test circuits where either CG1 or CG2 is simply biased by I b are also prepared. By comparing the oscillation frequencies in these three test circuits, we demonstrate the frequency synchronization of CG1 and CG2.
All the test circuits are cooled to 4.2 K in a liquid helium bath and then analyzed. We measured the oscillating frequency (f ) of each SFQ oscillator by measuring the average output voltages across the Josephson junctions, where terminals V monitor1 and V monitor2 are attached; the oscillating frequency is calculated as follows: where V is the measured average voltage [39]. The average voltages output from the SFQ oscillators were measured using a nanovoltmeter (Keithley 2182A). When I in of 700 µA was supplied to the test circuit shown in figure 6, we obtained the same voltages from both V monitor1 and V monitor2 . This indicates that both CG1 and CG2 were oscillating at the same frequency. Figure 7 shows the measured dependences of the oscillation frequencies of the three test circuits on the supplied bias current. The measured oscillation frequency of the test circuit in figure 6, f sync , lies between the individual oscillation frequencies of CG1 and CG2 for all the bias regions. This also indicates the frequency synchronization of CG1 and CG2.

Conclusion
We successfully realized the frequency synchronization of SFQ oscillators with different oscillation frequencies by using the common current biasing. Results of the analog circuit simulations indicated that the current redistribution, which nullified the average voltage difference among multiple SFQ oscillators, induced the frequency synchronization of the SFQ oscillators. Furthermore, we experimentally observed the frequency synchronization in all bias regions. We believe that frequency synchronization can facilitate the stabilization of the high-speed operation of SFQ circuits.

Data availability statement
The data that support the findings of this study are available upon reasonable request from the authors. fabricated in the clean room for analog-digital superconductivity (CRAVITY) of National Institute of Advanced Industrial Science and Technology (AIST) with the high-speed standard process (HSTP).