Impact of multi-domain effect on the effective carrier mobility of ferroelectric field-effect transistor

HfO2-based ferroelectric field-effect transistors (FeFETs) are a promising candidate for multilevel memory manipulation and brain-like computing due to the multi-domain properties of the HfO2 FE films based polycrystalline structure. Although there have been many reports on the working mechanism of the HfO2-based FeFET and improving its reliability, the impact of multi-domain effect on the effective carrier mobility (μ channel) has not been carried out yet. The effective μ channel determines the level of readout current and affects the accuracy of the precision of peripheral circuit. In this work, FeFETs with HfZrO x FE gate dielectric were fabricated, and the effect of write (or erase) pulses with linear gradient variation on the effective μ channel was studied. For the multiple downward polarization under write pulses, the μ channel degrades as the domains gradually switch to downward. This is mainly due to the enhancement of the scattering effect induced by the positive charges (e.g. oxygen vacancies VO2+ ) trapping and the increase of channel carrier density. For the erase pulses, the μ channel increases as the domains gradually reverse to upward, which is mainly due to the reduction of the scattering effect induced by the detrapping of positive charges and the decrease of channel carrier density. In addition, the modulation effect of multilevel polarization states on μ channel is verified by numerical simulation. This effect provides a new idea and solution for the development of low power HfO2-based FeFETs in neuromorphic computing.


Introduction
The performance of conventional Von Neumann computing architecture is limited because it requires transferring data back and forth between physically separated memory and processing units.The design of memory hierarchical architecture helps alleviate this bottleneck [1,2].Several non-Von Neumann computing architectures, such as neuromorphic computing and memory computing, have attracted great attention from researchers.Non-volatile memristors play an important role in these computing architectures to emulate neurons and synapses, and as computing memory elements in mem-computing process [3,4].Ferroelectric memory devices are one of the novel semiconductor non-volatile memory devices that have attracted considerable research interest for the memory-in-computing from the integrated circuit Original content from this work may be used under the terms of the Creative Commons Attribution 4.0 licence.Any further distribution of this work must maintain attribution to the author(s) and the title of the work, journal citation and DOI.researchers, especially after the report of HfO 2 -based ferroelectric materials in 2011 [5].Furthermore, HfO 2-based ferroelectric field-effect transistors (FeFETs) have attracted much attention due to their compact device structure, nondestructive reading, low power consumption and CMOS process compatibility [6][7][8].
Multilevel storage of HfO 2 -based FeFETs is an effective way for low-cost and high-density applications [9].Recently, many researchers have reported on the mechanism of multilevel performance and the reliability of intermediate polarization states, mainly to mimic brain synapses for neuromorphic applications [10][11][12][13].It has been revealed that the multiple non-volatile memory states of HfO 2 -based FeFETs are driven by the multiple ferroelectric domains switching of HfO 2 -based ferroelectric thin film.The percolation theory analyzes the multi-domain induced threshold voltage shift [14].The impact of the reading operation on the MW is studied in [15].Higashi et al explore charge trapping dynamics [16], and a compact model of multidomain FeFET is reported in [17].The non-equilibrium Green's function approach is used by Saha et al to study the multidomain FeFET [18][19][20].Moreover, HfO 2 -based FeFETs exhibit stable intermediate polarization states, enabling their multilevel storage.However, the regulation of the multi-domain effects of the HfO 2 -based ferroelectric film on the effective carrier mobility (μ channel ) of the FeFETs has not been studied yet.
The μ channel of the FeFET determines the level of readout current and affects the accuracy of the precision of peripheral circuit.On the one hand, multiple polarization states lead to different polarization charge densities of FE interface layer, inducing various carrier densities in the channel.On the other hand, multiple polarization states lead to different densities of interface states and multiple trapping/detrapping at the ferroelectric/channel interface for FeFET [21,22].Among various HfO 2 -based ferroelectric thin film [23][24][25][26][27][28], Zr doped HfO 2 (HfZrO x ) is proved to be the most promising one due to (1) the good ferroelectric properties in the doping range of 30% ∼70% [29], (2) the annealing temperature required to produce ferroelectric properties can be reduced to 400 °C [30].
In this work, the impacts of multilevel polarization states on μ channel for HfZrO x FeFET are experimentally investigated.The μ channel of the device can be modulated by different polarization states in a linear way.Additionally, the effect of the multi-domain of the HfO 2 -based ferroelectric film on the μ channel of the FeFET is also verified by the numerical simulation.

Device fabrication
The key process of fabricating the HfZrO x FeFET was shown in figure 1(a), which is similar to [31].The fabricated HZO FeFET was annealed at 550 °C for 30 s.The gate length (L G ) and the gate width (W) of the HfZrO x FeFET are 3 μm and 80 μm, respectively.
The cross-section transmission electron microscope (XTEM) image in figure 1(b) shows the S/D, channel, and gate stack regions of the fabricated HfZrO x FeFET.The inset shows high-resolution transmission electron microscope (HRTEM) image of the TaN/HfZrO x /SiO 2 /Si gate stack.Sharp interfaces are observed, and the thicknesses of HZO and SiO 2 interfacial layer (IL) are 10 nm and 1.4 nm, respectively.In addition, significant Hf, Zr, and O elements were observed by energy dispersive x-ray spectroscopy (EDS) mapping.Figure 1(c) shows the measured high-resolution grazing incidence XRD (GIXRD) patterns of the TaN/HfZrO x /SiO 2 /Si gate stack.The incident angle is 1°.The 2θ peaks located at 30.5°, 35°, 50.5°, 55°and 60°corresponds to o(111)/t(111), o(200), o(220)/t(200), m(221) and m(−303), respectively.A mixed crystal phases were observed, which is caused by the polycrystalline structure of the HfZrO x film, and also contributed to the multi-domain effect [32].Moreover, a strongest peak at ~30.5°is considered to contribute to the ferroelectricity of the HZO FE film [33].
Typical ferroelectricity of the TaN/HfZrO x /SiO 2 /Si gate stack was verified by the measured polarization versus voltage (P-V ) loops using axiACCT TF Analyzer 3000 system in figure 1(d).The testing frequency is 10 kHz.As the applied V increases from 5 to 6.5 V, the shape of the P-V curves gradually widens and the remnant polarization (P r ) gradually increases, which indicates the coexistence of multi-domains and possible multilevel polarization applications.

Results and discussion
The schematic of multi-ferroelectric domain switching in HfZrO x and energy band diagram for gate stacks at equilibrium during the gradual write and erase process is shown in figure 2. Ferroelectric polycrystalline is composed of many small regions, and the polarization direction of dipoles in each domain is consistent, while the polarization direction of the adjacent domains is different.In the 'Initial' state, the domains exhibit uniform spontaneous polarization, macroscopically, the whole crystal is non-polarized and neutral, which has no effect on the carrier distribution in the channel.The holes at the interface are in a depleted state.Under the external electric field, the electric domains along the electric field direction grow, and the electric domains against the electric field direction shrink.As shown in the charges are generated at the ferroelectric semiconductor interface, attracting electrons which causes the P-type substrate to require more hole to be depleted resulting in a thicker depletion layer.The wider depletion layer tends to be inverted and increases channel conductivity, leading to a smaller threshold voltage (V TH ).With the increase of the external electric field, the electric domains along the electric field direction further expand until all electric domains are along the direction of the external electric field, the entire crystal becomes a single domain crystal.In this case, the positive polarization charges at the interface reaches saturation, attracting the most electrons and the channel conductance is also the largest, as the 'Write n' state shows.Under a large negative pulse voltage, the downward polarized domain shrinks, the positive polarized charges at the interface decrease, as the 'Erase 1' state shows, the attracted electrons decrease which causes the P-type substrate to require less hole to be depleted resulting in a thinner depletion layer.The channel conductivity decreases relatively, which leads to the device harder to be turned on.With the increase of the negative pulses, the down polarized domains further shrink, and the upward polarized domains further grow until the ferroelectric film reaches negative saturation, and the ferroelectric domain forms a new single domain structure, as shown in the 'Erase n' state.In this case, the interface generates the most negative charges and attracts the most holes, which makes the transfer characteristics of the device move to a higher V TH and the channel conductance is the minimum.
The device characteristics were performed by Keithley 4200-SCS, the pulse scheme is shown in figure 3(a), I DS -V GS , I DS -V DS and capacitance-voltage (C-V ) curves were characterized after each write/erase (W/E) pulse, the pulse width is 1 μs.With partial polarization switching in HfZrO x FE film, the V TH of the HfZrO x FeFET, representing one memory state in the FeFET, can be finely controlled.
Here, the V TH is defined by the maximum transconductance method [34].As figure 3(b) shows, V TH can be reflected by I DS -V GS curves of HfZrO x FeFET.For the multiple downward V, the step is 0.25 V, the measured I DS -V GS curves gradually shift to the negative direction (gradually reduced V TH ) due to the different quantities of positive polarization surface charges at polarization by a series of write pulses  (V G from 3.5 to 5.25 V, the step is 0.25 V), the measured I DS -V GS curves gradually shift to the negative direction (gradually reduced V ) due to the different quantities of positive polarization surface charges at HfZrO x /SiO 2 interface.On the contrary, the multiple polarization states by a series of erase pulses (V G from −6.5 to −8 V, the step is 0.25 V) shifts the I DS -V GS curves to the positive direction gradually, corresponding to the slowly increasing V TH .The fully downward and upward ferroelectric domains in HfZrO x are considered to be related to the saturated remanent polarization, corresponding to the states under 5.25 V/1 μs write pulse and −8 V/1 μs erase pulse.The counter-clockwise shift further indicates the multiple ferroelectrics switching in HfZrO x FeFET.The corresponding I DS -V DS curves at |V GS -V TH | of 0.5 V are shown in figure 3(c).It is clear to see that the saturated I DS of the HfZrO x FeFET decreases with the increase of write pulse voltage, while increases with the erase pulses voltage.The output current (I DS ) is directly determined by μ channel so that it can reflect the μ channel .The capacitance of oxide layer can be obtained accurately by measuring C-V, which plays an important role in the extraction of mobility.Figure 3(d) shows the C-V characteristics of the HfZrO x FeFET with a frequency of 10 kHz after different W/E pulses.For the multiple downward polarization under write pulses, the C-V curves shift to the negative direction, indicating that additional negative charges need to be sacrificed to neutralize the interface charge, which is positive.For the multiple polarization states under write pulses, the C-V curves shift to the positive direction, indicating that additional positive charges need to be sacrificed to neutralize the interface charge, which is negative.
The μ channel of the device was extracted by the split C-V method, as shown in below [35]: where L and W are the gate length and width, respectively.I DS (V GS ) and I DS (V TH ) are I DS value at V GS and V TH , respectively.The C OX is the maximum capacitance, V DS is 0.01 V.The Q inv is extracted by (V GS -V TH )•C OX .Figure 4(a) shows the μ channel as a function of channel inversion charge density (Q inv ).It can be seen that the μ channel of FeFET decreases with the increase of write pulse voltage, while increases with the  increase of erase pulse voltage.This indicates electron mobility of HfZrOx FeFET is continuously tunable.Figures 4(b) and (c) show the extraction of V TH and μ channel at Q inv of 5 × 10 12 cm −2 under W/E pulses.In order to ensure the accuracy of the data, we included error bars reflecting statistical results obtained by repeated measurements.Same trend shows that the mobility variation can be attribute to the V TH shift caused by polarization.The change of domain in the whole process can be abstracted into figure 2. The distribution of domains for initial state is corresponding to the 'Initial' state in figure 1(d).Figures 4(d) and (e) shows the measured G p /ω versus frequency curves of both types HZO capacitors under different 'write' and 'erase' states, respectively.G p and ω are the measured conductance and proportional to the measurement frequency, respectively.According to [36], the peak values of (G p /ω) max can be used to calculate the density of interface traps (D it ) as following: where C DE is the dielectric layer (SiO 2 ) capacitance, C FE is the HZO capacitance and C it is the interface traps capacitance (D it = C it /q).It is seen that the D it of the devices increases with the increase of the absolute value of pulse amplitude, which suggests the stronger trapping/detrapping in writing/ erasing process.
For the write process, the down polarized domains grow, and the positive polarization charges are generated at the ferroelectric semiconductor interface, that is to say the positive charges (e.g.oxygen vacancies + V O 2 ) are trapped at the SiO 2 IL, attracting electrons and increasing channel conductivity, leading to the negative shift of V TH .The trapping effect is enhanced with the gradual growth of the down polarized domains, and increasing the scattering effect of the channel carriers, resulting in the degradation of μ channel .The intermediate states can be abstracted into the 'Write 1' state in figure 2 and the condition of 5.25 V pulse corresponds to the 'Write n' state.Conversely, for the erase process, the downward polarized domains shrink and the upward polarized domains grow, the positive polarized charges at the interface decrease, the attracted electrons decrease and then the attracted holes increase, in other words the positive charges are detrapped at the SiO 2 IL, leading to the reverse shift of V TH .The detrapping effect is enhanced with the gradual shrink of the down polarized domains, and decreasing the scattering effect of the channel carriers, resulting in the increasing of μ channel .The intermediate erase states can be abstracted into the 'Erase 1' state in figure 2 and the condition of −8 V pulse corresponds to the 'Erase n' state.It worth noting that the μ channel cannot increase to the initial state which is attributed to the fact that the detrapping process can also induce scattering effect.
In order to further verify the continuous modulation effect of polarization on μ channel , the numerical simulation is carried out by Sentaurus TCAD tool.The quantum modified Poison and carrier continuity equations are solved self-consistently for energy bands.Some mobility models are also taken into the physical part including phonon scattering, impurity scattering, carrier-carrier scattering, high-field saturation and transverse field models.The key parameters and modeling formulas are shown in figure 5(a), and the workfunction of TaN is 4.6 eV.Similar to the measurements, the HfZrO x layer is switched to various polarization states by applying rectangular pulses of different voltages.Figure 5(b) shows the typical multi-domain P-E loops, the remnant polarization enhances with the increase of bias field since more domains undergo the polarization switching process.Figure 5(c) shows the electric field applied on HfZrO x layer, the fixed pulse width is 1 μs, the peaks are related to the depolarization field.Figure 5(d) shows the polarization versus time curves, it is obvious that the downward polarizations reach the maximum values under pulses and then decreases to a stable state rapidly.And the stable values are less than the residual polarization of the ferroelectric material as the P-E loops with the same electric field shown in figure 5(b), which is mainly caused by the depolarization field that comes from the incomplete charge compensation due to the finite Figures 6 (a) and (b) show the numerically calculated I DS -V GS curves and C-V curves of the HfZrO x FeFET for different polarization states, respectively.The V DS is 0.01 V, and the frequency is 10 kHz.It is obvious that the curves shift to negative direction with the increase of polarization.In the same way, the μ channel are calculated, and the device shows decreased μ channel with the increased polarization as shown in figure 6(c).Figure 6(d) shows the extracted V TH and μ channel at Q inv of 5 × 10 12 cm −2 under multilevel polarization, the μ channel decreases as V TH shifts to negative direction.All the simulated results are consistent with the measurements, verifying the continuous modulation effect of polarization on μ channel .

Conclusion
This paper presents electrical characterization of HfZrO x FeFETs with continuously modulated μ channel by multilevel polarization.It is demonstrated that the μ channel of the W/E states decrease/increase with the increasing pulse voltage, which originates from the enhanced + V O 2 trapping/detrapping under different polarization states.Additionally, the μ channel under all the written and erased states is smaller than that for the initial state.Furthermore, the numerical simulation is carried out to verify the continuous modulation effect of polarization on μ channel , the calculated results are consistent with the measured ones.This work offers a new opportunity for the development of low power HfO 2 -based FeFET in neuromorphic computing.

Figure 1 .
Figure 1.(a) Key process steps for fabrication of the HfZrO x FeFET.(b) HRTEM image of the fabricated FeFET gate stack.The right part shows the EDS mapping of Hf, Zr, and O elements over the gate stack.(c) Measured the GIXRD for the Si/SiO 2 /HfZrO x stack.(d) P-V curves of the TaN/ HfZrO x /SiO 2 /Si stack.

Figure 2 .
Figure 2. Schematic of the domain reversal and band diagram during write and erase operations.

( a )
The test waveforms used for the pulse measurement.(b) I DS -V GS curves (c) I DS -V DS curves (d) and C-V curves of HfZrO x FeFET for multi-polarization-states.

Figure 5 .
Figure 5. (a) Modeling formulas and key material parameters used in the simulation.(b) Simulated P-E curves for HfZrO x FeFET.(c) Electric field and (d) polarization of HfZrO x layer versus time under different pulses.(e) Band diagram of the simulated HfZrO x FeFET for multilevel polarization, the inset is the corresponding schematic charge distribution.

Figure 6 .
Figure 6.(a) Simulated I DS -V GS curves (b) C-V curves and (c) μ eff -Q inv curves for the device with different polarization states.(d) The extracted V TH /and μ eff at Q inv of 5 × 10 12 cm −2 under different polarization states.