Processing and characterization of large area InP nanowire photovoltaic devices

III−V nanowire (NW) photovoltaic devices promise high efficiencies at reduced materials usage. However, research has so far focused on small devices, mostly ≤1 mm2. In this study, the upscaling potential of axial junction InP NW photovoltaic devices is investigated. Device processing was carried out on a full 2″ wafer, with device sizes up to 1 cm2, which is a significant increase from the mm-scale III−V NW photovoltaic devices published previously. The short-circuit current density of the largest 1 cm2 devices, in which 460 million NWs are contacted in parallel, is on par with smaller devices. This enables a record power generation of 6.0 mW under AM1.5 G illumination, more than one order of magnitude higher than previous III−V NW photovoltaic devices. On the other hand, the fill factor of the larger devices is lower in comparison with smaller devices, which affects the device efficiency. By use of electroluminescence mapping, resistive losses in the indium tin oxide (ITO) front contact are found to limit the fill factor of the large devices. We use combined light-beam induced current (LBIC) and photoluminescence (PL) mapping as a powerful characterization tool for NW photovoltaic devices. From the LBIC and PL maps, local defects can be identified on the fully processed devices.


Introduction
The accelerating worldwide deployment of solar cells is making solar electricity generation a cornerstone for the necessary transition towards sustainable, fossil-free energy systems [1]. The market for terrestrial photovoltaic cells is, to date, dominated by crystalline silicon (c-Si) solar cells [2], despite the indirect band gap of Si. However, there exist applications for which different materials are preferred. For instance, in space applications, where high efficiencies and minimum weight are required, the III−V material system outperforms Si [3]. In particular InP is suitable for single junction photovoltaics with a bandgap well-matched to the maximum of the Shockley-Queisser limit [4], and correspondingly a high photovoltaic efficiency of up to 24.2% can be reached [5].
InP and other III−V semiconductor nanowires (NWs) have attracted significant attention owing to their unique optoelectronic properties and the possibility to combine lattice-mismatched materials, enabled by radial strain relaxation [6,7]. For photovoltaic devices in particular, III−V NW arrays offer the advantage of enhanced light absorption, enabling near-complete absorption of above-band-gap light despite a low fraction of the area covered by NWs [8,9]. Paired with the prospect of eliminating the need for a III−V substrate or the possibility of reusing it, this leads to the promising vision of photovoltaic devices with efficiencies approaching those of planar III−V cells at a significantly lower cost [10][11][12]. Radial and axial junction NW geometries exist and both have been studied extensively [13], with record efficiencies between 15.0% and 17.8% demonstrated in devices based on InP and GaAs axial junction NWs [14][15][16][17]. Axial junction NWs are furthermore suitable for multi-junction photovoltaic devices containing several junctions within a NW [18,19].
However, the fabrication of the NW arrays for the record efficiency NW solar cells was carried out on a native III−V substrate, and substantial further development is needed to achieve similar efficiencies using III−V NWs grown on a Si substrate, or peeled-off NW arrays, which could enable substrate reuse and thereby reduce the costs and environmental impacts [10,20,21]. On the other hand, less cost-sensitive space applications may hold the highest potential for nearterm commercial viability [22]. Importantly, NW array solar cells have been shown to exhibit increased radiation hardness compared to their planar counterparts [22,23].
An important aspect that has been neglected in research on III−V NW photovoltaic devices is the necessity of increasing the device area above the small area (most often 1 × 1 mm 2 ) used for research purposes [20]. To address this challenge, we present InP NW array solar cells processed on a full 2″ wafer. The largest devices have a record active area of 10 × 10 mm 2 = 1 cm 2 , which is a significant increase from the mm-scale III−V NW photovoltaic devices published previously [20], and corresponds to approximately 460 million NWs contacted in parallel.

Experimental methods
Successful synthesis of InP NW arrays on a 2″ InP substrate has recently been shown [24], and similarly grown NW arrays are used as the basis for the processed NW photovoltaic devices presented in this work. Hexagonal arrays of gold (Au) seed particles were defined on a 2″ InP (111)B substrate by use of displacement Talbot lithography (DTL), E-Beam evaporation of 65 nm Au, and lift-off [24,25]. An Aixtron 200/4 MOVPE reactor was used to grow InP NWs on the entire 2″ substrate, in a hexagonal array with a pitch of 500 nm. The NW diameter is 200 nm, for optimized light absorption [8,26]. The NW length was controlled to 2 μm using a LayTec in situ reflectometry system [27]. After a prenucleation step to preserve the hexagonal pattern and annealing at 550°C [28], InP NW synthesis was performed using trimethylindium (TMIn) and phosphine (PH 3 ) as precursors at a growth temperature of 440°C. The NWs were doped in an axial p−i−n structure, where diethylzinc (DEZn) and tetraethyltin(TESn) were used as p-and n-type dopants, respectively, both yielding a charge carrier concentration on the order of 10 19 cm −3 [16,18,29,30]. A reduced molar fraction of DEZn is used for compensation doping of the i-segment, with a dopant concentration on the order of 10 16 cm −3 [16,29,31,32], and hydrogen chloride (HCl) was used to impede undesired radial growth [33,34]. The lengths of the p, i and n segments are 550 nm, 1400 nm and 50 nm, respectively. All parameters used during the NW array synthesis are summarized in table S1 (in the supplementary information), and a scanning electron microscopy (SEM) image of the as-grown NW array is shown in figure 1(a).
The NWs are isolated from each other using SiO x formed by atomic-layer deposition [35], followed by a planarization step using Cyclotene 3022-46 (BCB) which was etched back using reactive ion etching (RIE). The SiO x protective layer as well as the Au particles were etched (using RIE and wet chemical etching, respectively) in order to enable electrically contacting the NW tips. The NWs were contacted at the top using a sputter-coated ITO film with a thickness of 150 nm, seen in figure 1(b). A schematic drawing of the described processing steps and SEM images taken after each processing step are shown in figures 1(c) and S1, respectively.
Photolithography was used to define the devices, see figure S2 for a visualization of the procedure. First, before ITO deposition, a frame of S1828 photoresist surrounding the active device area is applied and hard-baked. Further, the homogenously sputtered ITO is selectively etched between devices, and finally Ti/Au (10 nm/200 nm) contact pads are defined using E-Beam evaporation and lift-off. A common back contact to all devices is established by evaporating Ti/ Zn/Au (10 nm/20 nm/200 nm) on the back side of the p-type conductive substrate, and connecting the wafer to a copper plate, as seen in figure 1(d). The Ti layer enhances adhesion and the Zn layer helps to form an ohmic contact to the p-type InP substrate [36,37].
Current−voltage (I−V ) characteristics of the processed NW photovoltaic devices, both in the dark and under AM1.5 G illumination, were measured using a Cascade Microtech probe station and a G2V pico solar simulator. Furthermore, an Enlitech photoluminescence mapper with a 10× objective and a numerical aperture of 0.25 was used for photoluminescence (PL) and light-beam induced current (LBIC) mapping. The used laser has an emission wavelength of 635 nm, with the laser spot scanning over the sample using a motorized sample stage. Electroluminescence (EL) intensity measurements were performed using a separate microscope setup with a CCD camera.

Results and discussion
NW arrays were synthesized and processed into photovoltaic devices on full 2″ InP substrates as detailed in the methods section. Good homogeneity of the NW array across the entire 2″ substrate was observed in terms of NW length and diameter [24]. The processed devices on each sample range in size from 0.1 × 0.1 to 10 × 10 mm 2 , of which mostly the devices with a size of 1 × 1 mm 2 and 10 × 10 mm 2 will be discussed in this paper.  Please note that the total current-equal to the current density multiplied by the device size-is about 100 times larger for the 10 × 10 mm 2 sized device, corresponding to the 100 times larger device area. However, the fill factor is significantly lower for the larger device, leading to an  overall lower efficiency of 6.0% compared to 9.0% for the smaller device. These efficiencies do not quite reach the record values of between 15.0% and 17.8% efficiency reported for the best III−V NW photovoltaic devices [14][15][16][17], but are in line with the results we have obtained for small-area reference samples processed in parallel. Efforts put into the further development of small area III −V NW photovoltaic devices, such as the optimization of doping profiles and surface passivation, can be transferred to larger devices to reach higher efficiencies [16,29,31], however, these are outside the scope of this work. We note that the 10 × 10 mm 2 sized device shows-due to its comparatively very large size-the by far highest reported output power for a III−V NW array photovoltaic device, a total of 6.0 mW power is generated under AM1.5 G illumination. For further comparison with previously reported devices, we refer the reader to the data compiled in table 7 in the review by Barrigoń et al [20].
In order to better understand the reasons for the differences in fill factor and efficiency between the large 10 × 10 mm 2 sized device and the smaller 1 × 1 mm 2 sized device, it is instructive to discuss the dark I−V curves shown in figure 2(b). These can be analyzed in terms of the well-established one-diode model of a solar cell, which is described by an equivalent circuit including a series resistance of R S and a possible shunt with a conductivity of [38,39]. The effect of the series resistance R S is to limit the current at high forward currents. By fitting the dark I−V curves in figure 2(b) with the one-diode model (using a genetic algorithm implemented in MATLAB), the diode parameters I 0 (reverse saturation current), n (ideality factor), and R S can be determined. The results for = n 1.42 (10 × 10 mm 2 ) and = n 1.43 (1 × 1 mm 2 ) are almost identical, and the difference between the values of =´-I 5.9 10 0 6 (10 × 10 mm 2 ) and =Í 1.8 0 -10 6 (1 × 1 mm 2 ) does not lead to significant differences in expected performance under illumination. On the other hand, there is a clear difference in the series resistances, determined to be = W R 6.6 cm S 2 and = W R 0.24 cm S 2 for the larger and smaller device, respectively. The high series resistance of the 10 × 10 mm 2 device is expected to have a significant impact on the solar cell performance by reducing the fill factor (FF), a value as low as = FF 0.52 is expected under AM1.5 G illumination based on simulating the one-diode model with R s = 9.9 Ω cm 2 . The series resistance is thus the main reason for the low fill factor of = FF 0.43 measured for the 10 × 10 mm 2 sized device under AM1.5 G illumination.
On a side note, the reverse current of the devices in the dark is increasing quasi-exponentially (albeit at a very low current density) with increasing negative bias, as seen in the range of -< < - figure 2(b). This behavior, which is not predicted by the one-diode model, has been observed previously in NW light emitting diodes [40,41], and can be explained in terms of variable range hopping of electrons between trap states [40][41][42][43].

EL intensity maps and series resistance
Electroluminescence intensity maps of a small device at different bias conditions are shown in figures 3(a)-(c). The resulting EL image of the device changes significantly as a function of applied bias. At low current levels, the emission is uniform across the device, except for local defects. However, at high currents, EL is concentrated at the edge closest to the Ti/Au contact pad and diminishes rapidly as the distance from the contact pad increases. Please note that the color scale in figures 3(a)-(c) is logarithmic-a linear color transition thus corresponds to an exponential change in EL intensity. This effect is straightforward to explain in terms of the limited conductivity of the ITO front contact layer. At high current densities, the lateral conduction within the ITO front contact layer gives rise to a voltage drop along the length of the device. This leads to a significantly reduced local current density through the NW array, and consequently a reduced EL intensity in positions further away from the contact pad. This effect was simulated for comparison with the measured position-dependent EL emission intensity. Figure 3(e) shows the resulting simulated curves of current as a function of position, normalized by the total current. We have performed the simulations using a simple 1 d finite element model implemented in Matlab. The model is based on NW diode parameters extracted from the dark I−V curves in figure 2(b), and an ITO sheet resistance of 40 Ω sq −1 . The bias values were adjusted such that the simulated total currents match the measured currents in figure 3(d). The measured and simulated curves in figures 3(d) and (e) show a general agreement in shape, supporting the attribution of the observed positiondependent EL emission to the the limited conductivity of the ITO front contact layer.
In order to quantify the resistivity of the ITO layer, we performed transfer line measurements using a 40 μm wide strip of 150 nm thick ITO, see figure S4. From the line resistance of 1.0 kΩ mm −1 the resistivity of the ITO is calculated to be =´Wr 6.1 10 m, 6 corresponding to a sheet resistance of / = W R 40 sq for the 150 nm thick ITO film. This is in line with published data on resistivity of optimized ITO thin films ranging between = -´Wr 2.9 9.9 10 m 6 [44][45][46]. The comparison confirms that the quality of the deposited ITO film is satisfactory. However, it also indicates that there may be potential for further optimization. The resistivity of the ITO front contact layer is anticipated to have an impact on the performance of the solar cell due to resistive losses. Specifically, it is expected that an increase in ITO resistivity will result in a reduction of the fill factor [47]. As a function of device area, a stronger adverse effect is expected with increasing device area and larger spacing between grid fingers [48,49]. This can be seen as a possible explanation for the reduced fill factor of = FF 0.43 for the 10 × 10 mm 2 sized device compared to = FF 0.67 for the smaller 1 × 1 mm 2 sized device, shown in figure 2(a)).
We can compare the measured decrease in fill factor FF due to resistive losses in the ITO layer with the theoretical models [47][48][49], which predict a resistive power loss of = P J bR, where b is the grid finger spacing. Consequently, the reduction in fill factor is given by Calculating this value based on the grid finger spacing of = b 1.67 mm used in the 10 × 10 mm 2 sized device, we get D = FF 0.02, which is much less than the observed difference in fill factor D = FF 0.24 between the devices of different size.
To understand the mismatch between the theoretical estimate and observed value of DFF, we consider EL measurements performed on a device with grid fingers, as shown in figure S5. Interestingly, the presence of grid fingers does not appear to affect the EL emission of the sample. When comparing figure S5 to figure 3, it is evident that the EL intensity maps are similar in both cases, with and without grid fingers. At high current densities, the EL emission is strongly localized close to the Ti/Au contact pad, but is-contrary to our expectations-not enhanced in the vicinity of the grid fingers. These results suggest that the Ti/Au grid fingers of our devices are not conducting current effectively enough to facilitate the distribution of current throughout the device. We cannot provide a conclusive explanation why this should be the case but have two speculative suggestions. For one, the contact between the ITO sheet and Ti/Au grid fingers may be less conductive than expected and form a barrier for the current. This is supported by measurements done on Ti/Au contact pads on an ITO strip (not shown), where we observe high contact resistivity (on the order of = W R 30 cm contact 2 ) between the contact pad and the ITO.
Another possible reason for the lacking current conduction of the grid fingers is the rough morphology of the device. The NW array leads to a regular, but mesoscopically rough device surface onto which the Ti/Au fingers are evaporated, as seen in figure 1(b). This may impact the conduction in the grid fingers, potentially even rendering them non-continuous. Further investigations will be required for understandingand improving on-the reduced current conduction in the grid finger, but these are outside the scope of this paper.
Returning to the expected reduction of the fill factor D = b R FF  fingers, we can re-calculate DFF using the assumption b = L = 10 mm, the device length. This yields D = FF 0.57, which is approximately a factor of 2 larger than the observed value of D = -= FF 0.67 0.43 0.24. The correct order of magnitude of this estimation can be seen as a confirmation of the attribution of the device series resistance to the sheet resistance of the ITO front contact. Please also note that a frame is surrounding our device, which may explain why the assumption b = L = 10 mm is not fully representing our structure and thus overestimates DFF.

LBIC and PL mapping to identify defects
One of the possible challenges of upscaling III−V NW array solar cell areas is the large number of individual NWs that need to be contacted in parallel and contribute to the total current. Problems with the contacting of a significant portion of the NWs would manifest as a decreased short-circuit current density J SC for large devices. Such an effect is not observed (see figure 2(a)), which means that a contact is formed to the majority of the NW array. However, this does not preclude the possibility of localized defects where no current is generated.
We use light-beam induced current (LBIC) mapping in combination with PL intensity mapping in order to gain an understanding of the device homogeneity, the presence of defects, and their nature. PL is commonly used to characterize as-grown NWs, both as standing NW arrays [24,50,51] and broken-off single NWs [52][53][54][55][56]. Recently, hyperspectral PL imaging was used on processed NW photovoltaic devices for extracting the quasi-Fermi level splitting [57]. However, this is the first work to use PL mapping, in combination with LBIC, to identify defects on fully processed NW photovoltaic devices. Figure 4 shows LBIC and PL intensity maps of a 10 × 10 mm 2 sized device, which contains plenty of defects due to problems during the substrate patterning and is thus well suited for studying the defects by use of LBIC and PL mapping. The I−V curves as well as external quantum efficiency (EQE) measurements for this particular device are shown in figure S6. The area of the device is clearly discernable in both maps shown in figure 4, as are the Ti/Au fingers (seen as vertical lines) that are placed on top of the ITO top contact.
The locally induced LBIC current is zero when the laser spot is located outside of the device area, and a current of up to 494 μA is generated when the laser spot is on the device area. The generated current is homogenous across the device areaexcept for small patches which are affected by local defects. The PL intensity map in figure 4 shows the intensity of the PL signal integrated in the range of 1.31-1.39 eV, which corresponds to the full width at half maximum (FWHM) of the typical recorded PL spectrum (see figure 5(c) for a typical spectrum). The PL intensity is highest outside of the device area, where the NW array is not contacted from the top. This is because the laser beam induces a forward voltage in the NWs, and the resulting electric field counteracts the built-in electric field, thus preventing charge carrier separation and thereby enhancing radiative recombination [58]. For the NWs contacted as part of a device, on the other hand, the charge carriers generated locally in the position of the laser spot will migrate laterally through the ITO top contact layer and flow as a forward current through the NWs in non-illuminated areas. Thus, most of the generated charge carriers are extracted from the illuminated NWs and do not contribute to the PL signal. Within the device area, the PL intensity varies noticeably, due to defects that affect the PL signal over a larger area as compared to the LBIC. Judging from the appearance of the defects in the PL intensity map, they can be identified as comets originating from particles affecting the resist flow during spincoating [59]. The position of many of these comets can be identified to correlate with defects seen in the LBIC map.
To gain an understanding of the nature of these defects, high-resolution LBIC and PL maps were measured, with one The imaged area contains a comet which is clearly visible in the PL map, with a corresponding defect also seen in the LBIC map. The defect shows up as a small circular area of almost zero generated current in the LBIC map but shows stronger PL emission than the surrounding device area. Interestingly, another defect with a different 'footprint' is seen in the bottom part of figure 5this defect is characterized by an area with near-zero LBIC current, but no significant change in the corresponding PL intensity compared to the rest of the device. The SEM images shown in figures 5(d)-(f), can help to understand the origin of these two distinct types of defects. In the overview SEM image in figure 5(d)), the device area in which the NW tips are exposed has a homogenous bright appearance 1 and would resemble figure 1(b) in a close-up. The defects are discernable as dark areas with a bright central spot in the SEM image. The close-ups in figures 5(e) and (f) help to identify the bright central spot defining the defects as a few abnormally long and thick NWs protruding from the BCB planarization layer. A striking difference in their diameter and number is evident, with only a single NW tip with a diameter of 800 nm seen in figure 5(e). In contrast, several thick NWs with diameters over 1 μm including one with a diameter of 3.5 μm are visible in figure 5(f). This explains the enhanced PL emission in the case of the defect consisting of very thick NWs-the large volume of material, in combination with a lack of contact between NW tips and ITO, leading to enhanced PL emission due to the strong laser induced forward bias [58]. The origin of the abnormally long and thick NWs is interpreted to be a result of excess Au remaining after the evaporation and liftoff steps used to define the Au particles. The larger volume of the Au droplets formed during pre-growth annealing thus leads to both larger NW diameters and higher growth rates [28,60], resulting in longer NWs.
For both types of defects, the abnormally long NWs are observed to result in a locally enhanced thickness of the BCB planarization layer, presumably due to adhesion forces between the BCB and NWs during spin-coating. This leads to the observed circular defect area within which most NWs are buried below the thicker layer of BCB and thus cannot be contacted. Further defects of both kinds on the entire device can be located and identified using LBIC and PL mapping without the need to search for them in SEM, as demonstrated in figure S7.
The presented method of combined LBIC and PL mapping for the characterization of fully processed NW photovoltaic devices is versatile and can be used to study devices of different sizes as well as different materials. The method is particularly useful for large area devices because it enables an automated measurement of the entire device area to detect local defects.

Summary
In conclusion, we have demonstrated the feasibility of fabricating large-area InP NW array photovoltaic devices. We 2 Note that the area left of the center is somewhat darker simply due to a lower efficiency of the secondary electron detector for the angles corresponding to that area. have processed and characterized several devices with an active area up to 10 × 10 mm 2 on a full 2″ InP wafer. Our results are very promising, in that the photocurrent generated per area by the large devices is on-par with smaller devices. The total output power of our largest 10 × 10 mm 2 sized devices is more than one order of magnitude higher than any previously published III−V NW photovoltaic devices. We have identified the low conductivity of the ITO top contact as an important issue limiting the fill factor FF and consequently the device efficiency for large devices, which will need to be addressed in future work. In particular, further work should aim to understand and improve current conduction in the grid fingers. Furthermore, we have shown the benefits of using combined LBIC and PL mapping experiments for identifying and characterizing defects in NW photovoltaic devices. LBIC and PL mapping will play an important role in future optimization of large-area NW photovoltaic devices.