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The use of III-nitride-based light-emitting diodes (LEDs) is now widespread in applications such as indicator lamps, display panels, backlighting for liquid-crystal display TVs and computer screens, traffic lights, etc. To meet the huge market demand and lower the manufacturing cost, the LED industry is moving fast from 2 inch to 4 inch and recently to 6 inch wafer sizes. Although Al₂O₃ (sapphire) and SiC remain the dominant substrate materials for the epitaxy of nitride LEDs, the use of large Si substrates attracts great interest because Si wafers are readily available in large diameters at low cost. In addition, such wafers are compatible with existing processing lines for 6 inch and larger wafers commonly used in the electronics industry. During the last decade, much exciting progress has been achieved in improving the performance of GaN-on-Si devices. In this contribution, the status and prospects of III-nitride optoelectronics grown on Si substrates are reviewed. The issues involved in the growth of GaN-based LED structures on Si and possible solutions are outlined, together with a brief introduction to some novel in situ and ex situ monitoring/characterization tools, which are especially useful for the growth of GaN-on-Si structures.

The use of III-nitride-based light-emitting diodes (LEDs) is now widespread in applications such as indicator lamps, display panels, backlighting for liquid-crystal display TVs and computer screens, traffic lights, etc. To meet the huge market demand and lower the manufacturing cost, the LED industry is moving fast from 2 inch to 4 inch and recently to 6 inch wafer sizes. Although Al₂O₃ (sapphire) and SiC remain the dominant substrate materials for the epitaxy of nitride LEDs, the use of large Si substrates attracts great interest because Si wafers are readily available in large diameters at low cost. In addition, such wafers are compatible with existing processing lines for 6 inch and larger wafers commonly used in the electronics industry. During the last decade, much exciting progress has been achieved in improving the performance of GaN-on-Si devices. In this contribution, the status and prospects of III-nitride optoelectronics grown on Si substrates are reviewed. The issues involved in the growth of GaN-based LED structures on Si and possible solutions are outlined, together with a brief introduction to some novel in situ and ex situ monitoring/characterization tools, which are especially useful for the growth of GaN-on-Si structures.

The use of III-nitride-based light-emitting diodes (LEDs) is now widespread in applications such as indicator lamps, display panels, backlighting for liquid-crystal display TVs and computer screens, traffic lights, etc. To meet the huge market demand and lower the manufacturing cost, the LED industry is moving fast from 2 inch to 4 inch and recently to 6 inch wafer sizes. Although Al₂O₃ (sapphire) and SiC remain the dominant substrate materials for the epitaxy of nitride LEDs, the use of large Si substrates attracts great interest because Si wafers are readily available in large diameters at low cost. In addition, such wafers are compatible with existing processing lines for 6 inch and larger wafers commonly used in the electronics industry. During the last decade, much exciting progress has been achieved in improving the performance of GaN-on-Si devices. In this contribution, the status and prospects of III-nitride optoelectronics grown on Si substrates are reviewed. The issues involved in the growth of GaN-based LED structures on Si and possible solutions are outlined, together with a brief introduction to some novel in situ and ex situ monitoring/characterization tools, which are especially useful for the growth of GaN-on-Si structures.

In solar cell technology, the current trend is to thin down the active absorber layer. The main advantage of a thinner absorber is primarily the reduced consumption of material and energy during production. For thin film silicon (Si) technology, thinning down the absorber layer is of particular interest since both the device throughput of vacuum deposition systems and the stability of the devices are significantly enhanced. These features lead to lower cost per installed watt peak for solar cells, provided that the (stabilized) efficiency is the same as for thicker devices. However, merely thinning down inevitably leads to a reduced light absorption. Therefore, advanced light trapping schemes are crucial to increase the light path length. The use of elongated nanostructures is a promising method for advanced light trapping. The enhanced optical performance originates from orthogonalization of the light's travel path with respect to the direction of carrier collection due to the radial junction, an improved anti-reflection effect thanks to the three-dimensional geometric configuration and the multiple scattering between individual nanostructures. These advantages potentially allow for high efficiency at a significantly reduced quantity and even at a reduced material quality, of the semiconductor material. In this article, several types of elongated nanostructures with the high potential to improve the device performance are reviewed. First, we briefly introduce the conventional solar cells with emphasis on thin film technology, following the most commonly used fabrication techniques for creating nanostructures with a high aspect ratio. Subsequently, several representative applications of elongated nanostructures, such as Si nanowires in realistic photovoltaic (PV) devices, are reviewed. Finally, the scientific challenges and an outlook for nanostructured PV devices are presented.

In solar cell technology, the current trend is to thin down the active absorber layer. The main advantage of a thinner absorber is primarily the reduced consumption of material and energy during production. For thin film silicon (Si) technology, thinning down the absorber layer is of particular interest since both the device throughput of vacuum deposition systems and the stability of the devices are significantly enhanced. These features lead to lower cost per installed watt peak for solar cells, provided that the (stabilized) efficiency is the same as for thicker devices. However, merely thinning down inevitably leads to a reduced light absorption. Therefore, advanced light trapping schemes are crucial to increase the light path length. The use of elongated nanostructures is a promising method for advanced light trapping. The enhanced optical performance originates from orthogonalization of the light's travel path with respect to the direction of carrier collection due to the radial junction, an improved anti-reflection effect thanks to the three-dimensional geometric configuration and the multiple scattering between individual nanostructures. These advantages potentially allow for high efficiency at a significantly reduced quantity and even at a reduced material quality, of the semiconductor material. In this article, several types of elongated nanostructures with the high potential to improve the device performance are reviewed. First, we briefly introduce the conventional solar cells with emphasis on thin film technology, following the most commonly used fabrication techniques for creating nanostructures with a high aspect ratio. Subsequently, several representative applications of elongated nanostructures, such as Si nanowires in realistic photovoltaic (PV) devices, are reviewed. Finally, the scientific challenges and an outlook for nanostructured PV devices are presented.

In solar cell technology, the current trend is to thin down the active absorber layer. The main advantage of a thinner absorber is primarily the reduced consumption of material and energy during production. For thin film silicon (Si) technology, thinning down the absorber layer is of particular interest since both the device throughput of vacuum deposition systems and the stability of the devices are significantly enhanced. These features lead to lower cost per installed watt peak for solar cells, provided that the (stabilized) efficiency is the same as for thicker devices. However, merely thinning down inevitably leads to a reduced light absorption. Therefore, advanced light trapping schemes are crucial to increase the light path length. The use of elongated nanostructures is a promising method for advanced light trapping. The enhanced optical performance originates from orthogonalization of the light's travel path with respect to the direction of carrier collection due to the radial junction, an improved anti-reflection effect thanks to the three-dimensional geometric configuration and the multiple scattering between individual nanostructures. These advantages potentially allow for high efficiency at a significantly reduced quantity and even at a reduced material quality, of the semiconductor material. In this article, several types of elongated nanostructures with the high potential to improve the device performance are reviewed. First, we briefly introduce the conventional solar cells with emphasis on thin film technology, following the most commonly used fabrication techniques for creating nanostructures with a high aspect ratio. Subsequently, several representative applications of elongated nanostructures, such as Si nanowires in realistic photovoltaic (PV) devices, are reviewed. Finally, the scientific challenges and an outlook for nanostructured PV devices are presented.

The diffusion barrier mechanism of tungsten silicon nitride (WSiN) film formed by ECR plasma nitridation is investigated. For this purpose, we examined film thickness, nitrogen content, surface composition, and local atomic ordering of this WSiN and correlated these characteristics with its barrier capability. It is revealed that WSiN shows good barrier capability when RF bias is applied to the substrate during nitridation even though it is less than 6-nm thick. Applying RF bias increases the nitrogen content in WSiN. Moreover, Si atoms are preferentially sputtered and the local atomic ordering in WSiN is lowered because the effect of ion bombardment is remarkably pronounced. It is supposed that these film characteristics contribute to the suppression of phosphorus diffusion through interstitial sites. As a result, WSiN functions as an excellent barrier layer even though it is extremely thin.

We investigated the effect of reducing stress in low-pressure chemical vapor deposited (LPCVD)-Si₃N₄ films by a low-dose ion implantation of P, Ar and As. The tensile stress of the Si₃N₄ films was eliminated by implanting these ions in the middle of the films in doses as low as 3×10¹³ to 1.2×10¹⁴ cm^-2. After annealing, although the stress of the implanted nitride films recovers partially, its value still does not reach that of the unimplanted films. The influence of implantation on the local oxidation of silicon (LOCOS) profile and the device characteristics is negligible.

Optical readout of GEM based devices by means of high granularity and low noise CMOS sensors allows to obtain very interesting tracking performance. Space resolution of the order of tens of μm were measured on the GEM plane along with an energy resolution of 20%÷30%. The main limitation of CMOS sensors is represented by their poor information about time structure of the event. In this paper, the use of a concurrent light readout by means of a suitable photomultiplier and the acquisition of the electric signal induced on the GEM electrode are exploited to provide the necessary timing informations. The analysis of the PMT waveform allows a 3D reconstruction of each single clusters with a resolution on z of 100 μm. Moreover, from the PMT signals it is possible to obtain a fast reconstruction of the energy released within the detector with a resolution of the order of 25% even in the tens of keV range useful, for example, for triggering purpose.

Two optical data link data transmission Application Specific Integrated Circuits (ASICs), the baseline and its backup, have been designed for the ATLAS Liquid Argon (LAr) Calorimeter Phase-I trigger upgrade. The latency of each ASIC and that of its corresponding receiver implemented in a back-end Field-Programmable Gate Array (FPGA) are critical specifications. In this paper, we present the latency measurements and simulation of two ASICs. The measurement results indicate that both ASICs achieve their design goals and meet the latency specifications. The consistency between the simulation and measurements validates the ASIC latency characterization.