Vertical β-Ga₂O₃ Schottky barrier diodes with trench staircase field plate

It is expected that ultrawide-bandgap (UWBG) semiconductors can offer better power device performance than not only matured Si but also wide bandgap (WBG) semiconductors such as SiC and GaN, mainly due to their superior physical properties based on the large bandgaps. ¹⁾ β-Ga₂O₃ is one of the UWBG semiconductors with a bandgap energy of 4.5 eV and possesses Baliga's figure of merit more than 2000 times larger than that of Si and several times larger than those of SiC and GaN. ²⁾ Additionally, large-area, single-crystal β-Ga₂O₃ wafers can be manufactured from its bulks synthesized by melt growth methods, ^3–6) providing an additional advantage of Ga₂O₃ over the WBG semiconductors.

In recent years, a variety of β-Ga₂O₃ Schottky barrier diodes (SBDs) have been developed, ^7–18) and rapid progress has been made on its technologies. One of the major targets at the current stage of development is the enhancement of an off-state breakdown voltage (V_br) without increasing a specific on-resistance (R_on). Field plates and guard rings are common configurations for edge termination of semiconductor diodes and field-effect transistors to enhance V_br. We have fabricated vertical Ga₂O₃ SBDs with both a field plate and nitrogen (N)-implanted guard ring, which achieved superior device characteristics such as an R_on of 4.7 mΩ cm² and a V_br of 1.43 kV. ¹⁴⁾

In this study, to further increase the V_br, we fabricated β-Ga₂O₃ SBDs with a staircase field plate formed on a deep trench filled with SiO₂. The edge termination structure successfully led to the enhancement of the V_br with keeping a reasonable R_on.

To compare the effects of each edge termination component, three types of β-Ga₂O₃ SBDs were fabricated and characterized in this study: conventional field-plated SBDs (CFP-SBDs), staircase field-plated SBDs (SFP-SBDs), and trench staircase field-plated SBDs (TSFP-SBDs) as schematically illustrated in Figs. 1(a)–1(c), respectively. The device structures were designed by technology computer-aided design (TCAD) simulation using Silvaco ATLAS, which was calibrated for β-Ga₂O₃ by setting key material parameters, namely, the bandgap energy of 4.5 eV, the electron mobility of 150 cm² V⁻¹ s⁻¹, the hole mobility of 1 cm² V⁻¹ s⁻¹, the dielectric constant of 10, and the density of states of 3.72 × 10¹⁸ cm⁻³ in both conduction and valence bands. ¹⁹⁾ Note that the hole mobility and the valence-band density of states were tentatively configured to facilitate smooth simulation, even though these parameters had negligible effects on the simulated unipolar device performance. The thickness and the donor concentration of n-Ga₂O₃ drift layers were set at 8.5 μm and 2 × 10¹⁶ cm⁻³, respectively. The Schottky barrier height of 1.15 eV ²⁰⁾ and the conduction band offset of 3.1 eV ²¹⁾ at the SiO₂/Ga₂O₃ interface were also provided for the simulation.

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Simulated electric field profiles of the CFP-SBD, SFP-SBD, and TSFP-SBD operating at a reverse voltage (V_r) of 2 kV are shown in Figs. 2(a)–2(c), respectively. Peak electric fields in the Ga₂O₃ drift layer and the SiO₂ layer under the field plate of the CFP-SBD were estimated to be 5.5 and 12.9 MV cm⁻¹, respectively [Fig. 2(a)]. The peak value in the SiO₂ layer exceeds its theoretical breakdown electric field of about 10 MV cm⁻¹, ^22,23) that is, the CFP-SBD cannot withstand the V_r of 2 kV. Note that an increase in the thickness of SiO₂ is expected to reduce the electric field in it; however, it also increases the electric field in the Ga₂O₃ region close to the anode edge. The electric field profile of the SFP-SBD shown in Fig. 2(b) provides peak electric fields of 4.6 and 12.8 MV cm⁻¹ in the Ga₂O₃ and SiO₂ layers, respectively. The staircase field plate reduced the peak electric field in the Ga₂O₃ by about 1 MV cm⁻¹, while that in the SiO₂ remained almost the same. The TSFP-SBD had a thick SiO₂ region under the field plate, which filled an etched trench as shown in Fig. 1(c). Peak electric fields in the Ga₂O₃ and SiO₂ layers of the TSFP-SBD were estimated to be 4.5 and 10.0 MV cm⁻¹ at V_r = 2 kV, respectively [Fig. 2(c)]; both satisfy requirements for the 2 kV operation. It can also be expected from the simulation that an increase in SiO₂ thickness leads to decreasing the peak electric field in it, resulting in further enhancement of V_br.

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Based on the simulation results, we fabricated three types of vertical Ga₂O₃ SBDs, which had much the same structures as those for the simulations shown in Figs. 1(a)–1(c). A 13 μm thick Si-doped n-Ga₂O₃ drift layer was grown on an n⁺-Ga₂O₃ (001) substrate by halide vapor phase epitaxy (HVPE). ^24–26) Note that all the SBDs were simultaneously fabricated on the same epitaxial substrate. The net donor concentration (N_d−N_a) of the drift layer was experimentally estimated to be 2 × 10¹⁶ cm⁻³ from capacitance–voltage characteristics. Device fabrication began with the activation of the doped Si donors in the HVPE-grown drift layer by thermal annealing at 1150 °C for 1 hour in N₂ ambient. Then, chemical mechanical polishing (CMP) was performed on both sides of the epitaxial substrate to remove damaged regions formed during the substrate production, the HVPE growth, and the activation annealing process as well as to smooth the epilayer surface. After the CMP, the thickness of the n-Ga₂O₃ drift layer became about 9 μm. Next, 1.5 μm deep trenches were formed on the n-Ga₂O₃ drift layer by inductively coupled plasma reactive ion etching (RIE) using BCl₃. The samples were subsequently annealed in an infrared furnace at 1100 °C for 30 min in N₂ to recover the etching damage. It has been observed that high-temperature annealing causes surface charge depletion of the n-Ga₂O₃ drift layer. ^27–30) To remove the depleted region, we performed 400 nm deep etching of the drift layer by BCl₃ RIE and CMP after the annealing. Details of the removal process were given in our previous report. ¹⁴⁾ Next, 100 nm deep BCl₃ RIE was carried out on the substrate back surface to remove a damaged region generated during the previous device processing, and a cathode ohmic electrode was formed on it by blanket evaporation of Ti(20 nm)/Au(280 nm) metal stack and subsequent annealing at 470 °C. Then, a 5 μm thick SiO₂ was deposited on the front surface by plasma-enhanced chemical vapor deposition (PECVD) using tetraethoxysilane as shown in Fig. 3(a). Planarization process steps are schematically illustrated in Figs. 3(b)–3(d). First, the trench portions were masked with a photoresist (PR), and a 1.5 μm thick SiO₂ was removed by CF₄ RIE [Figs. 3(b) and 3(c)]. After removal of the PR mask, CMP was done for planarizing the SiO₂ surface and thinning it down to a target thickness of 0.8 μm [Fig. 3(d)]. For fabrication of the CFP-SBDs, the SiO₂ was etched using buffered hydrofluoric (BHF) acid solution. The SiO₂ steps of the SFP-SBDs and the TSFP-SBDs were defined by CF₄ RIE and BHF wet etching. Finally, 200 μm diameter anode electrodes consisted of a Pt(15 nm)/Ti(15 nm)/Au(650 nm) metal stack were fabricated by evaporation and lift-off.

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DC forward current density–voltage (J–V) characteristics of typical Ga₂O₃ SBDs are shown in Figs. 4(a) and 4(b) in linear and semilogarithmic scales, respectively. Note that both forward and reverse J were normalized by an area of the anode electrode. The turn-on voltage (V_on) and R_on of the CFP-SBD, SFP-SBD, and TSFP-SBD were 1.9 V and 4.7 mΩ cm², 1.9 V and 7.0 mΩ cm², and 2.1 V and 7.6 mΩ cm², respectively. The ideality factors of the CFP-SBD, SFP-SBD and TSFP-SBD were 1.41, 1.17 and 1.21, respectively. The relatively large V_on and poor ideality factors were attributed to partial removal of the top depletion region formed during the high-temperature annealing; the removal process of the depleted region formed by thermal annealing has to be further improved and/or optimized. Figure 5 shows reverse J–V characteristics of the SBDs. The off-state V_br of the CFP-SBD, SFP-SBD, and TSFP-SBD were 980, 1530, and 1660 V, respectively. The trend of V_br validates the TCAD simulation findings on the electric field distribution during the off-state device operation. Figure 6 shows a comparison of R_on–V_br performance of the TSFP-SBD with those of representative vertical β-Ga₂O₃ SBDs reported so far. ^7–18) It can be considered from the comparison that the TSFP-SBD is as good as state-of-the-art vertical Ga₂O₃ SBDs in regard to the basic device performance. From these characteristics, the TSFP-SBD structure establishes it as a promising architecture for Ga₂O₃ SBDs.

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In this study, we developed a novel edge termination structure of TSFP, which can contribute to a reduction in peak electric field at both edges of an anode electrode and a field plate. The Ga₂O₃ TSFP-SBDs exhibited superior device characteristics typified by R_on = 7.6 mΩ cm² and V_br = 1.66 kV. This work offered significance of the TSFP structure to enhance V_br of vertical Ga₂O₃ SBDs.

Acknowledgments