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Nano-Scale CuO-Based Cbram-Cells Implementation with TiN Liner

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© 2015 ECS - The Electrochemical Society
, , Citation Ki-Hyun Kwon et al 2015 Meet. Abstr. MA2015-01 1383 DOI 10.1149/MA2015-01/21/1383

2151-2043/MA2015-01/21/1383

Abstract

Resistive random access memories (ReRAMs) have been researched to replace NAND flash memory due to non-volatile memory characteristics, minimum 4F2 memory cell size, low power consumption and high operation speed [1]. However, when the memory cell size decreased to nano-scale size, ReRAM's memory characteristics rapidly degrade. While, it was reported that memory characteristics of conductive bridge random access memory (CBRAM) can be kept in spite of decreasing a cell size [2]. In our experiment, we fabricated the CBRAM with a structure of TiN/CuO/TiN/Ag and pattern size of ranging 34 to 1,921 nm. The CuO layer was deposited by RF magnetron sputtering on TiN bottom electrode patterned by photo lithography process. Then, a TiN liner was deposited by RF magnetron sputtering. The Ag electrode was deposited by a thermal evaporation. Finally, TiN was deposited as a capping layer and then, the device was annealed at 500 oC in N2 atmosphere. The final device structure is shown in Fig.  1. The thickness of TiN liner was varied from 0.1 to 1.0 nm for investigating the device performance such as switching uniformity and endurance. A TiN liner plays a role as a barrier of Ag diffusion. So, a TiN liner controls conductive-bridges in CBRAM-cells. For the CBRAM-cell without TiN liner, it demonstrated the set voltage of 0.8 V, the reset voltage of -1.2 V, HRS current of 1.03 x 10-6 A, low resistance state (LRS) current of 1.62 x 10-4 A, retention of 105 sec with a margin of 3.63 x 102 and AC endurance of 1.0 x 105 cycles with a margin of 1.27 x 102, as shown in Fig.2 (a). In addition, for the CBRAM cell with TiN liner of 0.1 nm, it demonstrated the set voltage of 0.72 V, the reset voltage of -1.2 V, HRS current of 3.21 x 10-6 A, low resistance state (LRS) current of 2.11 x 10-4 A, retention of 105 sec with a margin of 8.09 x 101 and AC endurance of 3.0 x 106 cycles with a margin of 1.34 x 102, as shown in Fig.2 (b). Furthermore, for the CBRAM-cell with TiN liner of 0.3 nm, it demonstrated the set voltage of 0.74 V, the reset voltage of -1.2 V, HRS current of 1.91 x 10-6 A, low resistance state (LRS) current of 1.72 x 10-4 A, retention of 105 sec with a margin of 1.03 x 102 and AC endurance of 1.0 x 106 cycles with a margin of 1.35 x 102, as shown in Fig.2 (c). Moreover, for the CBRAM cell with TiN liner of 0.5 nm, it demonstrated the set voltage of 0.72 V, the reset voltage of -1.2 V, HRS current of 1.60 x 10-6 A, low resistance state (LRS) current of 1.47 x 10-4 A, retention of 105 sec with a margin of 3.34 x 102 and AC endurance of 3.5 x 105 cycles with a margin of 7.51 x 102, as shown in Fig.2 (d). Regardless of thickness of TiN liner, I-V characteristics of CBRAM-cells with a TiN liner were almost same, as shown in Fig 3 (a). However, it was obtained that CBRAM device with liner of 0.3 nm was the lowest variation of set voltage and HRS current, as shown in Fig 3 (b) and (c). In particular, it was observed that the AC endurance was enhanced by inserting a TiN liner of 0.1 and 0.3 nm in CBRAM-cells. The AC endurance of the proposed CBRAM device was enhanced from 1.0 x 105 to 1.0 x 106or more cycles. To understand the effect of TiN liner in CBRAM-cells, we analyzed the diffusion-depth profile of TiN by using the auger electron spectroscopy. It was confirmed that when CBRAM-cells were annealed, Ti and N were diffused in the solid electrolyte. It is expected that a TiN liner prevents the diffusion of Ag and limits the number of conductive-bridges in the solid electrolyte. Therefore, the thickness of TiN liner should be optimized to obtain good non-volatile memory characteristics. We present the effect of TiN liner on CBRAM characteristics, which works as a controller of conductive-bridges.

 *This work was financially supported by the Industrial Strategic Technology Development Program(10039191, The Next Generation MLC PRAM, 3D ReRAM, Device, Materials and Micro Fabrication Technology Development) funded by the Ministry of Trade, Industry and Energy (MOTIE) and the Brain Korea 21 Plus, Republic of Korea.

Figure 1

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10.1149/MA2015-01/21/1383