Influence of Various Conducting and Inorganic Dielectric Drift Barriers on the Charge Decay in Parylene-C Electret Layers

This paper reports on an attempt to improve the charge carrier life time in electret layers made of Parylene-C by implementing a patterned drift barrier close to the surface. Using various, differently structured metals and inorganic materials as a drift barrier, the initial surface potential directly after charging was increased by about 11.5% compared to electret layers made of pure Parylene-C. Furthermore, a higher charging efficiency was achieved. The charge carrier distribution has a higher homogeneity and the usually observed surface potential reduction at the rim of the electret layer was less pronounced. Against expectations, the long-term stability did not improve among the chosen materials and patterns. Regarding side effects observed with unstructured drift barriers, the electret layers with a structured drift barrier do not suffer from the horizontal discharging.


Introduction
Recently the development of micro energy harvesting devices transducing ambient energy into the electrical domain has received much attention [1][2][3][4][5]. These devices need no costly maintenance and thus are suitable for deployment in wireless sensor nodes and in medical implants such as cardiac pacemakers. They can contribute to extending battery lifetime and in some applications may even completely replace batteries. Vibrational energy can be harvested by electrostatic transduction relying on charged electret materials [6]. An electret material is able to store charge carriers quasi-permanently [7]. The stability of implanted ionic charge carriers is mandatory to guarantee the long-term functionality of such a device. Among other polymers like Cytop and Teflon, Parylene-C has been considered as a promising electret material [8][9][10]. Previously the charge decay in simple Parylene-C layers with thicknesses up to 23 µm has been investigated [11]. The highest charge carrier stability was achieved using 11-µm-thick samples charged at 100 • C, which showed a decay of 20% after 140 days. An attempt to reduce the charge decay using a SiN drift barrier close to the electret surface revealed the effect of an additional discharging path along the electret-barrier interface [12]. In this work, an improved design using a variety of conducting and inorganic barrier materials to eliminate this effect and increase the long-term stability is presented.

Charging of Electrets
Among different charging techniques the corona discharge method was chosen [7]. Such a setup comprises three electrodes as shown in Fig. 1. First, the ground potential is connected to the base electrode under the electret layer. Second, a potential U Needle of several kV is connected to a needle-shaped electrode. The local electrical field near the tip is sufficiently high to ionize the surrounding medium. At negative potentials, anions are accelerated towards the ground potential and thus implanted into the electret layer. To control the resulting surface potential U S a third, mesh-shaped grid electrode set to the potential U Grid is placed between the needle tip and the electret. Since U S increases while the charging proceeds, the potential difference between grid and electret tends asymptotically to zero so that U S is limited by U Grid . In practice, U S is found to reach about 70% of U Grid .

Discharging
In polymer-based electret materials, discharging mechanisms such as resistive loss, ion diffusion, compensation by charges from the environment and ionic drift are present. The latter has been identified to be the predominant discharging effect in Parylene-C over longer times [7]. The implanted charge carriers drift through the electret layer with the drift velocity v D = µ I E(x, t) proportional to the self-induced electrical field E(x, t) depending on the momentary charge carrier distribution ρ I (x, t). Here, µ I , x and t denote the charge mobility, the coordinate perpendicular to the electret surface and time, respectively. Thus, implementing a drift barrier layer close to the surface is conjectured to impede the charge carrier movement through the layer. Materials with low ionic mobilities and a high dielectric constant are promising candidates.

Test Chip Fabrication
The geometry of test chips is schematically shown in Fig. 2. The test chips are based on Pyrex substrates with a Cr/Au/Cr layer sandwich serving as the base electrode. A 7.5-µm-thick Parylene-C layer is deposited using the Labcoter 2 from SCS Coatings at a pressure of 22 mTorr. Using an image reversal resist, the 200-nm-thick drift barrier layer made of materials such as Ti, Au, Al, Pd, Pt, Cr, SiC, SiN and SiO x is deposited onto the Parylene-C layer by plasma enhanced chemical vapor deposition (PECVD) or evaporation. This barrier layer is structured into a continuous layer with dimensions of 7 × 7 mm 2 or as an array of smaller squares with   a side length d and gap g of 100 or 200 µm. A second, 0.5-µm-thick, Parylene-C layer is then deposited to bury the drift barrier. Finally, the entire layer stack is structured by reactive ion etching into 8 × 8 mm 2 squares and the wafer is diced into chips. One fabricated test chip is shown in Fig. 3. Each fabricated wafer uses only one of the listed drift barrier materials and comprises test chips without drift barrier. The previous design is shown in Fig. 2. In this design, the drift barrier reached the rim of the layer stack. That design suffered from charge carrier drift along the interface between the drift barrier and Parylene-C [12]. Besides the structured drift barrier layer, the main difference to the previous samples is the fully encapsulated drift barrier which is hypothesized to suppress this horizontal loss channel.

Charging of the Test Chips
To charge the electret layers, the custom-made corona discharge setup shown in Fig. 1 is used. The high-voltage sources LNC-10000 neg and LNC-1200 neg from Heinzinger, Germany, supply the potentials for the needle tip and the mesh electrode. For the experiments, the potentials U Needle = −8 kV and U Grid = −1 kV are applied to the needle tip and grid electrodes, respectively. Charging is performed at room temperature for a duration of 3 min using air as the charging medium.

Surface Potential Measurement
The surface potential U S,initial was measured immediately after charging. For this purpose the electrostatic voltmeter Isoprobe 279 from Monroe Electronics, USA was used to measure surface potentials of −3 kV< U S < 3 kV with an accuracy of 0.1% of the full scale. As shown in Fig. 4 the voltmeter probe is mounted above the chuck with the test chips. The xyθ-stage enables the system to measure the surface potential at all positions in the plane of the charged electret.

Initial Surface Potential
The initial maximum surface potential U S,initial and the mean value over the width of the electret with a continuous barrier were measured and are compared among the investigated materials in Fig. 5. The U S,initial values for samples with incorporated Al, SiN and SiO x barriers are lower than those of samples with a pure Parylene-C layer. Other materials show an increase of up to 11.5% with respect to pure Parylene-C samples in the maximum and mean U S,initial . Furthermore, drift barriers made of metal materials are superior to the investigated dielectric materials. Moreover, we investigated the initial U S profiles line scans with 200 µm step size, as shown in Fig. 6. The red dashed line indicates the ideally measurable profile shape assuming a sharp transition from zero potential beside the electret to a fixed, constant potential on the electret. The slope in the transition area is due to the 500-µm-wide measurement spot of the voltmeter probe. Using SiN and SiO x as a drift barrier, the measured profile shape is approximately congruent with the pure Parylene-C layer. Except for Al, all other materials result in a profile shape closer to the ideal case. Due to the electrical conductivity the continuous metal layers assume a homogeneous potential. Thus, the potential difference between the electret surface and the grid electrode is equal for all locations which significantly improves the charging process. Increased U S,initial values were not observed using the patterned drift barrier designs. Due to the Parylene-C isolation between the individual square elements of the structured drift barriers, the individual squares of the arrays do not necessarily assume the same potential.
In comparison to the results using the previous design, undesired discharging effects introduced by the drift barrier are suppressed by the new design. This is illustrated in Fig. 7. After a time span of 15 days the profile has flatten as expected. In comparison to unstructured   and unencapsulated SiN drift barriers, the profile width did not decrease which indicates the elimination of the discharging at the edge of the electret-barrier interface.

Decay of the surface potential
To further investigate the charge stability, the surface potentials were monitored over a time span of 100 days. In case of metals such as Au, Cr, Pd, Ti and Pt, no significant difference between the sample without drift barrier and the various designs was observed. After 100 days the relative decay is in the range of 40% to 50%. Considering the absolute U S values, the initial potential difference between the different patterns vanishes after a time span of about 10 days. Different observations were made for the other investigated materials. In agreement to the lower U S,initial value of the sample with an Al barrier, the long term stability was inferior compared to other materials, as well. This sample lost its charge carriers rapidly within minutes. Furthermore, samples using SiC, SiN and SiO x deposited by PECVD resulted in a highly accelerated charge decay rate, which is also true for samples where the barrier layer was again removed completely from the Parylene-C layer. Apparently, the PECVD process alters the polymeric structure of the previously deposited Parylene-C layer and makes it less able to store charge carriers.

Conclusion
Parylene-C based electret layers including a structured drift barrier out of various metals or inorganic materials have been fabricated and successfully charged. Metal barriers increased the efficiency of the charging process. Higher initial surface potentials and a higher charge carrier homogeneity were achieved. Patterned drift barriers with 100 and 200 µm width and spacing resulted in no improvement compared to pure Parylene-C layers. Furthermore, test chips with a continuous drift barrier showed no horizontal discharging in contrast with the previous design with unencapsulated barrier layers. However, the investigated drift barriers were not able to improve the long term stability of ionic charge carriers in Parylene-C.