Cryocooler operation of SNIS Josephson arrays for AC Voltage standards

Avoiding liquid helium is now a worldwide issue, thus cryocooler operation is becoming mandatory for a wider use of superconductive electronics. Josephson voltage standards hold a peculiar position among superconducting devices, as they are in use in high precision voltage metrology since decades. Higher temperature operation would reduce the refrigerator size and complexity, however, arrays of Josephson junctions made with high temperature superconductors for voltage standard applications are not to date available. The SNIS (Superconductor-Normal metal-Insulator-Superconductor) junction technology developed at INRIM, based on low temperature superconductors, but capable of operation well above liquid helium temperature, is interesting for application to a compact cryocooled standard, allowing to set a compromise between device and refrigerator requirements. In this work, the behavior of SNIS devices cooled with a closed-cycle refrigerator has been investigated, both in DC and under RF irradiation. Issues related to thermal design of the apparatus to solve specific problems not faced with liquid coolants, like reduced cooling power and minimization of thermal gradients for uniform operation of the chip are discussed in detail.


Introduction
Cryogen-free operation of superconducting devices is becoming more and more crucial to widespread the applications of superconductivity and is indeed a necessity in some cases, e.g. operation in remote locations. Considering the recent shortages, avoiding liquid helium has now become a worldwide issue, fundamental for the success of superconductive electronics [1]. Josephson voltage standards hold a peculiar position among superconducting devices, as they are used for high precision voltage metrology since the early years after the discovery of the physical phenomenon. Today, they still represent one of the most complex, yet successful, instances of a superconducting device. Cryocooler operation bears a special interest for Josephson standards, owing to the potentially tremendous impact of a new generation of digital voltmeters providing quantum accuracy through a Josephson standard operating into an integrated refrigerator. Due to the reduction in size and costs of coolers, the perspective of a quantum measurement provided by a commercial-grade instrument might be foreseeable in the future. Unfortunately, nowadays cryocoolers suitable for low temperature superconductors operation are still expensive, weighty and far from any possible integration inside an instrument case. Higher temperature operation is needed to dramatically reduce the refrigerator size and complexity [2]. At present, however, arrays of Josephson junctions made with high temperature superconductors for voltage standard applications are not yet available. 1 To whom any correspondence should be addressed.

Cooling apparatus design
Reliable cryocooler operation necessitates a very specific thermal design to cope with problems not faced with liquid coolants, like minimization of thermal gradients to allow uniform operation of the chip. Moreover, the refrigerator has a reduced cooling power, thus the microwave guide to transmit the RF signal to the chip must be carefully designed in order to limit the heat load on the low temperature stage, while maintaining an effective the signal transmission. Our system is based on a GM refrigerator with 1 W cooling power on the cold finger at 4.2 K and a minimum temperature achievable lower than 3 K, without thermal load. An additional aluminum disk was tightly connected at the top of the upwards-directed cold finger. A germanium thermometer fastened inside the disk along with a heater wire wound around it allow to monitor and control the temperature of the cooling surface. A first attempt to use a copper disk was unsuccessful because of the very long time needed to reach the operating temperature, that can be explained by a high heat capacity. The thermal contact between the disk and the cold finger was significantly improved by the insertion of an indium sheet at the interface. Eventually, the whole process to cool samples from laboratory temperature down to 4 K requires typically less than 3 hours. The chip under test is fastened with a cryogenic glue to the copper sheet of a printed circuit board (PCB) with pads for soldering the cryocooler wires, and then bonded. Brass screws provide the thermal link between the cold finger and PCT copper sheet that holds the device. The PCB copper layer is also used as thermal conductive support for a thermometer monitoring the chip temperature. The operating temperature can be monitored and controlled with commercial instrumentation both with the disk and the chip support sensors. In voltage standard applications, arrays of Josephson junctions are irradiated with high frequency (about 70 GHz) microwaves to generate steps with quantized voltages. To study the step properties of cryocooled Josephson devices a microwave guide was used for the transmission of the RF signal to the chip. Despite the good cooling power available, the thermal link to the outer environment introduced by a standard copper/brass waveguide would compromise the refrigerating effectiveness. A specifically designed stainless steel guide was adopted, with a significant reduction of the heat transmission to the cold area. Gold plating allowed to reduce the dramatic signal attenuation due to the low electrical conductivity of stainless steel (20 dB/m for the untreated surface). Furthermore, a beneficial side-effect of the low power dissipation along the guide is to eliminate the added thermal load inside the cryocooler due to Joule heating. Several aspects have to be considered to minimize the heat transmission while keeping the electrical signal attenuation as low as possible. Owing to the many orders of magnitude higher thermal conductivity at cryogenic temperature of gold with respect to stainless steel, plating thermal conduction is non negligible within the overall balance, despite its extremely small cross-sectional area. We found a satisfactory compromise can be reached by plating only the inner guide surface, the outer being not relevant to signal transmission, and keeping gold thickness below 1μm. The total attenuation obtained is below 7 dB. The semiconductor thermometer placed close to the chip to for precisely monitoring its operating temperature was used to study the guide loading and careful optimization of the thermal anchoring. The minimum temperature attainable was observed to be strongly dependent on anchor placement and effectiveness, together with a proper thermal insulation of guide sections, with variations in the Kelvin range. At present, the devices under test can be cooled with the guide in place down to temperatures near 3 K.

SNIS junctions for cryocooler operation
Nb/Al-AlOx/Nb SNIS junctions achieve some specific properties concerning the damping of the IV characteristic and the values of the critical current density and characteristic voltage through a trimming of some fabrication parameters [3,4,5].
A specific feature of SNIS is the temperature stability of its electrical parameters, measured as the temperature derivative of Ic (Vc) vs. T [6,7]. It is in fact possible to minimize this derivative as function of a parameter γeff= γS/N dAl/ξAl where γS/N=RNb/Al/ρAl * ξ Al with RNb/Al the product of the interface resistance and its area, and * ξ Al = ξAl(Tc,Al/Tc,Nb) 1/2 [8].
In particular the devices measured in this experiment were series arrays for programmable voltage standard fabricated in cooperation with the Physikalisch Technische Bundesanstalt (PTB) [3] and we measured segments from 1 to 1024 junctions, to evaluate the effect of the RF and DC dissipated power by increasing the junction numbers. The SNIS junctions tested at different temperatures from 3.5 to 6 K, had critical current density ranging from 5 to 20 kA/cm 2 and Vc from 250 to 500 µV. These parameters were obtained using a thickness of aluminum from 80 to 100 nm, while Nb electrodes were 200 nm. Correspondingly the parameter γeff varied between 10 and 20 . From figure 2, we see that this corresponds to a temperature derivative of Ic normalized to Ic(0) from 0.5, optimal condition T/Tc> 0.7 K for γeff=20, which however becomes about 1.15 at 4.2 K and 1.5 at 3.5 K. On the other hand, an almost constant value of 1 of the derivative for γeff=10, in the experimental temperature range is possible. First experiments have been carried on with both single junction and array devices, checking for the effect of DC current and microwave bias. The experimentally estimated dissipated power ranged between fraction of mW (single junction, step n=1, up to 12 mW, 1024 junctions step n=2. Quantized steps were observed in segments with a low number of junctions up to temperatures well above 4.2 K (Fig. 3), but were not attainable for the higher voltage sections, with many series- connected junctions. At present we explain this behavior as a combined consequence of a localized temperature raise, due to an insufficient heat exchange between the chip and the cold finger, along with a limited strenght of electromagnetic shielding, as shown by the flux-trapping observed more and more frequently with the number of junctions in the section.

Conclusions
Preliminary experiments of series arrays in a cryocooler set-up have been carried out, searching for optimal operating conditions. Further experiments are needed for increasing operation to a high number of series connected junctions. This requires from one hand to use devices which show a minimal temperature dependence of the electrical parameters, and on the other hand an improved measurement environment, with a good thermal exchange between the junctions and the cold finger.