Type-II InP/GaAsSb double-heterojunction bipolar transistors with f_MAX > 700 GHz

InP/GaAsSb double-heterojunction bipolar transistors (DHBTs) were developed as an alternative to InP/GaInAs DHBTs for applications in high-speed electronic systems.¹⁾ The staggered band alignment at InP/GaAsSb heterojunctions enables the use of a simplified device structure with a pure InP collector layer, providing good thermal conductivity and high breakdown voltages.^2–4) GaAsSb-based DHBTs have demonstrated f_T × BV_CEO products as high as 2.5 THz·V,²⁾ as well as f_T and f_MAX in excess of 600 GHz.^2,4) InP/GaAsSb DHBTs are thus promising candidates for next-generation sub-millimeter-wave integrated circuits. Further improvement of the maximum oscillation frequency requires a reduction in the base-collector junction capacitance and/or base resistance. We have decreased the base contact resistivity by in-situ Ar sputtering immediately prior to the base contact deposition. Devices with an emitter area of 0.3 × 4.4 µm² simultaneously show the maximum oscillation frequency f_MAX = 715 GHz and the current gain cutoff frequency f_T = 429 GHz. To date, this is the highest reported f_MAX achieved with InP/GaAsSb DHBTs.

The DHBT epitaxial layer structure was grown by metal organic chemical vapor deposition (MOCVD) on 2 in. semi-insulating InP substrates. The subcollector consists of a 300-nm-thick InP:S buffer layer doped at 2.2 × 10¹⁹ cm⁻³, a 20-nm-thick Ga_0.40In_0.60As:Si etch stop layer doped at 3.0 × 10¹⁹ cm⁻³, and a 50-nm-thick InP:S pedestal layer doped at 2.2 × 10¹⁹ cm⁻³. The purpose of the InP pedestal is to reduce the extrinsic collector capacitance by increasing the mesa height.⁵⁾ The 125-nm-thick InP:S collector is nominally doped at 1.3 × 10¹⁷ cm⁻³. The 20-nm-thick GaAs_xSb_1−x base is compositionally graded from x = 0.41 on the collector side to x = 0.59 on the emitter side.⁶⁾ The average base doping density is 8.4 × 10¹⁹ cm⁻³, resulting in R_sh = 1077 Ω/□.

The composite InP/GaInP emitter is doped at a level of 2.5 × 10¹⁶ cm⁻³, and consists of a 15-nm-thick Ga_yIn_1−yP:Si layer and a 5-nm-thick InP:Si layer.^7–9) The first 5 nm of the ternary alloy has y = 0.22, which is followed by a grading to y = 0 over 10 nm. The composite emitter is followed by a 130-nm-thick InP:Si emitter layer doped at 1.5 × 10¹⁹ cm⁻³. The 35-nm-thick emitter contact layer is doped at 3.8 × 10¹⁹ cm⁻³ and consists of 20 nm of Ga_0.47In_0.53As, followed by 10 nm of Ga_0.47In_0.53As graded to Ga_0.25In_0.75As, and 5 nm of Ga_0.25In_0.75As. Transmission line measurements indicate emitter and collector contact resistivities of 2.0 and 1.3 Ω µm², respectively.

The transistors were fabricated by a standard triple mesa process with 0.4-µm-wide emitter and base electrodes defined by electron beam lithography.¹⁰⁾ The emitter mesa was formed by a combination of inductively coupled plasma (ICP) and wet etching, resulting in an emitter-base junction area of 0.3 × 4.4 µm². The emitter and base electrodes consist of electron-beam-evaporated Ti/Pt/Au and Pd/Ni/Pt/Au metal stacks, respectively. The GaAsSb base surface was in situ sputtered with Ar ions prior to the deposition of the base metal stack. The Ar sputtering removes about 10 nm of the GaAsSb layer (including the natural oxide) in the base contact area, thereby improving the contact interface quality.^11–13) TLM measurements show an improved base contact resistivity with increasing sputtering time, as shown in Fig. 1. For sufficiently long sputtering times, the contact resistivity reaches 10⁻⁹ Ω·cm², which is a clear improvement over the standard process. Because the emitter contact acts as a mask for the Ar sputtering, the gap region between the base contact and the emitter mesa is not etched, as illustrated in Fig. 2(a). The emitter sidewall and the base surface were passivated using plasma-enhanced chemical-vapor-deposited silicon nitride. A low-temperature Teflon-based etch-back process was utilized for planarization prior to the deposition of the probe pad metal.¹⁰⁾ Figure 2(b) shows an SEM image of the focused ion beam cross section of a finalized DHBT. The Teflon film rapidly degrades under electron and ion beam irradiation and is therefore only partially visible and indicated by the arrow in Fig. 2(a).

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Figure 3 shows the Gummel characteristics of a device with a 0.3 × 4.4 µm² emitter area. The base and collector current ideality factors are n_B = 1.53 and n_C = 1.04, respectively. The peak common-emitter current gain is β = 11 with V_BC = 0 V. The common-emitter current–voltage characteristics are shown in the inset of Fig. 3. The common-emitter breakdown voltage BV_CEO is more than 5 V at the collector current density J_C = 1 kA/cm².

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RF performance was characterized from 0.2 to 40.2 GHz using an HP8510C vector network analyzer calibrated with the line-reflect-reflect-match technique using off-wafer standards. The probe pad parasitics were de-embedded in accordance with the method presented by Koolen et al.¹⁴⁾ using on-wafer open/short test structures with the same layout as the device pads. Figure 4 shows the short-circuit current gain |h₂₁|² and Mason's unilateral power gain U for the device shown in Fig. 4 biased at V_CE = 1.6 V and I_C = 10.5 mA. The dependences of f_T and f_MAX on the collector current for V_CE = 1.2 and 1.6 V are also shown in the inset of Fig. 4. Determination of the cutoff frequencies by single-pole transfer function fits over the full measurement range results in f_T = 442 GHz and f_MAX = 701 GHz. A higher V_CE of 1.6 V yields f_T = 429 GHz and f_MAX = 715 GHz. The small-signal equivalent circuit model extracted from forward-active mode and open-collector S-parameter measurements is shown in Fig. 5 (top) for V_CE = 1.6 V and I_C = 10.5 mA.¹⁵⁾ The simulated small-signal equivalent circuit S-parameters agree well with the measured values, as shown in Fig. 5 (bottom).

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For a given current gain cutoff frequency f_T, the maximum oscillation frequency f_MAX is determined by the base-collector capacitance and base resistance¹⁶⁾ as follows:

$$\begin{align} f_{\text{MAX(U)}} &= \sqrt{\frac{f_{\text{T}}}{8\pi (C_{\text{BC}}R_{\text{B}})_{\text{eff}}}} \ ,\\ (C_{\text{BC}}R_{\text{B}})_{\text{eff}} &= (C_{\text{BC,in}}(R_{\text{B,in}} + R_{\text{B,ex}}) + C_{\text{BC,ex}}R_{\text{B,ex}}). \end{align} \tag{ 1 }$$

The present record f_MAX > 700 GHz was achieved by decreasing the base contact resistivity. Compared with our standard process, we observe a reduction in the (C_BCR_B)_eff time constant by a factor of two. Assuming that all other components remain unchanged, we calculate a fourfold reduction in the base contact resistance owing to the Ar sputtering, which is in general agreement with the TLM results shown in Fig. 1. The present devices show a ∼100 GHz higher f_MAX than those previously reported with the same epitaxial layer structure.⁴⁾

In conclusion, we have demonstrated the first InP/GaAsSb DHBTs with an f_MAX exceeding 700 GHz. Devices with a 0.3 × 4.4 µm² emitter area have a DC gain β = 11 and a high breakdown voltage BV_CEO > 5 V.

Acknowledgments