FPGA-based readout for double-sided silicon strip detectors

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Published 4 January 2011 Published under licence by IOP Publishing Ltd
, , Citation M Becker et al 2011 JINST 6 C01008 DOI 10.1088/1748-0221/6/01/C01008

1748-0221/6/01/C01008

Abstract

This work presents an FPGA-based readout system for double-sided silicon strip sensors based on the APV25 front-end chip. The system consists of an ADC-card and a digital readout board containing an FPGA. Data extraction algorithms implemented in the FPGA allow baseline and pedestal correction, hit detection and event-building. These algorithms represent an efficient data reduction tool and provide high readout rates. Details of the system, the algorithms applied and performance will be discussed featuring data collected in various tests experiments.

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10.1088/1748-0221/6/01/C01008