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The 4th International Conference on Circuits, Systems and Devices (ICCSD 2020) which will be taken place in Nanjing, China on October 23-25, 2020, and will be held virtually due to the precaution to minimizing the ÑOVID-19 risk. The safety and well-being of all conference participants is our first priority, while we strive to offer many scholars and researchers this long-awaited conference to conduct academic exchanges with their peers.

The COVID-19 virus has made our life very difficult, but we want to note that there are no barriers to science, as we continue to do our research works via modern technical means. The ICCSD 2020 has selected Zoom as the virtual platform. Each presenter will give a 15-minute talk and have a short discussion afterward. Before the conference, all of the authors will prepare and submit a video as a backup in case of unexpected technical problems.

The submitted papers were reviewed by leading scientists in the areas of Circuits, Systems and Devices, and evaluated in accordance with their originality, innovation, technical merit and applicability. This year, the ICCSD 2020 program consists of many high-quality articles coming from several different countries around the world.

We are grateful to the authors and the participants, as they are the key components for making possible this excellent forum to exchange research results and ideas. We also would like to express our sincere gratitude to our colleagues who have kindly volunteered in the paper review process. Special thanks go to the conference organizers and session chairs for their devotions in developing a strong technical program and enjoyable virtual experiences. It is our hope that the proceedings of ICCSD 2020 will result in increased collaboration among researchers in the fields and will help facilitating fruitful cross-disciplinary ideas.

As always, we look forward to your continuing support of this and future ICCSD. Finally, we wish all of you good health and every success!

Dr. Xiaoqing Wen, Professor, Kyushu Institute of Technology, Japan

Dr. Juin J. Liou, Chair Professor and Director, Shenzhen University, China

General Chairs of ICCSD 2020

Conference Chairs

Xiaoqing Wen, Kyushu Institute of Technology, Japan, IEEE Fellow

Juin J. Liou, Shenzhen University, China, IEEE Fellow

Steering Chair

Shiwei Feng, Beijing University of Technology, China

Program Chairs

Letian Huang, University of Electronic Science and Technology of China, Chin

Li Wenyuan, Southeast University, China

Meng Zhang, Southeast University, China

Technical Committee

Abdel-Aziz Farrag, Dalhousie University, Canada

Affaq Qamar, Abasyn University Peshawar, Pakistan

Bo Jiang, Omni Vision Technologies, USA

Bor-Jiunn Wen, National Taiwan Ocean University Keelung City, Taiwan

Chung-An Shen, Taiwan University of Science and Technology, Taiwan

Guoping Guo, University of Science and Technology of China, China

Haifeng Liang, North China Electric Power University, China

Jens Kohler, University of Applied Sciences, Germany

Jinghong Chen, University of Houston, USA

Kei Eguchi, Fukuoka Institute of Technology, Japan

Miyama Masayuki, Kanazawa University, Japan

Mohd Faiz Bin Mohd Salleh, University of Malaya, Malaysia

Mohd Faizul Mohd Sabri, University of Malaya, Malaysia

Muhammad Akmal Chaudhary, Ajman University, United Arab Emirates

Orla Nic Suibhne, University College Dublin, Ireland

Shaojun Xie, Nanjing University of Aeronautics & Astronautics, China

Sharifah Fatmadiana, University of Malaya, Malaysia

Sheila Abaya, University of East-Caloocan, Philippines

Thi Hong Tran, Nara Institute of Science and Technology, Japan

Yu Zhuang, Texas Tech University, USA

Zhang Weifeng, Shenzhen Institute of Information Technology, China

All papers published in this volume of Journal of Physics: Conference Series have been peer reviewed through processes administered by the Editors. Reviews were conducted by expert referees to the professional and scientific standards expected of a proceedings journal published by IOP Publishing.

● Type of peer review: Double-blind

Conference submission management system: iConf Conference System

● Number of submissions received: 36

● Number of submissions sent for review: 36

● Number of submissions accepted: 11

● Acceptance Rate (Number of Submissions Accepted / Number of Submissions Received X 100): 58.33%

● Average number of reviews per paper: 2

● Total number of reviewers involved: 21

Any additional info on review process: Accepted papers should follow:

The work presented in the paper is valid and reliable. Topic of the paper is important and related to this conference.

The problem statement is well defined and justified in the literature.

The paper is well written and flowed logically.

The results are well supported by the included figures and charts.

The resulting data are well defined and presented.

All the conclusions are clear and inline to the aim of the study

The references are modern.

Contact person for queries: Jennifer Y. Luo, Email: iccsd@academic.net

As wearable devices with low input voltages have drawn much attention from academic and industrial fields, the use of switched capacitor converters (SCC) also increases. This is because the wearable devices are required to utilize small size power converters and SCCs have no bulky circuit components such as magnetic components. Many kinds of SCCs have been suggested but they are based on three fundamental SCC topologies that are Dickson, series-parallel and Fibonacci topologies. In this study, three topologies are theoretically analyzed and simulated. With the results from them, a comparison is conducted to provide future circuit designers with a standard to choose a proper SCC topology for wearable devices.

Optimization of analog circuits relies on engineers' experience and intuition to find suitable parameters to satisfy circuit specifications. This job is highly labor-intensive, highly repetitive, and time-consuming, but the optimized circuit is sub-optimal. In this paper, the evolutionary strategy is proposed to optimize analog circuit design strategy. The filter designed by engineers and operational amplifier with random generated instances' parameters are included, and the S parameters of the filter and the gain and dynamic power consumption of the operational amplifier are optimized respectively. The simulation results show that the filter and operational amplifier can be further optimized by using the evolutionary strategy. This method can greatly reduce the workload of analog circuit designers, improve the performance of analog circuits and shorten the design cycle.

In this paper we examine the possibilities of measuring electrical resistance with an uncalibrated voltmeter. A digital voltmeter typically has high resolution and linearity regardless of how well calibrated it is. Based on this observation, we propose a two-step measurement method for performing resistance measurements by using a digital voltmeter. We show that the precision of the measurement so performed does not depend on the calibratedness of the used digital instrument. For the proposed scheme, we also provide guidelines on minimizing the measurement error while taking into account the some of the well-known properties of digital voltmeters.

Semantic segmentation is a task of inputting an image and performing category classification for each pixel. Semantic segmentation by CNN has high accuracy but its calculation using floating-point numbers consumes a large amount of power. We adopted UNET as the semantic segmentation CNN and improved it for FPGA implementation. We quantized both weights and activations of the network up to 3-bit. Then, we devised a dedicated hardware architecture for the quantized CNN and implemented it on an FPGA. This circuit uses only internal memory to perform forward propagation calculations, that eliminates high-power external memory accesses. This circuit is a stall-free pixel-by-pixel pipeline, and performs 8 rows, 16 input channels, 16 output channels, 3 by 3 pixels convolution calculations in parallel. The convolution calculation performance at an operating frequency of 300 MHz is 11 TOPs/s.

In this paper, the effect of temperature change on the static and dynamic characteristics of power semiconductor devices is simulated by ISE-TCAD software with 4.5 kV power semiconductor device wavy base regions RC-GCT. the results show that the forward voltage drop UF of the device increases with the increase of temperature at high current density, the forward opening and turning off time of the device becomes longer, and the trailing current increases. The results of this study have certain reference value for the design and development of IGCT for new power semiconductor devices.

Physical unclonable functions (PUFs), leveraging tiny physical variations of the circuits to produce unique responses for individual PUF instances, are emerging as a promising class of hardware security primitives for resource-constrained IoT devices. Component-differentially-challenged XOR PUFs (CDC XPUFs) are among the PUFs which were shown to be highly secure to machine learning modeling attacks. However, no study of implementation and experimentation has been carried out. In this paper, we report our implementations of CDC XPUFs on FPGAs and experimental studies of the essential properties of CDC XPUFs.

This paper discusses a power supply system to operate a small-scale monitoring system where the sun does not reach and power supply is difficult. When we try to operate a small monitoring system in a place where power supply is difficult, how to secure power is important. We consider a system that transmits light energy from the ground to the ground using a floating repeater. It is assumed that both the position and the angle of the receiver are fixed. It is also assumed that the repeater is affected by the disturbance. We aim to control the light to reach the receiver under any circumstances. Some experiments were conducted to verify whether we could perform the assume control by developing a system based on the proposed method on a small scale. As a result, it was confirmed that roughly assumed control could be performed.

For LED lighting applications, this paper presents a novel light emitting diode (LED) sink driver with high voltage gains. Unlike traditional LED sink drivers, the proposed LED sink driver consists of a buck-boost converter and a switched-capacitor (SC) step-up converter with nested topology, where an input voltage is converted twice by cascading these two converter blocks. Therefore, the proposed hybrid topology enables the LED sink driver to achieve not only flexible control of an output voltage but also high voltage gains and few passive components. The characteristics of the proposed LED sink driver are investigated by theoretical analysis, simulation program with integrated circuit emphasis (SPICE) simulations, and breadboard experiments. In the performed simulations, the power efficiency of the proposed driver reaches about 80 % at 500 mW when the duty factor is 0.5. Furthermore, the experiment demonstrates high voltage gains and flexible controllability of an output voltage.

In order to reduce the frequency of zero line live faults on overhead lines in low-voltage stations and shorten the time for maintenance and repair when zero line live faults occur, the existing zero line live fault repair methods are summarized, and the Preventive measures, and proposed a fast fixed-point device research scheme for the live line zero line live fault of low-voltage overhead lines. The simulation criterion of live line live fault of the zero line is studied with the help of simulation software such as ATP-EMTP. Live fault type identification model to improve the accuracy of fault type diagnosis. It is expected that the location of the zero line live fault can be located in a shorter time. This solution will greatly reduce the manpower and material input during the live line maintenance work. Maintenance time has engineering transformation value.

With the advent of the Internet of Things, security has become indispensable. Physical unclonable functions (PUFs) are emerging as a promising alternative to classical cryptographic algorithms as it provides a lightweight and cost-effective solution for implementing a keyless security mechanism. Before adopting a PUF for real-world applications, a thorough examination of all important properties of PUF is necessary, and security and reliability are two of the important properties. The multiplexer based PUF (MPUF) was recently designed to improve upon the reliability while maintaining a similar resistance to machine learning (ML) attacks as compared with XOR PUFs of certain sizes. Recently, feed-forward neural network (NN) methods were found to be an effective tool for studying PUFs' security against ML attacks, and a study in 2019 found that some MPUFs are insecure against NN attack methods. In this paper, we try to gain further insight into various factors of NNs that affect the predictive power of NN as PUF attack methods. We investigate a NN that employs different optimizers at different stages of the machine learning process, leading to what is called a hybrid-optimizer-enhanced NN. We implemented the new NN for ML attack of MPUFs, and experimental results have shown it converges faster than a traditional NN with a single optimizer on attacking MPUFs, and the new method also requires less training data as compared with a recent NN-based attack study of MPUFs.

In this paper, an ultra-low power MOS current reference circuit is presented. It is based on the flat band voltage difference of oppositely doped polysilicon gate MOSFETs which are operated in weak inversion. It describes a method to achieve zero temperature coefficient of reference current at target temperature. Simulation results show 20nA reference current with temperature drift of 165ppm/°C. Simulated 3σ monte carlo process and mismatch variation of current is 11.2nA. After trimming it is reduced to 808pA. Typical quiescent current is 22.5nA at 3.75V nominal supply voltage.