Abstract
Thermal management of high-power semiconductor lasers is of great importance since the output power and beam quality are affected by the temperature rise of the gain region. Thermal simulations of a vertical-external-cavity surface-emitting laser by a finite-element method showed that the solder layer between the semiconductor thin film consisting of the gain region and a heat sink has a strong influence on the thermal resistance and direct bonding is preferred to achieve effective heat dissipation. To realize thin-film semiconductor lasers directly bonded on a high-thermal-conductivity substrate, surface-activated bonding using an argon fast atom beam was applied to the bonding of gallium arsenide (GaAs) and silicon carbide (SiC) wafers. The GaAs/SiC structure was demonstrated in the wafer scale (2 in. in diameter) at room temperature. The cross-sectional transmission electron microscopy observations showed that void-free bonding interfaces were achieved.
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1. Introduction
Compact and high-power semiconductor lasers are key components in various scientific and industrial instruments including laser projection display and fluorescence analysis systems such as confocal microscopes and flow cytometers. Recently, a vertical-external cavity surface-emitting laser (VECSEL),1,2) also called an optically pumped semiconductor laser (OPSL) or a semiconductor disk laser (SDL), has attracted a great deal of attention owing to its high output power, good efficiency, and excellent beam quality. Figure 1 shows a typical structure of the VECSEL. A semiconductor thin film consisting of a gain region and a distributed Bragg reflector (DBR) mirror is mounted on a heat sink. The semiconductor gain region consists of quantum wells separated by barrier regions and is optically pumped by a diode laser. The laser resonator is formed between the DBR and an external mirror. This structure enables laser emission across a broad spectral range from the near-ultraviolet to mid-infrared region by engineering the composition of the semiconductor material. However, the thermal management of high-power semiconductor lasers is critical since the performance is affected by the temperature of the gain region. High temperature reduces the laser output power (thermal roll-over). Therefore, for high-power semiconductor lasers, the suppression of the temperature rise by improving the heat dissipation is of great importance.
Fig. 1. Schematic diagram of typical VECSEL.
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Standard image High-resolution imageIn order to minimize the temperature of the gain region, the semiconductor thin film (e.g., 5–7 µm) is mounted with the mirror side facing downward onto the heat sink by solder bonding2,3) or hydrophilic bonding (e.g., liquid capillary bonding4)). However, the thermal conductivities of the solder die-attach materials, such as AgSn (3.5 wt % Ag, melting temperature: 221 °C) and AuSn (80 wt % Au, melting temperature: 280 °C), are not very high. Hydrophilic bonding usually requires a high-temperature annealing step after the wafers are brought into initial contact to ensure the formation of a strong bond. This generates high thermal stresses owing to a coefficient of thermal expansion (CTE) mismatch. Hydrophilic bonding also produces thin interfacial oxide layers that increase the interfacial thermal resistance. Surface-activated bonding (SAB) is a promising alternative approach to the conventional bonding methods. SAB is a room temperature bonding method and has been demonstrated for a variety of semiconductor materials such as Si/Si,5) Si/GaAs,6–8) Si/InP,6,7) and other combinations.9,10) Recently, SAB has been used to form directly bonded Si/SiC11–15) and SiC/SiC16,17) interfaces for power device applications.
In this study, we demonstrate the fabrication of the GaAs/SiC structure in the wafer scale by the room-temperature SAB method to realize thin-film semiconductor lasers directly bonded on SiC substrate. The thermal conductivity of SiC is threefold higher than that of Si, and is higher than that of copper at room temperature. First, the influence of the solder material and its thickness on the thermal resistance is evaluated by a finite-element method. Then, wafer bonding of GaAs and SiC is investigated experimentally.
2. Finite-element simulation of thermal resistance
Thermal analysis of VECSELs has already been carried out in some previous studies.18,19) Thermal resistance Rth is a key parameter that determines the temperature of the active gain region and it is defined as the ratio of the temperature rise of the gain region ΔT (K) to the generated heat power Pheat (W):
Since the temperature of the gain region increases with the thermal resistance, the thermal resistance should be minimized.
Thermal resistance has been evaluated by finite-element simulation. MemsONE software20) was used to perform the two-dimensional (2D) finite-element thermal analysis. Figure 2 shows the simplified 2D modeling structure used for thermal simulation. A uniform cylindrical heat source (radius: 100 µm, height: 2.5 µm) located in the center of the active gain region was assumed. Heat exchange with the exterior region was assumed to take place only through the DBR, bonding layer, and heat sink. Adiabatic boundary conditions (no heat flow) were applied on the sidewall and the top surface of the structure, since convection cooling is negligible. The boundary condition for the bottom surface of the SiC heat sink was that the temperature was kept constant (25 °C). The material parameters used in the simulation are summarized in Table I.21,22)
Fig. 2. Schematic diagram of the 2D modeling structure used for thermal simulation (not to scale).
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Standard image High-resolution imageTable I. Material parameters used in the finite-element method model.21,22)
| Material | Thermal conductivity (W m−1 K−1) | Specific heat (J g−1 K−1) | Density (g/cm3) |
|---|---|---|---|
| GaAs (gain region) | 55 | 0.33 | 5.32 |
| AlAs/GaAs (DBR) | 61 | 0.39 | 4.54 |
| AgSn (3.5 wt % Ag) | 33 | 0.15 | 7.36 |
| AuSn (80 wt % Au) | 57 | 0.15 | 14.7 |
| SiC | 490 | 0.69 | 3.21 |
The simulation results are shown in Fig. 3. Figure 3(a) shows the influence of the solder layer thickness on the thermal resistance for different solder materials (AgSn, AuSn). Because of the relatively low thermal conductivities of GaAs and DBR, the semiconductor thin film itself causes significant thermal resistance. Overall thermal resistance increases with increasing solder thickness. Although AuSn rather than AgSn improves the thermal resistance, a significant decrease in the thermal resistance can be expected in a direct bonding configuration (12.7 K/W). The thermal resistance can be reduced by approximately 43 and 30% when the 10-µm-thick AgSn and AuSn layers, respectively, are removed.
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Fig. 3. Simulated thermal resistances. (a) Thermal resistance as a function of the solder layer thickness. (b) Thermal resistance as a function of the thermal conductivity of different heat sink materials (without solder layer).
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Standard image High-resolution imageIn order to understand the influence of the thermal conductivities of different heat sink materials, thermal resistance is plotted against various heat-sink thermal conductivities (without solder layer) [Fig. 3(b)]. To obtain a significant improvement of thermal resistance using the heat sink, thermal conductivity higher than approximately 500 W/(m·K) is required. However, for high thermal conductivities above approximately 500 W/(m·K), the deceasing rate of the thermal resistance becomes small. Actually, the use of SiC as an efficient heat-spreading material for VECSEL applications has been demonstrated.23)
3. Experimental investigations of GaAs/SiC wafer bonding
3.1. Experimental procedure
Two-inch SiC(0001) wafers with chemical mechanical polish (polytype: 4H or 6H, thickness: 350 µm) and two- or three-inch GaAs(100) wafers (thickness: 350–450 µm) were used for the bonding experiments. The surface roughness of the wafers was measured using an atomic force microscope (AFM) by scanning a 1.0 × 1.0 µm2 surface area on the bonded wafers.
The SAB procedure was started by activating the wafer surfaces by argon fast atom beam (Ar-FAB) bombardment in an ultrahigh-vacuum bonding apparatus. When the vacuum condition reached 5 × 10−6 Pa, the two wafer surfaces were activated simultaneously by the Ar-FAB source for 200–600 s with a voltage of 1.5 kV and current of 60 mA. After Ar-FAB irradiation, the wafers were brought into contact at room temperature with an applied force of 2.45 kN in vacuum without exposing them to ambient pressure.
After bonding, the bonded wafer was diced into chips of 10 × 10 mm2 size and the tensile bonding strength was measured using the universal material testing machine (Tensilon RTG-1225).
The microstructure of the bonded interface was observed using a transmission electron microscope (TEM; Hitachi H-9000NAR) operated at 300 kV. Voids in interface can cause local hot spots but the benefit of direct bonding can be achieved with a high-quality bonding interface without any voids.
3.2. Experimental results
Figure 4 shows the typical AFM images of the (a) GaAs and (b) SiC surfaces. The measured surface roughness (Rrms) of GaAs and SiC wafers were 0.45 and 0.22 nm, respectively. These values were sufficient to achieve direct wafer bonding. The change in surface roughness (Rrms) before (GaAs: 0.45 nm, SiC: 0.22 nm) and after Ar-beam etching for 400 s (GaAs: 0.40 nm, SiC: 0.39 nm) was not so obvious.
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Fig. 4. Surface morphology measured by atomic force microscopy. (a) GaAs wafer, (b) SiC wafer. The rms roughness is less than 0.5 nm, which is suitable for direct bonding.
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Standard image High-resolution imageThe GaAs and SiC wafers were successfully bonded by SAB without any heat treatment. Figure 5(a) shows a photograph of a 2-in. SiC/3-in. GaAs wafer pair prepared by SAB at room temperature. Some voids (unbonded regions) were observed at the interface, which may be caused by particles, present on the bonding wafers. The bonded wafer was diced into 10 × 10 mm2 pieces, as shown in Fig. 5(b). The interface energy is sufficiently high to allow dicing of bonded wafer pairs. Both sides of the sample pair (10 × 10 mm2) were glued to the attachments of the tensile testing machine and pulling force was increased until the samples were separated. The bonding strength is obtained by dividing the force recorded at fracture by the area of the sample. The estimated average bonding strength of GaAs/SiC was 4.6 MPa, which is higher than that of previously reported bonded wafers (GaAs/Si: 0.6 MPa8)). Fracture occurred mainly along the bonded interface but sometimes inside the bulk GaAs.
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Fig. 5. Photographs of bonded samples. (a) Directly bonded SiC (2-in.)/GaAs (3-in.) wafer pair. (b) Diced GaAs/SiC samples (10 × 10 mm2).
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Standard image High-resolution imageFigure 6 shows the cross-sectional TEM images of the GaAs/SiC interface bonded by SAB at room temperature. The TEM observations showed that most of the interface is smooth and free of microvoids and direct bonding in the atomic scale was achieved. It was observed that the GaAs/SiC interface had a disordered amorphous-like interlayer (thickness: approximately 2.5 nm), which might be formed by the Ar-FAB irradiation. The amorphous layer at the bonded interface was also reported for Si/SiC wafers bonded by SAB.11,13)
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Fig. 6. Cross-sectional TEM images of GaAs/SiC interface prepared by SAB method at room temperature. (a) Low-magnification image. (b) High-magnification image.
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4. Conclusions
We studied the SAB of GaAs and SiC wafers for improved heat dissipation in high-power semiconductor lasers. The finite-element modeling results showed that direct bonding is preferred to achieve effective heat dissipation. A directly bonded GaAs/SiC structure was fabricated in the wafer scale at room temperature. The SAB method is expected to be a useful technique for future high-power laser applications.
Acknowledgment
Part of this study was supported by a Grant-in-Aid for Scientific Research (B) (25289085) from the Japan Society for the Promotion of Science (JSPS).